* [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-15 2:30 ` Kumar, Udit
2025-08-15 15:38 ` Andrew Davis
2025-08-14 22:38 ` [PATCH 02/33] arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (32 subsequent siblings)
33 siblings, 2 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level J7200 SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 9 +++++++++
3 files changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 5ce5f0a3d6f5..628ff89dd72f 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@5c00000 {
ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
<0x5d00000 0x00 0x5d00000 0x20000>;
power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss0_core0: r5f@5c00000 {
compatible = "ti,j7200-r5f";
@@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@5c00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss0_core1: r5f@5d00000 {
@@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@5d00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 56ab144fea07..692c4745040e 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@41000000 {
ranges = <0x41000000 0x00 0x41000000 0x20000>,
<0x41400000 0x00 0x41400000 0x20000>;
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
mcu_r5fss0_core0: r5f@41000000 {
compatible = "ti,j7200-r5f";
@@ -626,6 +627,7 @@ mcu_r5fss0_core0: r5f@41000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
mcu_r5fss0_core1: r5f@41400000 {
@@ -641,6 +643,7 @@ mcu_r5fss0_core1: r5f@41400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 291ab9bb414d..90befcdc8d08 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -254,20 +254,27 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -287,12 +294,14 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_i2c0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level
2025-08-14 22:38 ` [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level Beleswar Padhi
@ 2025-08-15 2:30 ` Kumar, Udit
2025-08-22 16:32 ` Beleswar Prasad Padhi
2025-08-15 15:38 ` Andrew Davis
1 sibling, 1 reply; 57+ messages in thread
From: Kumar, Udit @ 2025-08-15 2:30 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
u-kumar1
Hello Beleswar,
On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
> Remote Processors defined in top-level J7200 SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
>
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 9 +++++++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 5ce5f0a3d6f5..628ff89dd72f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@5c00000 {
> ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
> <0x5d00000 0x00 0x5d00000 0x20000>;
> power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> main_r5fss0_core0: r5f@5c00000 {
> compatible = "ti,j7200-r5f";
> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@5c00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> main_r5fss0_core1: r5f@5d00000 {
> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@5d00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 56ab144fea07..692c4745040e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@41000000 {
> ranges = <0x41000000 0x00 0x41000000 0x20000>,
> <0x41400000 0x00 0x41400000 0x20000>;
> power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
Please leave boot critical fw as is.
Here are my suggestions
create one boot-critical-fw-dtsi for mcu_r5fss0 , include this fw
files in all boards.
other IPC optional firmware can reside in one dtsi or dtso,
> [..]
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level
2025-08-15 2:30 ` Kumar, Udit
@ 2025-08-22 16:32 ` Beleswar Prasad Padhi
0 siblings, 0 replies; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 16:32 UTC (permalink / raw)
To: Kumar, Udit, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel
Hi Udit,
On 8/15/2025 8:00 AM, Kumar, Udit wrote:
> Hello Beleswar,
>
> On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
>> Remote Processors defined in top-level J7200 SoC dtsi files are
>> incomplete without the memory carveouts and mailbox assignments which
>> are only known at board integration level.
>>
>> Therefore, disable the remote processors at SoC level and enable them at
>> board level where above information is available.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++
>> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
>> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 9 +++++++++
>> 3 files changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> index 5ce5f0a3d6f5..628ff89dd72f 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@5c00000 {
>> ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
>> <0x5d00000 0x00 0x5d00000 0x20000>;
>> power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
>> + status = "disabled";
>> main_r5fss0_core0: r5f@5c00000 {
>> compatible = "ti,j7200-r5f";
>> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@5c00000 {
>> ti,atcm-enable = <1>;
>> ti,btcm-enable = <1>;
>> ti,loczrama = <1>;
>> + status = "disabled";
>> };
>> main_r5fss0_core1: r5f@5d00000 {
>> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@5d00000 {
>> ti,atcm-enable = <1>;
>> ti,btcm-enable = <1>;
>> ti,loczrama = <1>;
>> + status = "disabled";
>> };
>> };
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> index 56ab144fea07..692c4745040e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@41000000 {
>> ranges = <0x41000000 0x00 0x41000000 0x20000>,
>> <0x41400000 0x00 0x41400000 0x20000>;
>> power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
>> + status = "disabled";
>
> Please leave boot critical fw as is.
The nodes that are disabled here, are enabled back in the
board level files. So, it has no effective change on the boards.
>
> Here are my suggestions
>
> create one boot-critical-fw-dtsi for mcu_r5fss0 , include this fw
> files in all boards.
That is the plan for a future series :)
Thanks,
Beleswar
>
> other IPC optional firmware can reside in one dtsi or dtso,
>
>
>> [..]
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level
2025-08-14 22:38 ` [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level Beleswar Padhi
2025-08-15 2:30 ` Kumar, Udit
@ 2025-08-15 15:38 ` Andrew Davis
1 sibling, 0 replies; 57+ messages in thread
From: Andrew Davis @ 2025-08-15 15:38 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel
On 8/14/25 5:38 PM, Beleswar Padhi wrote:
> Remote Processors defined in top-level J7200 SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
>
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
Looks good to me. Could you move all these "Enable rproc at board level" patches
to the start of the series? They should be the most straightforward patches and
so could all go in even if the .dtsi refactor doesn't and needs some work.
Andrew
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 9 +++++++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 5ce5f0a3d6f5..628ff89dd72f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@5c00000 {
> ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
> <0x5d00000 0x00 0x5d00000 0x20000>;
> power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> main_r5fss0_core0: r5f@5c00000 {
> compatible = "ti,j7200-r5f";
> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@5c00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> main_r5fss0_core1: r5f@5d00000 {
> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@5d00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 56ab144fea07..692c4745040e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@41000000 {
> ranges = <0x41000000 0x00 0x41000000 0x20000>,
> <0x41400000 0x00 0x41400000 0x20000>;
> power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> mcu_r5fss0_core0: r5f@41000000 {
> compatible = "ti,j7200-r5f";
> @@ -626,6 +627,7 @@ mcu_r5fss0_core0: r5f@41000000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> mcu_r5fss0_core1: r5f@41400000 {
> @@ -641,6 +643,7 @@ mcu_r5fss0_core1: r5f@41400000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index 291ab9bb414d..90befcdc8d08 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -254,20 +254,27 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
> };
> };
>
> +&mcu_r5fss0 {
> + status = "okay";
> +};
> +
> &mcu_r5fss0_core0 {
> mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
> memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> <&mcu_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &mcu_r5fss0_core1 {
> mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
> memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
> <&mcu_r5fss0_core1_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0 {
> ti,cluster-mode = <0>;
> + status = "okay";
> };
>
> /* Timers are used by Remoteproc firmware */
> @@ -287,12 +294,14 @@ &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> };
>
> &main_i2c0 {
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 02/33] arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
2025-08-14 22:38 ` [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations" Beleswar Padhi
` (31 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J7200 SoCs have multiple programmable remote processors like
R5Fs. The TI SDKs for J7200 SoCs offer sample firmwares which could be
run on these cores to demonstrate an "echo" IPC test. Those firmware
require certain memory carveouts to be reserved from system memory,
timers to be reserved, and certain mailbox configurations for interrupt
based messaging. These configurations could be different for a different
firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 124 +----------------
.../boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 130 ++++++++++++++++++
2 files changed, 132 insertions(+), 122 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 90befcdc8d08..0fcb6164f648 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -40,48 +40,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a4000000 {
- reg = <0x00 0xa4000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
mux0: mux-controller-0 {
@@ -224,86 +182,6 @@ partition@800000 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -546,3 +424,5 @@ &main_mcan0 {
pinctrl-names = "default";
phys = <&transceiver0>;
};
+
+#include "k3-j7200-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..8eff7bd2e771
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J7200 SoCs
+ *
+ * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a4000000 {
+ reg = <0x00 0xa4000000 0x00 0x00800000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
2025-08-14 22:38 ` [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors at board level Beleswar Padhi
2025-08-14 22:38 ` [PATCH 02/33] arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-15 2:35 ` Kumar, Udit
2025-08-14 22:38 ` [PATCH 04/33] Revert "arm64: dts: ti: k3-j721e-beagleboneai64: " Beleswar Padhi
` (30 subsequent siblings)
33 siblings, 1 reply; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
The C6x carveouts are reversed intentionally. This is due to the
requirement to keep the DMA memory region as non-cached, however the
minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
memory region of C66x_1 as its own, and vice-versa.
This was also called out in the original commit which introduced these
reversed carveouts:
"The minimum granularity on the Cache settings on C66x DSP cores
is 16MB, so the DMA memory regions are chosen such that they are
in separate 16MB regions for each DSP, while reserving a total
of 16 MB for each DSP and not changing the overall DSP
remoteproc carveouts."
Fixes: 9f3814a7c06b ("arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations")
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index ffef3d1cfd55..9882bb1e8097 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
no-map;
};
- c66_0_dma_memory_region: c66-dma-memory@a6000000 {
+ /* Carveout locations are flipped due to caching */
+ c66_1_dma_memory_region: c66-dma-memory@a6000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa6000000 0x00 0x100000>;
no-map;
@@ -132,7 +133,8 @@ c66_0_memory_region: c66-memory@a6100000 {
no-map;
};
- c66_1_dma_memory_region: c66-dma-memory@a7000000 {
+ /* Carveout locations are flipped due to caching */
+ c66_0_dma_memory_region: c66-dma-memory@a7000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa7000000 0x00 0x100000>;
no-map;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"
2025-08-14 22:38 ` [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations" Beleswar Padhi
@ 2025-08-15 2:35 ` Kumar, Udit
2025-08-22 16:26 ` Beleswar Prasad Padhi
0 siblings, 1 reply; 57+ messages in thread
From: Kumar, Udit @ 2025-08-15 2:35 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
u-kumar1
On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
> This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
>
> The C6x carveouts are reversed intentionally. This is due to the
> requirement to keep the DMA memory region as non-cached, however the
> minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
> entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
> memory region of C66x_1 as its own, and vice-versa.
Sorry , but i failed to understand how this swap helps in making region
non-cached.
16MB logic is understood.
>
> This was also called out in the original commit which introduced these
> reversed carveouts:
> "The minimum granularity on the Cache settings on C66x DSP cores
> is 16MB, so the DMA memory regions are chosen such that they are
> in separate 16MB regions for each DSP, while reserving a total
> of 16 MB for each DSP and not changing the overall DSP
> remoteproc carveouts."
>
> Fixes: 9f3814a7c06b ("arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations")
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> index ffef3d1cfd55..9882bb1e8097 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> @@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
> no-map;
> };
>
> - c66_0_dma_memory_region: c66-dma-memory@a6000000 {
> + /* Carveout locations are flipped due to caching */
> + c66_1_dma_memory_region: c66-dma-memory@a6000000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0xa6000000 0x00 0x100000>;
> no-map;
> @@ -132,7 +133,8 @@ c66_0_memory_region: c66-memory@a6100000 {
> no-map;
> };
>
> - c66_1_dma_memory_region: c66-dma-memory@a7000000 {
> + /* Carveout locations are flipped due to caching */
> + c66_0_dma_memory_region: c66-dma-memory@a7000000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0xa7000000 0x00 0x100000>;
> no-map;
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"
2025-08-15 2:35 ` Kumar, Udit
@ 2025-08-22 16:26 ` Beleswar Prasad Padhi
0 siblings, 0 replies; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 16:26 UTC (permalink / raw)
To: Kumar, Udit, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel
Hi Udit,
On 8/15/2025 8:05 AM, Kumar, Udit wrote:
>
> On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
>> This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
>>
>> The C6x carveouts are reversed intentionally. This is due to the
>> requirement to keep the DMA memory region as non-cached, however the
>> minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
>> entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
>> memory region of C66x_1 as its own, and vice-versa.
>
> Sorry , but i failed to understand how this swap helps in making
> region non-cached.
This swap does not make region non-cached. This ensures the correct
carveouts are registered for each remote processor (rproc), which is
necessary to ensure VRING buffers are allocated from correct address
space for IPC.
Without this patch, the VRINGs would be allocated from rproc's own
DMA carveout, which would be *cached* from rproc's view.
Refer to the line in the commit message:
"and uses the DMA memory region of C66x_1 as its own, and vice-versa."
Marking a region as non-cached from a rproc's view is done by its
firmware itself via a linker script.
Thanks,
Beleswar
>
> 16MB logic is understood.
>
>>
>> This was also called out in the original commit which introduced these
>> reversed carveouts:
>> "The minimum granularity on the Cache settings on C66x DSP cores
>> is 16MB, so the DMA memory regions are chosen such that they are
>> in separate 16MB regions for each DSP, while reserving a total
>> of 16 MB for each DSP and not changing the overall DSP
>> remoteproc carveouts."
>>
>> Fixes: 9f3814a7c06b ("arm64: dts: ti: k3-j721e-sk: Fix reversed C6x
>> carveout locations")
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> index ffef3d1cfd55..9882bb1e8097 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> @@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region:
>> r5f-memory@a5100000 {
>> no-map;
>> };
>> - c66_0_dma_memory_region: c66-dma-memory@a6000000 {
>> + /* Carveout locations are flipped due to caching */
>> + c66_1_dma_memory_region: c66-dma-memory@a6000000 {
>> compatible = "shared-dma-pool";
>> reg = <0x00 0xa6000000 0x00 0x100000>;
>> no-map;
>> @@ -132,7 +133,8 @@ c66_0_memory_region: c66-memory@a6100000 {
>> no-map;
>> };
>> - c66_1_dma_memory_region: c66-dma-memory@a7000000 {
>> + /* Carveout locations are flipped due to caching */
>> + c66_0_dma_memory_region: c66-dma-memory@a7000000 {
>> compatible = "shared-dma-pool";
>> reg = <0x00 0xa7000000 0x00 0x100000>;
>> no-map;
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 04/33] Revert "arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations"
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (2 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 03/33] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations" Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 05/33] arm64: dts: ti: k3-j721e: Enable remote processors at board level Beleswar Padhi
` (29 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
This reverts commit 1a314099b7559690fe23cdf3300dfff6e830ecb1.
The C6x carveouts are reversed intentionally. This is due to the
requirement to keep the DMA memory region as non-cached, however the
minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
memory region of C66x_1 as its own, and vice-versa.
This was also called out in the original commit which introduced these
reversed carveouts:
"The minimum granularity on the Cache settings on C66x DSP
cores is 16MB, so the DMA memory regions are chosen such that
they are in separate 16MB regions for each DSP, while reserving
a total of 16 MB for each DSP and not changing the overall DSP
remoteproc carveouts."
Fixes: 1a314099b755 ("arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations")
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index fb899c99753e..6e7f321f3e8a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -123,7 +123,8 @@ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
no-map;
};
- c66_0_dma_memory_region: c66-dma-memory@a6000000 {
+ /* Carveout locations are flipped due to caching */
+ c66_1_dma_memory_region: c66-dma-memory@a6000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa6000000 0x00 0x100000>;
no-map;
@@ -135,7 +136,8 @@ c66_0_memory_region: c66-memory@a6100000 {
no-map;
};
- c66_1_dma_memory_region: c66-dma-memory@a7000000 {
+ /* Carveout locations are flipped due to caching */
+ c66_0_dma_memory_region: c66-dma-memory@a7000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa7000000 0x00 0x100000>;
no-map;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 05/33] arm64: dts: ti: k3-j721e: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (3 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 04/33] Revert "arm64: dts: ti: k3-j721e-beagleboneai64: " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 06/33] arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW Beleswar Padhi
` (28 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level J721E SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments
which are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable
them at board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-j721e-beagleboneai64.dts | 18 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 ++++++
.../arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 12 ++++++++++++
5 files changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 6e7f321f3e8a..fdfd46b5b30a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -937,37 +937,55 @@ mbox_c71_0: mbox-c71-0 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&mcu_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
+&main_r5fss1 {
+ status = "okay";
+};
+
&main_r5fss1_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index ab3666ff4297..e748f704e3b6 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -2182,6 +2182,7 @@ main_r5fss0: r5fss@5c00000 {
ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
<0x5d00000 0x00 0x5d00000 0x20000>;
power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss0_core0: r5f@5c00000 {
compatible = "ti,j721e-r5f";
@@ -2196,6 +2197,7 @@ main_r5fss0_core0: r5f@5c00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss0_core1: r5f@5d00000 {
@@ -2211,6 +2213,7 @@ main_r5fss0_core1: r5f@5d00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
@@ -2222,6 +2225,7 @@ main_r5fss1: r5fss@5e00000 {
ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
<0x5f00000 0x00 0x5f00000 0x20000>;
power-domains = <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss1_core0: r5f@5e00000 {
compatible = "ti,j721e-r5f";
@@ -2236,6 +2240,7 @@ main_r5fss1_core0: r5f@5e00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss1_core1: r5f@5f00000 {
@@ -2251,6 +2256,7 @@ main_r5fss1_core1: r5f@5f00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index b02142b2b460..42a21398e389 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -594,6 +594,7 @@ mcu_r5fss0: r5fss@41000000 {
ranges = <0x41000000 0x00 0x41000000 0x20000>,
<0x41400000 0x00 0x41400000 0x20000>;
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
mcu_r5fss0_core0: r5f@41000000 {
compatible = "ti,j721e-r5f";
@@ -608,6 +609,7 @@ mcu_r5fss0_core0: r5f@41000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
mcu_r5fss0_core1: r5f@41400000 {
@@ -623,6 +625,7 @@ mcu_r5fss0_core1: r5f@41400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 9882bb1e8097..5d60aa9bc42b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -1351,13 +1351,19 @@ mbox_c71_0: mbox-c71-0 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&mcu_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
@@ -1365,10 +1371,12 @@ &mcu_r5fss0_core1 {
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -1401,24 +1409,28 @@ &main_timer15 {
};
&main_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index 0722f6361cc8..795b041ee733 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -554,23 +554,31 @@ mbox_c71_0: mbox-c71-0 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&mcu_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
};
&main_r5fss0 {
+ status = "okay";
ti,cluster-mode = <0>;
};
&main_r5fss1 {
+ status = "okay";
ti,cluster-mode = <0>;
};
@@ -604,24 +612,28 @@ &main_timer15 {
};
&main_r5fss0_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
+ status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 06/33] arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (4 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 05/33] arm64: dts: ti: k3-j721e: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-15 15:42 ` Andrew Davis
2025-08-14 22:38 ` [PATCH 07/33] arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (27 subsequent siblings)
33 siblings, 1 reply; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Robert Nelson
The TI IPC Firmwares running on J721E SoCs use certain MAIN domain
timers as tick. Reserve those at board level DT to avoid remote
processor crashes.
While at it, switch the MAIN domain R5F cluster into split mode to
maximize the number of R5F processors. The TI IPC firmware for the split
processors is already available public. This config aligns with other
J721E boards and can be refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Robert Nelson <robertcnelson@gmail.com>
Requesting for review/test of this patch.
.../boot/dts/ti/k3-j721e-beagleboneai64.dts | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index fdfd46b5b30a..c7ac2b66ee0d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -937,6 +937,35 @@ mbox_c71_0: mbox-c71-0 {
};
};
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&main_timer12 {
+ status = "reserved";
+};
+
+&main_timer13 {
+ status = "reserved";
+};
+
+&main_timer14 {
+ status = "reserved";
+};
+
+&main_timer15 {
+ status = "reserved";
+};
+
&mcu_r5fss0 {
status = "okay";
};
@@ -956,6 +985,7 @@ &mcu_r5fss0_core1 {
};
&main_r5fss0 {
+ ti,cluster-mode = <0>;
status = "okay";
};
@@ -974,6 +1004,7 @@ &main_r5fss0_core1 {
};
&main_r5fss1 {
+ ti,cluster-mode = <0>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 06/33] arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW
2025-08-14 22:38 ` [PATCH 06/33] arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW Beleswar Padhi
@ 2025-08-15 15:42 ` Andrew Davis
0 siblings, 0 replies; 57+ messages in thread
From: Andrew Davis @ 2025-08-15 15:42 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel, Robert Nelson
On 8/14/25 5:38 PM, Beleswar Padhi wrote:
> The TI IPC Firmwares running on J721E SoCs use certain MAIN domain
> timers as tick. Reserve those at board level DT to avoid remote
> processor crashes.
>
All these "missing cfg" patches should then go together next in this series.
> While at it, switch the MAIN domain R5F cluster into split mode to
> maximize the number of R5F processors. The TI IPC firmware for the split
> processors is already available public. This config aligns with other
> J721E boards and can be refactored out later.
>
This is an unrelated change and not as trivial as it looks. Factor this part
out and put it later in the series so we can discuss it separately.
Andrew
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> Cc: Robert Nelson <robertcnelson@gmail.com>
> Requesting for review/test of this patch.
>
> .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 31 +++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> index fdfd46b5b30a..c7ac2b66ee0d 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> @@ -937,6 +937,35 @@ mbox_c71_0: mbox-c71-0 {
> };
> };
>
> +/* Timers are used by Remoteproc firmware */
> +&main_timer0 {
> + status = "reserved";
> +};
> +
> +&main_timer1 {
> + status = "reserved";
> +};
> +
> +&main_timer2 {
> + status = "reserved";
> +};
> +
> +&main_timer12 {
> + status = "reserved";
> +};
> +
> +&main_timer13 {
> + status = "reserved";
> +};
> +
> +&main_timer14 {
> + status = "reserved";
> +};
> +
> +&main_timer15 {
> + status = "reserved";
> +};
> +
> &mcu_r5fss0 {
> status = "okay";
> };
> @@ -956,6 +985,7 @@ &mcu_r5fss0_core1 {
> };
>
> &main_r5fss0 {
> + ti,cluster-mode = <0>;
> status = "okay";
> };
>
> @@ -974,6 +1004,7 @@ &main_r5fss0_core1 {
> };
>
> &main_r5fss1 {
> + ti,cluster-mode = <0>;
> status = "okay";
> };
>
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 07/33] arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (5 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 06/33] arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 08/33] arm64: dts: ti: k3-j721s2: Enable remote processors at board level Beleswar Padhi
` (26 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J721E SoCs have multiple programmable remote processors like
R5F, C6x, C7x etc. The TI SDKs for J721E SoCs offer sample firmwares
which could be run on these cores to demonstrate an "echo" IPC test.
Those firmware require certain memory carveouts to be reserved from
system memory, timers to be reserved, and certain mailbox configurations
for interrupt based messaging. These configurations could be different
for a different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-j721e-beagleboneai64.dts | 280 +----------------
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 280 +----------------
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 278 +----------------
.../boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 288 ++++++++++++++++++
4 files changed, 291 insertions(+), 835 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index c7ac2b66ee0d..7fc014a3f4e4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -62,110 +62,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- /* Carveout locations are flipped due to caching */
- c66_1_dma_memory_region: c66-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c66_0_memory_region: c66-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- /* Carveout locations are flipped due to caching */
- c66_0_dma_memory_region: c66-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c66_1_memory_region: c66-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a8000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a8100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@aa000000 {
- reg = <0x00 0xaa000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
gpio_keys: gpio-keys {
@@ -867,178 +763,4 @@ &ufs_wrapper {
status = "disabled";
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
- interrupts = <424>;
-
- mbox_c66_0: mbox-c66-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c66_1: mbox-c66-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
-
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer12 {
- status = "reserved";
-};
-
-&main_timer13 {
- status = "reserved";
-};
-
-&main_timer14 {
- status = "reserved";
-};
-
-&main_timer15 {
- status = "reserved";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
- memory-region = <&c66_0_dma_memory_region>,
- <&c66_0_memory_region>;
-};
-
-&c66_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
- memory-region = <&c66_1_dma_memory_region>,
- <&c66_1_memory_region>;
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 5d60aa9bc42b..6db3ad63b017 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -59,110 +59,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- /* Carveout locations are flipped due to caching */
- c66_1_dma_memory_region: c66-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c66_0_memory_region: c66-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- /* Carveout locations are flipped due to caching */
- c66_0_dma_memory_region: c66-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c66_1_memory_region: c66-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a8000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a8100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@aa000000 {
- reg = <0x00 0xaa000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vusb_main: fixedregulator-vusb-main5v0 {
@@ -1281,178 +1177,4 @@ &ufs_wrapper {
status = "disabled";
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
- interrupts = <424>;
-
- mbox_c66_0: mbox-c66-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c66_1: mbox-c66-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
-
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer12 {
- status = "reserved";
-};
-
-&main_timer13 {
- status = "reserved";
-};
-
-&main_timer14 {
- status = "reserved";
-};
-
-&main_timer15 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
- memory-region = <&c66_0_dma_memory_region>,
- <&c66_0_memory_region>;
-};
-
-&c66_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
- memory-region = <&c66_1_dma_memory_region>,
- <&c66_1_memory_region>;
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index 795b041ee733..5848ca30524d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -40,108 +40,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- c66_1_dma_memory_region: c66-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c66_0_memory_region: c66-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- c66_0_dma_memory_region: c66-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c66_1_memory_region: c66-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a8000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a8100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@aa000000 {
- reg = <0x00 0xaa000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
};
@@ -484,178 +382,4 @@ partition@800000 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
- interrupts = <424>;
-
- mbox_c66_0: mbox-c66-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c66_1: mbox-c66-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
-
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
- status = "okay";
- ti,cluster-mode = <0>;
-};
-
-&main_r5fss1 {
- status = "okay";
- ti,cluster-mode = <0>;
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer12 {
- status = "reserved";
-};
-
-&main_timer13 {
- status = "reserved";
-};
-
-&main_timer14 {
- status = "reserved";
-};
-
-&main_timer15 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
-};
-
-&c66_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
- memory-region = <&c66_0_dma_memory_region>,
- <&c66_0_memory_region>;
-};
-
-&c66_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
- memory-region = <&c66_1_dma_memory_region>,
- <&c66_1_memory_region>;
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
+#include "k3-j721e-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..5b3fa95aed76
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J721E SoCs
+ *
+ * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ /* Carveout locations are flipped due to caching */
+ c66_1_dma_memory_region: c66-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c66_0_memory_region: c66-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ /* Carveout locations are flipped due to caching */
+ c66_0_dma_memory_region: c66-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c66_1_memory_region: c66-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a8000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a8100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@aa000000 {
+ reg = <0x00 0xaa000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "okay";
+ interrupts = <424>;
+
+ mbox_c66_0: mbox-c66-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c66_1: mbox-c66-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&main_timer12 {
+ status = "reserved";
+};
+
+&main_timer13 {
+ status = "reserved";
+};
+
+&main_timer14 {
+ status = "reserved";
+};
+
+&main_timer15 {
+ status = "reserved";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0 {
+ status = "okay";
+ ti,cluster-mode = <0>;
+};
+
+&main_r5fss0_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1 {
+ status = "okay";
+ ti,cluster-mode = <0>;
+};
+
+&main_r5fss1_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c66_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+ memory-region = <&c66_0_dma_memory_region>,
+ <&c66_0_memory_region>;
+};
+
+&c66_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+ memory-region = <&c66_1_dma_memory_region>,
+ <&c66_1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 08/33] arm64: dts: ti: k3-j721s2: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (6 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 07/33] arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 09/33] arm64: dts: ti: k3-j721s2-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (25 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level J721S2 SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 ++++++
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 12 ++++++++++++
5 files changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
index fd715fee8170..383594732e81 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
@@ -371,24 +371,28 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
/* eMMC */
@@ -407,10 +411,12 @@ &main_sdhci1 {
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -438,16 +444,22 @@ &main_timer5 {
status = "reserved";
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
};
&ospi0 {
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
index 4ca2d4e2fb9b..2d2edeeb7347 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
@@ -291,24 +291,32 @@ mbox_c71_1: mbox-c71-1 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -340,24 +348,28 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&c71_0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 726374dc8795..6aa4da5b7df4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1894,6 +1894,7 @@ main_r5fss0: r5fss@5c00000 {
ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
<0x5d00000 0x00 0x5d00000 0x20000>;
power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss0_core0: r5f@5c00000 {
compatible = "ti,j721s2-r5f";
@@ -1908,6 +1909,7 @@ main_r5fss0_core0: r5f@5c00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss0_core1: r5f@5d00000 {
@@ -1923,6 +1925,7 @@ main_r5fss0_core1: r5f@5d00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
@@ -1934,6 +1937,7 @@ main_r5fss1: r5fss@5e00000 {
ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
<0x5f00000 0x00 0x5f00000 0x20000>;
power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss1_core0: r5f@5e00000 {
compatible = "ti,j721s2-r5f";
@@ -1948,6 +1952,7 @@ main_r5fss1_core0: r5f@5e00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss1_core1: r5f@5f00000 {
@@ -1963,6 +1968,7 @@ main_r5fss1_core1: r5f@5f00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index bc31266126d0..837097751c18 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -690,6 +690,7 @@ mcu_r5fss0: r5fss@41000000 {
ranges = <0x41000000 0x00 0x41000000 0x20000>,
<0x41400000 0x00 0x41400000 0x20000>;
power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
mcu_r5fss0_core0: r5f@41000000 {
compatible = "ti,j721s2-r5f";
@@ -704,6 +705,7 @@ mcu_r5fss0_core0: r5f@41000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
mcu_r5fss0_core1: r5f@41400000 {
@@ -719,6 +721,7 @@ mcu_r5fss0_core1: r5f@41400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index a9dbe14fb0c9..f252007262d3 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -572,24 +572,32 @@ mbox_c71_1: mbox-c71-1 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -621,24 +629,28 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&c71_0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 09/33] arm64: dts: ti: k3-j721s2-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (7 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 08/33] arm64: dts: ti: k3-j721s2: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 10/33] arm64: dts: ti: k3-j784s4-j742s2: Enable remote processors at board level Beleswar Padhi
` (24 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J721S2 SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for J721S2 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am68-phycore-som.dtsi | 247 +----------------
arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 241 +----------------
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 243 +----------------
.../dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 249 ++++++++++++++++++
4 files changed, 254 insertions(+), 726 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
index 383594732e81..21fe9083c19c 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
@@ -60,96 +60,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_1_dma_memory_region: c71-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c71_1_memory_region: c71-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a8000000 {
- reg = <0x00 0xa8000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vdd_sd_dv: regulator-sd {
@@ -243,80 +153,6 @@ J721S2_WKUP_IOPAD(0x09c, PIN_INPUT_PULLUP, 0) /* (H27) WKUP_I2C0_SDA */
};
};
-&c71_0 {
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
- status = "okay";
-};
-
-&c71_1 {
- mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
- memory-region = <&c71_1_dma_memory_region>,
- <&c71_1_memory_region>;
- status = "okay";
-};
-
-&mailbox0_cluster0 {
- interrupts = <436>;
- status = "okay";
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- interrupts = <432>;
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- interrupts = <428>;
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- interrupts = <420>;
- status = "okay";
-
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c71_1: mbox-c71-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
&main_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins_default>;
@@ -367,34 +203,6 @@ &main_gpio0 {
status = "okay";
};
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
/* eMMC */
&main_sdhci0 {
non-removable;
@@ -409,59 +217,6 @@ &main_sdhci1 {
bootph-all;
};
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer3 {
- status = "reserved";
-};
-
-&main_timer4 {
- status = "reserved";
-};
-
-&main_timer5 {
- status = "reserved";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
@@ -611,3 +366,5 @@ som_eeprom_opt: eeprom@51 {
pagesize = <32>;
};
};
+
+#include "k3-j721s2-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
index 2d2edeeb7347..4b14fb1062bd 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
@@ -38,96 +38,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_1_dma_memory_region: c71-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c71_1_memory_region: c71-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a8000000 {
- reg = <0x00 0xa8000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
};
@@ -235,153 +145,4 @@ partition@3fc0000 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c71_1: mbox-c71-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer3 {
- status = "reserved";
-};
-
-&main_timer4 {
- status = "reserved";
-};
-
-&main_timer5 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
-
-&c71_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
- memory-region = <&c71_1_dma_memory_region>,
- <&c71_1_memory_region>;
-};
+#include "k3-j721s2-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index f252007262d3..d4d996b985ae 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -42,96 +42,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_1_dma_memory_region: c71-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- c71_1_memory_region: c71-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a8000000 {
- reg = <0x00 0xa8000000 0x00 0x01c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
mux0: mux-controller-0 {
@@ -516,157 +426,6 @@ partition@3fc0000 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c71_1: mbox-c71-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer3 {
- status = "reserved";
-};
-
-&main_timer4 {
- status = "reserved";
-};
-
-&main_timer5 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
-
-&c71_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
- memory-region = <&c71_1_dma_memory_region>,
- <&c71_1_memory_region>;
-};
-
&main_i2c4 {
bridge_dsi_edp: bridge-dsi-edp@2c {
compatible = "ti,sn65dsi86";
@@ -693,3 +452,5 @@ port@1 {
};
};
};
+
+#include "k3-j721s2-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..40c9f2b64e7e
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
@@ -0,0 +1,249 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J721S2 SoCs
+ *
+ * Copyright (C) 2021-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a8000000 {
+ reg = <0x00 0xa8000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&main_timer3 {
+ status = "reserved";
+};
+
+&main_timer4 {
+ status = "reserved";
+};
+
+&main_timer5 {
+ status = "reserved";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+ status = "okay";
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 10/33] arm64: dts: ti: k3-j784s4-j742s2: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (8 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 09/33] arm64: dts: ti: k3-j721s2-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 11/33] arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC cfg into new dtsi Beleswar Padhi
` (23 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level J784S4-J742S2 common SoC dtsi
files are incomplete without the memory carveouts and mailbox
assignments which are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 15 +++++++++++++++
.../boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 7 +++++++
.../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 9 +++++++++
.../ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 3 +++
4 files changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 612ac27643d2..cea096733ba2 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -992,24 +992,32 @@ &mcu_cpsw_port1 {
bootph-all;
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
@@ -1055,42 +1063,49 @@ &main_timer9 {
&main_r5fss2 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&main_r5fss2_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
memory-region = <&main_r5fss2_core0_dma_memory_region>,
<&main_r5fss2_core0_memory_region>;
+ status = "okay";
};
&main_r5fss2_core1 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
memory-region = <&main_r5fss2_core1_dma_memory_region>,
<&main_r5fss2_core1_memory_region>;
+ status = "okay";
};
&c71_0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index 6afa802544e9..c269e5b29b96 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -1154,6 +1154,10 @@ mbox_c71_2: mbox-c71-2 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
status = "okay";
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
@@ -1170,14 +1174,17 @@ &mcu_r5fss0_core1 {
&main_r5fss0 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss1 {
ti,cluster-mode = <0>;
+ status = "okay";
};
&main_r5fss2 {
ti,cluster-mode = <0>;
+ status = "okay";
};
/* Timers are used by Remoteproc firmware */
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index fbbe768e7a30..9cc0901d58fb 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2174,6 +2174,7 @@ main_r5fss0: r5fss@5c00000 {
ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
<0x5d00000 0x00 0x5d00000 0x20000>;
power-domains = <&k3_pds 336 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss0_core0: r5f@5c00000 {
compatible = "ti,j721s2-r5f";
@@ -2188,6 +2189,7 @@ main_r5fss0_core0: r5f@5c00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss0_core1: r5f@5d00000 {
@@ -2203,6 +2205,7 @@ main_r5fss0_core1: r5f@5d00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
@@ -2214,6 +2217,7 @@ main_r5fss1: r5fss@5e00000 {
ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
<0x5f00000 0x00 0x5f00000 0x20000>;
power-domains = <&k3_pds 337 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss1_core0: r5f@5e00000 {
compatible = "ti,j721s2-r5f";
@@ -2228,6 +2232,7 @@ main_r5fss1_core0: r5f@5e00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss1_core1: r5f@5f00000 {
@@ -2243,6 +2248,7 @@ main_r5fss1_core1: r5f@5f00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
@@ -2254,6 +2260,7 @@ main_r5fss2: r5fss@5900000 {
ranges = <0x5900000 0x00 0x5900000 0x20000>,
<0x5a00000 0x00 0x5a00000 0x20000>;
power-domains = <&k3_pds 338 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss2_core0: r5f@5900000 {
compatible = "ti,j721s2-r5f";
@@ -2268,6 +2275,7 @@ main_r5fss2_core0: r5f@5900000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss2_core1: r5f@5a00000 {
@@ -2283,6 +2291,7 @@ main_r5fss2_core1: r5f@5a00000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index 52e2965a3bf5..cc22bfb5f599 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -595,6 +595,7 @@ mcu_r5fss0: r5fss@41000000 {
ranges = <0x41000000 0x00 0x41000000 0x20000>,
<0x41400000 0x00 0x41400000 0x20000>;
power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
mcu_r5fss0_core0: r5f@41000000 {
compatible = "ti,j721s2-r5f";
@@ -609,6 +610,7 @@ mcu_r5fss0_core0: r5f@41000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
mcu_r5fss0_core1: r5f@41400000 {
@@ -624,6 +626,7 @@ mcu_r5fss0_core1: r5f@41400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 11/33] arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (9 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 10/33] arm64: dts: ti: k3-j784s4-j742s2: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 12/33] arm64: dts: ti: k3-j784s4-ti-ipc-firmware: " Beleswar Padhi
` (22 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J784S4/J742S2 SoCs have multiple programmable remote
processors like R5F, C7x etc. The TI SDKs for J784S4/J742S2 SoCs offer
sample firmwares which could be run on these cores to demonstrate an
"echo" IPC test. Those firmware require certain memory carveouts to be
reserved from system memory, timers to be reserved, and certain mailbox
configurations for interrupt based messaging. These configurations could
be different for a different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 336 +----------------
.../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 344 +----------------
...-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 350 ++++++++++++++++++
3 files changed, 354 insertions(+), 676 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index cea096733ba2..5e187e86a5d9 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -61,126 +61,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
no-map;
};
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss2_core0_memory_region: r5f-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss2_core1_memory_region: r5f-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a8000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a8100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_1_dma_memory_region: c71-dma-memory@a9000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa9000000 0x00 0x100000>;
- no-map;
- };
-
- c71_1_memory_region: c71-memory@a9100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa9100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_2_dma_memory_region: c71-dma-memory@aa000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xaa000000 0x00 0x100000>;
- no-map;
- };
-
- c71_2_memory_region: c71-memory@aa100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xaa100000 0x00 0xf00000>;
- no-map;
- };
-
c71_3_dma_memory_region: c71-dma-memory@ab000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xab000000 0x00 0x100000>;
@@ -640,84 +520,7 @@ &phy_gmii_sel {
bootph-all;
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
- interrupts = <424>;
- mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c71_1: mbox-c71-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
&mailbox0_cluster5 {
- status = "okay";
- interrupts = <416>;
- mbox_c71_2: mbox-c71-2 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
mbox_c71_3: mbox-c71-3 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
@@ -992,143 +795,6 @@ &mcu_cpsw_port1 {
bootph-all;
};
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer3 {
- status = "reserved";
-};
-
-&main_timer4 {
- status = "reserved";
-};
-
-&main_timer5 {
- status = "reserved";
-};
-
-&main_timer6 {
- status = "reserved";
-};
-
-&main_timer7 {
- status = "reserved";
-};
-
-&main_timer8 {
- status = "reserved";
-};
-
-&main_timer9 {
- status = "reserved";
-};
-
-&main_r5fss2 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss2_core0 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
- memory-region = <&main_r5fss2_core0_dma_memory_region>,
- <&main_r5fss2_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss2_core1 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
- memory-region = <&main_r5fss2_core1_dma_memory_region>,
- <&main_r5fss2_core1_memory_region>;
- status = "okay";
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
-
-&c71_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
- memory-region = <&c71_1_dma_memory_region>,
- <&c71_1_memory_region>;
-};
-
-&c71_2 {
- status = "okay";
- mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
- memory-region = <&c71_2_dma_memory_region>,
- <&c71_2_memory_region>;
-};
-
&c71_3 {
status = "okay";
mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
@@ -1410,3 +1076,5 @@ &usb0 {
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
};
+
+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index c269e5b29b96..9e233400a648 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -46,126 +46,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa5100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss2_core0_memory_region: r5f-memory@a6100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa6100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss2_core1_memory_region: r5f-memory@a7100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa7100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_0_dma_memory_region: c71-dma-memory@a8000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8000000 0x00 0x100000>;
- no-map;
- };
-
- c71_0_memory_region: c71-memory@a8100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa8100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_1_dma_memory_region: c71-dma-memory@a9000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa9000000 0x00 0x100000>;
- no-map;
- };
-
- c71_1_memory_region: c71-memory@a9100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa9100000 0x00 0xf00000>;
- no-map;
- };
-
- c71_2_dma_memory_region: c71-dma-memory@aa000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xaa000000 0x00 0x100000>;
- no-map;
- };
-
- c71_2_memory_region: c71-memory@aa100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xaa100000 0x00 0xf00000>;
- no-map;
- };
};
evm_12v0: regulator-evm12v0 {
@@ -1069,228 +949,6 @@ &main_cpsw1_port1 {
status = "okay";
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
- interrupts = <428>;
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
- interrupts = <424>;
-
- mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
- interrupts = <420>;
-
- mbox_c71_0: mbox-c71-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c71_1: mbox-c71-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mailbox0_cluster5 {
- status = "okay";
- interrupts = <416>;
-
- mbox_c71_2: mbox-c71-2 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss1 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-&main_r5fss2 {
- ti,cluster-mode = <0>;
- status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&main_timer3 {
- status = "reserved";
-};
-
-&main_timer4 {
- status = "reserved";
-};
-
-&main_timer5 {
- status = "reserved";
-};
-
-&main_timer6 {
- status = "reserved";
-};
-
-&main_timer7 {
- status = "reserved";
-};
-
-&main_timer8 {
- status = "reserved";
-};
-
-&main_timer9 {
- status = "reserved";
-};
-
-&main_r5fss0_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
-};
-
-&main_r5fss2_core0 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
- memory-region = <&main_r5fss2_core0_dma_memory_region>,
- <&main_r5fss2_core0_memory_region>;
-};
-
-&main_r5fss2_core1 {
- status = "okay";
- mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
- memory-region = <&main_r5fss2_core1_dma_memory_region>,
- <&main_r5fss2_core1_memory_region>;
-};
-
-&c71_0 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
- memory-region = <&c71_0_dma_memory_region>,
- <&c71_0_memory_region>;
-};
-
-&c71_1 {
- status = "okay";
- mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
- memory-region = <&c71_1_dma_memory_region>,
- <&c71_1_memory_region>;
-};
-
-&c71_2 {
- status = "okay";
- mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
- memory-region = <&c71_2_dma_memory_region>,
- <&c71_2_memory_region>;
-};
-
&tscadc0 {
pinctrl-0 = <&mcu_adc0_pins_default>;
pinctrl-names = "default";
@@ -1619,3 +1277,5 @@ &mcasp0 {
0 0 0 0
>;
};
+
+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
new file mode 100644
index 000000000000..b5a4496a05bf
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4/J742S2 SoCs
+ *
+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss2_core0_memory_region: r5f-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss2_core1_memory_region: r5f-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a8000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a8100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa8100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a9000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa9000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a9100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa9100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_2_dma_memory_region: c71-dma-memory@aa000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xaa000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_2_memory_region: c71-memory@aa100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xaa100000 0x00 0xf00000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "okay";
+ interrupts = <424>;
+
+ mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster5 {
+ status = "okay";
+ interrupts = <416>;
+
+ mbox_c71_2: mbox-c71-2 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&main_timer3 {
+ status = "reserved";
+};
+
+&main_timer4 {
+ status = "reserved";
+};
+
+&main_timer5 {
+ status = "reserved";
+};
+
+&main_timer6 {
+ status = "reserved";
+};
+
+&main_timer7 {
+ status = "reserved";
+};
+
+&main_timer8 {
+ status = "reserved";
+};
+
+&main_timer9 {
+ status = "reserved";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss1_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&main_r5fss2 {
+ ti,cluster-mode = <0>;
+ status = "okay";
+};
+
+&main_r5fss2_core0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
+ memory-region = <&main_r5fss2_core0_dma_memory_region>,
+ <&main_r5fss2_core0_memory_region>;
+};
+
+&main_r5fss2_core1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
+ memory-region = <&main_r5fss2_core1_dma_memory_region>,
+ <&main_r5fss2_core1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
+
+&c71_2 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
+ memory-region = <&c71_2_dma_memory_region>,
+ <&c71_2_memory_region>;
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 12/33] arm64: dts: ti: k3-j784s4-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (10 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 11/33] arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 13/33] arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board level Beleswar Padhi
` (21 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J784S4 SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for J784S4 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
This patch only refactors the C71_3 remote processor related nodes into
the new dtsi. All other nodes have been refactored in the previous
commit as part of k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 27 +--------------
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 26 +-------------
.../dts/ti/k3-j784s4-ti-ipc-firmware.dtsi | 34 +++++++++++++++++++
3 files changed, 36 insertions(+), 51 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 5e187e86a5d9..9a12b639209b 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -60,18 +60,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- c71_3_dma_memory_region: c71-dma-memory@ab000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xab000000 0x00 0x100000>;
- no-map;
- };
-
- c71_3_memory_region: c71-memory@ab100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xab100000 0x00 0xf00000>;
- no-map;
- };
};
vusb_main: regulator-vusb-main5v0 {
@@ -520,13 +508,6 @@ &phy_gmii_sel {
bootph-all;
};
-&mailbox0_cluster5 {
- mbox_c71_3: mbox-c71-3 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
&wkup_uart0 {
/* Firmware usage */
status = "reserved";
@@ -795,13 +776,6 @@ &mcu_cpsw_port1 {
bootph-all;
};
-&c71_3 {
- status = "okay";
- mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
- memory-region = <&c71_3_dma_memory_region>,
- <&c71_3_memory_region>;
-};
-
&wkup_gpio_intr {
status = "okay";
};
@@ -1078,3 +1052,4 @@ &usb0 {
};
#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"
+#include "k3-j784s4-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index a84bde08f85e..6c7458c76f53 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -27,31 +27,7 @@ memory@80000000 {
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
-
- c71_3_dma_memory_region: c71-dma-memory@ab000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xab000000 0x00 0x100000>;
- no-map;
- };
-
- c71_3_memory_region: c71-memory@ab100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xab100000 0x00 0xf00000>;
- no-map;
- };
- };
-};
-
-&mailbox0_cluster5 {
- mbox_c71_3: mbox-c71-3 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
};
};
-&c71_3 {
- mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
- memory-region = <&c71_3_dma_memory_region>,
- <&c71_3_memory_region>;
- status = "okay";
-};
+#include "k3-j784s4-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..d19cb708379b
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4 SoCs
+ *
+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ c71_3_dma_memory_region: c71-dma-memory@ab000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xab000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_3_memory_region: c71-memory@ab100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xab100000 0x00 0xf00000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster5 {
+ mbox_c71_3: mbox-c71-3 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&c71_3 {
+ mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
+ memory-region = <&c71_3_dma_memory_region>,
+ <&c71_3_memory_region>;
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 13/33] arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (11 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 12/33] arm64: dts: ti: k3-j784s4-ti-ipc-firmware: " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 14/33] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (20 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level AM62P-J722S common SoC dtsi
files are incomplete without the memory carveouts and mailbox
assignments which are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 ++
arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 3 +++
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 +++
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 1 +
6 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
index bd6a00d13aea..5288c959f3c1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
@@ -205,6 +205,7 @@ mcu_r5fss0_core0: r5f@79000000 {
ti,atcm-enable = <0>;
ti,btcm-enable = <1>;
ti,loczrama = <0>;
+ status = "disabled";
};
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
index 6757b37a9de3..8612b45e665c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
@@ -136,6 +136,7 @@ wkup_r5fss0_core0: r5f@78000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 899da7896563..2755598fd1f5 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -725,6 +725,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0 {
@@ -735,6 +736,7 @@ &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_uart0 {
diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
index bf9b23df1da2..b329e4cb0c37 100644
--- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
+++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
@@ -515,6 +515,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0 {
@@ -525,6 +526,7 @@ &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
@@ -535,6 +537,7 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&c7x_0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 9d8abfa9afd2..2b9e007432a9 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -850,6 +850,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0 {
@@ -860,6 +861,7 @@ &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0 {
@@ -870,6 +872,7 @@ &main_r5fss0_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&c7x_0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index 993828872dfb..d57fdd38bdce 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -368,6 +368,7 @@ main_r5fss0_core0: r5f@78400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 14/33] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (12 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 13/33] arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 15/33] arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node Beleswar Padhi
` (19 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 J722S SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for J722S SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 155 +----------------
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 157 +----------------
.../boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 163 ++++++++++++++++++
3 files changed, 166 insertions(+), 309 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
index b329e4cb0c37..e1eaeb0015a2 100644
--- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
+++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
@@ -61,60 +61,6 @@ wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: c7x-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_1_memory_region: c7x-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x1c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vsys_5v0: regulator-1 {
@@ -453,103 +399,4 @@ &sdhci1 {
status = "okay";
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_wkup_r5_0: mbox-wkup-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
-
- mbox_main_r5_0: mbox-main-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c7x_1: mbox-c7x-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&c7x_0 {
- mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
-&c7x_1 {
- mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
- memory-region = <&c7x_1_dma_memory_region>,
- <&c7x_1_memory_region>;
- status = "okay";
-};
+#include "k3-j722s-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 2b9e007432a9..7ff738b40706 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -63,60 +63,6 @@ wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: c7x-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_1_memory_region: c7x-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x1c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vmain_pd: regulator-0 {
@@ -788,107 +734,6 @@ &sdhci1 {
bootph-all;
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_wkup_r5_0: mbox-wkup-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
-
- mbox_main_r5_0: mbox-main-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c7x_1: mbox-c7x-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&c7x_0 {
- mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
-&c7x_1 {
- mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
- memory-region = <&c7x_1_dma_memory_region>,
- <&c7x_1_memory_region>;
- status = "okay";
-};
-
&serdes_ln_ctrl {
idle-states = <J722S_SERDES0_LANE0_USB>,
<J722S_SERDES1_LANE0_PCIE0_LANE0>;
@@ -999,3 +844,5 @@ &mcu_i2c0 {
clock-frequency = <400000>;
status = "okay";
};
+
+#include "k3-j722s-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..442d78cf450a
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_0_memory_region: c7x-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_1_memory_region: c7x-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a5000000 {
+ reg = <0x00 0xa5000000 0x00 0x1c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+
+ mbox_wkup_r5_0: mbox-wkup-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+
+ mbox_mcu_r5_0: mbox-mcu-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+
+ mbox_c7x_0: mbox-c7x-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "okay";
+
+ mbox_main_r5_0: mbox-main-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c7x_1: mbox-c7x-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0 {
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&c7x_0 {
+ mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
+ memory-region = <&c7x_0_dma_memory_region>,
+ <&c7x_0_memory_region>;
+ status = "okay";
+};
+
+&c7x_1 {
+ mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
+ memory-region = <&c7x_1_dma_memory_region>,
+ <&c7x_1_memory_region>;
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 15/33] arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (13 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 14/33] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
` (18 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Add the label name 'reserved_memory' to the reserved-memory node in all
K3 AM6* board level dts files. This is done so that the node can be
referenced and extended to add more carveout entries as needed in future
refactoring patches.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 +-
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 2 +-
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 +-
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 +-
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 2 +-
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 +-
13 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index bc2289d74774..4e9a8921c95d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -189,7 +189,7 @@ reg_usb0_vbus: regulator-usb0-vbus {
regulator-name = "USB_1_EN";
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index 207ca00630d1..57a499759910 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -45,7 +45,7 @@ memory@80000000 {
bootph-all;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index bceead5e288e..3f4c6fe2999b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -39,7 +39,7 @@ memory@80000000 {
bootph-all;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
index daea18b0bc61..dbee37f38b7b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
@@ -39,7 +39,7 @@ memory@80000000 {
bootph-all;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
index a2fdc6741da2..6a04b370d149 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
@@ -147,7 +147,7 @@ reg_vsodimm: regulator-vsodimm {
regulator-name = "+V_SODIMM";
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 2755598fd1f5..c5b5b00c42b9 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -44,7 +44,7 @@ memory@80000000 {
bootph-pre-ram;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
index 13e1d36123d5..43ee16f171fd 100644
--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
@@ -36,7 +36,7 @@ memory@80000000 {
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index e01866372293..b9f472ed1d8e 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -42,7 +42,7 @@ memory@80000000 {
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 1deaa0be0085..37a5ab0b6b68 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -40,7 +40,7 @@ memory@80000000 {
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index a5cec9a07510..ad41479eba73 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -105,7 +105,7 @@ memory@80000000 {
device_type = "memory";
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index 828d815d6bdf..df05a124804c 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -20,7 +20,7 @@ memory@80000000 {
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index e5136ed94765..b86ee00d48f7 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -36,7 +36,7 @@ chosen {
stdout-path = "serial3:115200n8";
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index e589690c7c82..d48171212ac9 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -39,7 +39,7 @@ memory@80000000 {
<0x00000008 0x80000000 0x00000000 0x80000000>;
};
- reserved-memory {
+ reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (14 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 15/33] arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-18 19:39 ` Hiago De Franco
2025-08-21 6:06 ` Francesco Dolcini
2025-08-14 22:38 ` [PATCH 17/33] arm64: dts: ti: k3-am62p-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (17 subsequent siblings)
33 siblings, 2 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Francesco Dolcini, Emanuele Ghidoli,
Parth Pancholi, Jo_o Paulo Gon_alves
The wkup_r5fss0_core0_memory_region is used to store the text/data
sections of the Device Manager (DM) firmware itself and is necessary for
platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
for allocating the Virtio buffers needed for IPC with the DM core which
could be optional. The labels were incorrectly used in the
k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
Currently, only mailbox node is enabled with FIFO assignment. However,
there are no users of the enabled mailboxes. Add the missing carveouts
for WKUP and MCU R5F remote processors, and enable those by associating
to the above carveout and mailboxes. This config aligns with other AM62P
boards and can be refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Cc: Parth Pancholi <parth.pancholi@toradex.com>
Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
Requesting for a review/test.
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
index 6a04b370d149..0687debf3bbb 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
@@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
no-map;
};
- wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
+ mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b800000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b900000 0x00 0xf00000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c800000 0x00 0x100000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0x01e00000>;
no-map;
@@ -848,6 +866,28 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
};
};
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
&main0_alert {
temperature = <95000>;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 ` [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
@ 2025-08-18 19:39 ` Hiago De Franco
2025-08-21 6:06 ` Francesco Dolcini
1 sibling, 0 replies; 57+ messages in thread
From: Hiago De Franco @ 2025-08-18 19:39 UTC (permalink / raw)
To: Beleswar Padhi
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Emanuele Ghidoli, Parth Pancholi,
Jo_o Paulo Gon_alves
On Fri, Aug 15, 2025 at 04:08:22AM +0530, Beleswar Padhi wrote:
> The wkup_r5fss0_core0_memory_region is used to store the text/data
> sections of the Device Manager (DM) firmware itself and is necessary for
> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
> for allocating the Virtio buffers needed for IPC with the DM core which
> could be optional. The labels were incorrectly used in the
> k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
>
> Currently, only mailbox node is enabled with FIFO assignment. However,
> there are no users of the enabled mailboxes. Add the missing carveouts
> for WKUP and MCU R5F remote processors, and enable those by associating
> to the above carveout and mailboxes. This config aligns with other AM62P
> boards and can be refactored out later.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Verdin AM62P
Thanks!
Best regards,
Hiago.
> ---
> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> Cc: Parth Pancholi <parth.pancholi@toradex.com>
> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
> Requesting for a review/test.
>
> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
> 1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> index 6a04b370d149..0687debf3bbb 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> @@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
> no-map;
> };
>
> - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b900000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9c800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0x9c900000 0x00 0x01e00000>;
> no-map;
> @@ -848,6 +866,28 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
> };
> };
>
> +&wkup_r5fss0 {
> + status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> + status = "okay";
> +};
> +
> +&mcu_r5fss0 {
> + status = "okay";
> +};
> +
> +&mcu_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
> + memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> + <&mcu_r5fss0_core0_memory_region>;
> + status = "okay";
> +};
> +
> &main0_alert {
> temperature = <95000>;
> };
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 ` [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
2025-08-18 19:39 ` Hiago De Franco
@ 2025-08-21 6:06 ` Francesco Dolcini
2025-08-22 16:39 ` Beleswar Prasad Padhi
1 sibling, 1 reply; 57+ messages in thread
From: Francesco Dolcini @ 2025-08-21 6:06 UTC (permalink / raw)
To: Beleswar Padhi
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Emanuele Ghidoli, Parth Pancholi,
Jo_o Paulo Gon_alves
On Fri, Aug 15, 2025 at 04:08:22AM +0530, Beleswar Padhi wrote:
> The wkup_r5fss0_core0_memory_region is used to store the text/data
> sections of the Device Manager (DM) firmware itself and is necessary for
> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
> for allocating the Virtio buffers needed for IPC with the DM core which
> could be optional. The labels were incorrectly used in the
> k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
>
> Currently, only mailbox node is enabled with FIFO assignment. However,
> there are no users of the enabled mailboxes. Add the missing carveouts
> for WKUP and MCU R5F remote processors, and enable those by associating
> to the above carveout and mailboxes. This config aligns with other AM62P
> boards and can be refactored out later.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> Cc: Parth Pancholi <parth.pancholi@toradex.com>
> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
> Requesting for a review/test.
>
> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
> 1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> index 6a04b370d149..0687debf3bbb 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> @@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
> no-map;
> };
>
> - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
Node name should be generic, `memory@9b900000` ?
this applies in multiple patches in this series
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b900000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9c800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0x9c900000 0x00 0x01e00000>;
> no-map;
> @@ -848,6 +866,28 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
> };
> };
>
> +&wkup_r5fss0 {
> + status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> + status = "okay";
> +};
> +
> +&mcu_r5fss0 {
> + status = "okay";
> +};
> +
> +&mcu_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
> + memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> + <&mcu_r5fss0_core0_memory_region>;
> + status = "okay";
> +};
> +
> &main0_alert {
> temperature = <95000>;
> };
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-21 6:06 ` Francesco Dolcini
@ 2025-08-22 16:39 ` Beleswar Prasad Padhi
2025-08-23 16:43 ` Francesco Dolcini
0 siblings, 1 reply; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 16:39 UTC (permalink / raw)
To: Francesco Dolcini
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Emanuele Ghidoli, Parth Pancholi,
Jo_o Paulo Gon_alves
On 8/21/2025 11:36 AM, Francesco Dolcini wrote:
> On Fri, Aug 15, 2025 at 04:08:22AM +0530, Beleswar Padhi wrote:
>> The wkup_r5fss0_core0_memory_region is used to store the text/data
>> sections of the Device Manager (DM) firmware itself and is necessary for
>> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
>> for allocating the Virtio buffers needed for IPC with the DM core which
>> could be optional. The labels were incorrectly used in the
>> k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
>>
>> Currently, only mailbox node is enabled with FIFO assignment. However,
>> there are no users of the enabled mailboxes. Add the missing carveouts
>> for WKUP and MCU R5F remote processors, and enable those by associating
>> to the above carveout and mailboxes. This config aligns with other AM62P
>> boards and can be refactored out later.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
>> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
>> Cc: Parth Pancholi <parth.pancholi@toradex.com>
>> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
>> Requesting for a review/test.
>>
>> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
>> 1 file changed, 41 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>> index 6a04b370d149..0687debf3bbb 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>> @@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
>> no-map;
>> };
>>
>> - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
>> + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
>> + compatible = "shared-dma-pool";
>> + reg = <0x00 0x9b800000 0x00 0x100000>;
>> + no-map;
>> + };
>> +
>> + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
> Node name should be generic, `memory@9b900000` ?
Humm, that memory is reserved and has the 'no-map' property. So it
technically is only used by the node which references it (a particular
rproc in this case), and never used by Linux for any allocations. So it
is not generic memory per say...
So I was inclined for putting the specific node name which uses the
carveout in the label. What do you think?
>
> this applies in multiple patches in this series
>
>
>> + compatible = "shared-dma-pool";
>> + reg = <0x00 0x9b900000 0x00 0xf00000>;
>> + no-map;
>> + };
>> +
>> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
>> + compatible = "shared-dma-pool";
>> + reg = <0x00 0x9c800000 0x00 0x100000>;
>> + no-map;
>> + };
>> +
>> + wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
>> compatible = "shared-dma-pool";
>> reg = <0x00 0x9c900000 0x00 0x01e00000>;
>> no-map;
>> @@ -848,6 +866,28 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
>> };
>> };
>>
>> +&wkup_r5fss0 {
>> + status = "okay";
>> +};
>> +
>> +&wkup_r5fss0_core0 {
>> + mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
>> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
>> + <&wkup_r5fss0_core0_memory_region>;
>> + status = "okay";
>> +};
>> +
>> +&mcu_r5fss0 {
>> + status = "okay";
>> +};
>> +
>> +&mcu_r5fss0_core0 {
>> + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
>> + memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
>> + <&mcu_r5fss0_core0_memory_region>;
>> + status = "okay";
>> +};
>> +
>> &main0_alert {
>> temperature = <95000>;
>> };
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-22 16:39 ` Beleswar Prasad Padhi
@ 2025-08-23 16:43 ` Francesco Dolcini
2025-08-25 4:39 ` Beleswar Prasad Padhi
0 siblings, 1 reply; 57+ messages in thread
From: Francesco Dolcini @ 2025-08-23 16:43 UTC (permalink / raw)
To: Beleswar Prasad Padhi
Cc: Francesco Dolcini, nm, vigneshr, kristo, robh, krzk+dt, conor+dt,
afd, u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel, Francesco Dolcini, Emanuele Ghidoli,
Parth Pancholi, Jo_o Paulo Gon_alves
On Fri, Aug 22, 2025 at 10:09:48PM +0530, Beleswar Prasad Padhi wrote:
>
> On 8/21/2025 11:36 AM, Francesco Dolcini wrote:
> > On Fri, Aug 15, 2025 at 04:08:22AM +0530, Beleswar Padhi wrote:
> > > The wkup_r5fss0_core0_memory_region is used to store the text/data
> > > sections of the Device Manager (DM) firmware itself and is necessary for
> > > platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
> > > for allocating the Virtio buffers needed for IPC with the DM core which
> > > could be optional. The labels were incorrectly used in the
> > > k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
> > >
> > > Currently, only mailbox node is enabled with FIFO assignment. However,
> > > there are no users of the enabled mailboxes. Add the missing carveouts
> > > for WKUP and MCU R5F remote processors, and enable those by associating
> > > to the above carveout and mailboxes. This config aligns with other AM62P
> > > boards and can be refactored out later.
> > >
> > > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > > ---
> > > Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
> > > Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> > > Cc: Parth Pancholi <parth.pancholi@toradex.com>
> > > Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
> > > Requesting for a review/test.
> > >
> > > arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
> > > 1 file changed, 41 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> > > index 6a04b370d149..0687debf3bbb 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> > > +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
> > > @@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
> > > no-map;
> > > };
> > > - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> > > + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
> > > + compatible = "shared-dma-pool";
> > > + reg = <0x00 0x9b800000 0x00 0x100000>;
> > > + no-map;
> > > + };
> > > +
> > > + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
> > Node name should be generic, `memory@9b900000` ?
>
>
> Humm, that memory is reserved and has the 'no-map' property. So it
> technically is only used by the node which references it (a particular
> rproc in this case), and never used by Linux for any allocations. So it
> is not generic memory per say...
>
> So I was inclined for putting the specific node name which uses the
> carveout in the label. What do you think?
My understanding is that the node name must be generic, as required by
the DT specification. What matters is that this is memory, not what is used
for.
So it should be something like
mcu_r5fss0_core0_dma_memory: memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b800000 0x00 0x100000>;
no-map;
};
Francesco
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
2025-08-23 16:43 ` Francesco Dolcini
@ 2025-08-25 4:39 ` Beleswar Prasad Padhi
0 siblings, 0 replies; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-25 4:39 UTC (permalink / raw)
To: Francesco Dolcini
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Emanuele Ghidoli, Parth Pancholi,
Jo_o Paulo Gon_alves
On 23/08/25 22:13, Francesco Dolcini wrote:
> On Fri, Aug 22, 2025 at 10:09:48PM +0530, Beleswar Prasad Padhi wrote:
>> On 8/21/2025 11:36 AM, Francesco Dolcini wrote:
>>> On Fri, Aug 15, 2025 at 04:08:22AM +0530, Beleswar Padhi wrote:
>>>> The wkup_r5fss0_core0_memory_region is used to store the text/data
>>>> sections of the Device Manager (DM) firmware itself and is necessary for
>>>> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
>>>> for allocating the Virtio buffers needed for IPC with the DM core which
>>>> could be optional. The labels were incorrectly used in the
>>>> k3-am62p-verdin.dtsi file. Correct the firmware memory region label.
>>>>
>>>> Currently, only mailbox node is enabled with FIFO assignment. However,
>>>> there are no users of the enabled mailboxes. Add the missing carveouts
>>>> for WKUP and MCU R5F remote processors, and enable those by associating
>>>> to the above carveout and mailboxes. This config aligns with other AM62P
>>>> boards and can be refactored out later.
>>>>
>>>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>>>> ---
>>>> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
>>>> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
>>>> Cc: Parth Pancholi <parth.pancholi@toradex.com>
>>>> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
>>>> Requesting for a review/test.
>>>>
>>>> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++++++++++++++++++++-
>>>> 1 file changed, 41 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>>>> index 6a04b370d149..0687debf3bbb 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
>>>> @@ -162,7 +162,25 @@ secure_ddr: optee@9e800000 {
>>>> no-map;
>>>> };
>>>> - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
>>>> + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
>>>> + compatible = "shared-dma-pool";
>>>> + reg = <0x00 0x9b800000 0x00 0x100000>;
>>>> + no-map;
>>>> + };
>>>> +
>>>> + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
>>> Node name should be generic, `memory@9b900000` ?
>>
>> Humm, that memory is reserved and has the 'no-map' property. So it
>> technically is only used by the node which references it (a particular
>> rproc in this case), and never used by Linux for any allocations. So it
>> is not generic memory per say...
>>
>> So I was inclined for putting the specific node name which uses the
>> carveout in the label. What do you think?
> My understanding is that the node name must be generic, as required by
> the DT specification. What matters is that this is memory, not what is used
> for.
Sorry, I misinterpreted node name with label. I will fix this in v3
Will wait for any other comments on v2:
https://lore.kernel.org/all/20250823160901.2177841-1-b-padhi@ti.com/
Thanks,
Beleswar
>
>
> So it should be something like
>
>
> mcu_r5fss0_core0_dma_memory: memory@9c900000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0x9b800000 0x00 0x100000>;
> no-map;
> };
>
>
> Francesco
>
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 17/33] arm64: dts: ti: k3-am62p-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (15 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 16/33] arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
` (16 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 AM62P SoCs have multiple programmable remote processors like
R5Fs. The TI SDKs for AM62P SoCs offer sample firmwares which could be
run on these cores to demonstrate an "echo" IPC test. Those firmware
require certain memory carveouts to be reserved from system memory,
timers to be reserved, and certain mailbox configurations for interrupt
based messaging. These configurations could be different for a different
firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi | 60 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 +------------
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 54 +----------------
3 files changed, 64 insertions(+), 92 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..5c0c42648cb5
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62P SoCs
+ *
+ * Copyright (C) 2023-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b800000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b900000 0x00 0xf00000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+
+ mbox_mcu_r5_0: mbox-mcu-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
index 0687debf3bbb..e2ab98e65fd5 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
@@ -848,46 +848,6 @@ &epwm2 {
status = "disabled";
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
&main0_alert {
temperature = <95000>;
};
@@ -1466,3 +1426,5 @@ &wkup_uart0 {
uart-has-rtscts;
status = "disabled";
};
+
+#include "k3-am62p-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index c5b5b00c42b9..42886ecf1521 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -49,18 +49,6 @@ reserved_memory: reserved-memory {
#size-cells = <2>;
ranges;
- mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b800000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b900000 0x00 0xf00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
@@ -699,46 +687,6 @@ partition@3fc0000 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -810,3 +758,5 @@ &epwm1 {
pinctrl-0 = <&main_epwm1_pins_default>;
status = "okay";
};
+
+#include "k3-am62p-ti-ipc-firmware.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (16 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 17/33] arm64: dts: ti: k3-am62p-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-18 19:37 ` Hiago De Franco
2025-08-21 6:12 ` Francesco Dolcini
2025-08-14 22:38 ` [PATCH 19/33] arm64: dts: ti: k3-am62-pocketbeagle2: " Beleswar Padhi
` (15 subsequent siblings)
33 siblings, 2 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Francesco Dolcini, Hiago De Franco,
Jo_o Paulo Gon_alves, Stefan Eichenberger, Max Krummenacher,
Andrejs Cainikovs
The wkup_r5fss0_core0_memory_region is used to store the text/data
sections of the Device Manager (DM) firmware itself and is necessary for
platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
for allocating the Virtio buffers needed for IPC with the DM core which
could be optional. The labels were incorrectly used in the
k3-am62-verdin.dtsi file. Correct the firmware memory region label.
Currently, only mailbox node is enabled with FIFO assignment for a
single M4F remote core. However, there are no users of the enabled
mailboxes. Add the missing carveouts for WKUP R5F and MCU M4F remote
processors, and enable those by associating to the above carveout and
mailboxes. This config aligns with other AM62 boards and can be
refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: Hiago De Franco <hiago.franco@toradex.com>
Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
Cc: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Requesting for review/test of this patch
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 43 +++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index 4e9a8921c95d..fba6f5c8d099 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -206,7 +206,25 @@ secure_ddr: optee@9e800000 {
no-map;
};
- wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cb00000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cc00000 0x00 0xe00000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9da00000 0x00 0x100000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
@@ -1321,6 +1339,29 @@ mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
+
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_m4fss {
+ mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ status = "okay";
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
/* Verdin CAN_1 */
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 ` [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
@ 2025-08-18 19:37 ` Hiago De Franco
2025-08-21 6:12 ` Francesco Dolcini
1 sibling, 0 replies; 57+ messages in thread
From: Hiago De Franco @ 2025-08-18 19:37 UTC (permalink / raw)
To: Beleswar Padhi
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Hiago De Franco, Jo_o Paulo Gon_alves,
Stefan Eichenberger, Max Krummenacher, Andrejs Cainikovs
Hello,
On Fri, Aug 15, 2025 at 04:08:24AM +0530, Beleswar Padhi wrote:
> The wkup_r5fss0_core0_memory_region is used to store the text/data
> sections of the Device Manager (DM) firmware itself and is necessary for
> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
> for allocating the Virtio buffers needed for IPC with the DM core which
> could be optional. The labels were incorrectly used in the
> k3-am62-verdin.dtsi file. Correct the firmware memory region label.
>
> Currently, only mailbox node is enabled with FIFO assignment for a
> single M4F remote core. However, there are no users of the enabled
> mailboxes. Add the missing carveouts for WKUP R5F and MCU M4F remote
> processors, and enable those by associating to the above carveout and
> mailboxes. This config aligns with other AM62 boards and can be
> refactored out later.
Thanks for the patch. I was actually preparing to send the same changes.
This is relevant for us because previously we used a DTS overlay to add
the remoteproc functionality, but we also want this enabled in U-Boot.
By adding it to the DTB, it can later be synced with U-Boot so we can
use it there as well.
I tested it on our board, and it works fine in both the kernel and the
bootloader.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Verdin AM62
Best regards,
Hiago.
> ---
> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
> Cc: Hiago De Franco <hiago.franco@toradex.com>
> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
> Cc: Stefan Eichenberger <stefan.eichenberger@toradex.com>
> Cc: Max Krummenacher <max.krummenacher@toradex.com>
> Cc: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> Requesting for review/test of this patch
>
> arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 43 +++++++++++++++++++++-
> 1 file changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> index 4e9a8921c95d..fba6f5c8d099 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> @@ -206,7 +206,25 @@ secure_ddr: optee@9e800000 {
> no-map;
> };
>
> - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
> + mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9cb00000 0x00 0x100000>;
> + no-map;
> + };
> +
> + mcu_m4fss_memory_region: m4f-memory@9cc00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9cc00000 0x00 0xe00000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9da00000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0x9db00000 0x00 0xc00000>;
> no-map;
> @@ -1321,6 +1339,29 @@ mbox_m4_0: mbox-m4-0 {
> ti,mbox-rx = <0 0 0>;
> ti,mbox-tx = <1 0 0>;
> };
> +
> + mbox_r5_0: mbox-r5-0 {
> + ti,mbox-rx = <2 0 0>;
> + ti,mbox-tx = <3 0 0>;
> + };
> +};
> +
> +&mcu_m4fss {
> + mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
> + memory-region = <&mcu_m4fss_dma_memory_region>,
> + <&mcu_m4fss_memory_region>;
> + status = "okay";
> +};
> +
> +&wkup_r5fss0 {
> + status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> /* Verdin CAN_1 */
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 ` [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
2025-08-18 19:37 ` Hiago De Franco
@ 2025-08-21 6:12 ` Francesco Dolcini
2025-08-22 16:46 ` Beleswar Prasad Padhi
1 sibling, 1 reply; 57+ messages in thread
From: Francesco Dolcini @ 2025-08-21 6:12 UTC (permalink / raw)
To: Beleswar Padhi
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Hiago De Franco, Jo_o Paulo Gon_alves,
Stefan Eichenberger, Max Krummenacher, Andrejs Cainikovs
On Fri, Aug 15, 2025 at 04:08:24AM +0530, Beleswar Padhi wrote:
> The wkup_r5fss0_core0_memory_region is used to store the text/data
> sections of the Device Manager (DM) firmware itself and is necessary for
> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
> for allocating the Virtio buffers needed for IPC with the DM core which
> could be optional. The labels were incorrectly used in the
> k3-am62-verdin.dtsi file. Correct the firmware memory region label.
>
> Currently, only mailbox node is enabled with FIFO assignment for a
> single M4F remote core. However, there are no users of the enabled
> mailboxes. Add the missing carveouts for WKUP R5F and MCU M4F remote
> processors, and enable those by associating to the above carveout and
> mailboxes. This config aligns with other AM62 boards and can be
> refactored out later.
Are these memory ranges fine with 512MB DDR memory?
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
2025-08-21 6:12 ` Francesco Dolcini
@ 2025-08-22 16:46 ` Beleswar Prasad Padhi
0 siblings, 0 replies; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 16:46 UTC (permalink / raw)
To: Francesco Dolcini
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Francesco Dolcini, Hiago De Franco, Jo_o Paulo Gon_alves,
Stefan Eichenberger, Max Krummenacher, Andrejs Cainikovs
On 8/21/2025 11:42 AM, Francesco Dolcini wrote:
> On Fri, Aug 15, 2025 at 04:08:24AM +0530, Beleswar Padhi wrote:
>> The wkup_r5fss0_core0_memory_region is used to store the text/data
>> sections of the Device Manager (DM) firmware itself and is necessary for
>> platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
>> for allocating the Virtio buffers needed for IPC with the DM core which
>> could be optional. The labels were incorrectly used in the
>> k3-am62-verdin.dtsi file. Correct the firmware memory region label.
>>
>> Currently, only mailbox node is enabled with FIFO assignment for a
>> single M4F remote core. However, there are no users of the enabled
>> mailboxes. Add the missing carveouts for WKUP R5F and MCU M4F remote
>> processors, and enable those by associating to the above carveout and
>> mailboxes. This config aligns with other AM62 boards and can be
>> refactored out later.
> Are these memory ranges fine with 512MB DDR memory?
Yes, they are.
DDR memory range: 0x80000000 - 0xA0000000
Carveout range: 0x9CB00000 - 0x9E700000
Thanks,
Beleswar
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 19/33] arm64: dts: ti: k3-am62-pocketbeagle2: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (17 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 18/33] arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 20/33] arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level Beleswar Padhi
` (14 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Robert Nelson
The wkup_r5fss0_core0_memory_region is used to store the text/data
sections of the Device Manager (DM) firmware itself and is necessary for
platform boot. Whereas the wkup_r5fss0_core0_dma_memory_region is used
for allocating the Virtio buffers needed for IPC with the DM core which
could be optional. The labels were incorrectly used in the
k3-am62-pocketbeagle2.dts file. Correct the firmware memory region label
Currently, only mailbox node is enabled with FIFO assignment for a
single M4F remote core. Add the missing carveouts for WKUP R5F remote
processor, and enable that by associating to the above carveout and
mailbox. This config aligns with other AM62 boards and can be
refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Robert Nelson <robertcnelson@gmail.com>
Requesting for review/test of this patch
.../boot/dts/ti/k3-am62-pocketbeagle2.dts | 24 ++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
index 2e4cf65ee323..df2e1b0e74a1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
@@ -78,7 +78,13 @@ secure_ddr: optee@9e800000 {
no-map;
};
- wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9da00000 0x00 0x100000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
@@ -297,6 +303,11 @@ mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
+
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
};
&main_uart0 {
@@ -356,6 +367,17 @@ &mcu_m4fss {
status = "okay";
};
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 20/33] arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (18 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 19/33] arm64: dts: ti: k3-am62-pocketbeagle2: " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-21 6:03 ` Francesco Dolcini
2025-08-14 22:38 ` [PATCH 21/33] arm64: dts: ti: k3-am62: Enable remote processors at " Beleswar Padhi
` (13 subsequent siblings)
33 siblings, 1 reply; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Mailbox nodes defined in the top-level AM62x SoC dtsi files are
incomplete and may not be functional unless they are extended with a
chosen interrupt and connection to a remote processor.
As the remote processors depend on memory nodes which are only known at
the board integration level, these nodes should only be enabled when
provided with the above information.
Disable the Mailbox nodes in the dtsi files and only enable the ones
that are actually used on a given board.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts | 1 +
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 029380dc1a35..40fb3c9e674c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -808,6 +808,7 @@ mailbox0_cluster0: mailbox@29000000 {
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
ecap0: pwm@23100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
index df2e1b0e74a1..2140e0cdec85 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
@@ -299,6 +299,7 @@ &epwm2 {
};
&mailbox0_cluster0 {
+ status = "okay";
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index fba6f5c8d099..1c44d17281dd 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -1335,6 +1335,7 @@ &main_i2c3 {
};
&mailbox0_cluster0 {
+ status = "okay";
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 20/33] arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level
2025-08-14 22:38 ` [PATCH 20/33] arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level Beleswar Padhi
@ 2025-08-21 6:03 ` Francesco Dolcini
0 siblings, 0 replies; 57+ messages in thread
From: Francesco Dolcini @ 2025-08-21 6:03 UTC (permalink / raw)
To: Beleswar Padhi
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, afd, u-kumar1,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel
On Fri, Aug 15, 2025 at 04:08:26AM +0530, Beleswar Padhi wrote:
> Mailbox nodes defined in the top-level AM62x SoC dtsi files are
> incomplete and may not be functional unless they are extended with a
> chosen interrupt and connection to a remote processor.
>
> As the remote processors depend on memory nodes which are only known at
> the board integration level, these nodes should only be enabled when
> provided with the above information.
>
> Disable the Mailbox nodes in the dtsi files and only enable the ones
> that are actually used on a given board.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts | 1 +
> arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index 029380dc1a35..40fb3c9e674c 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -808,6 +808,7 @@ mailbox0_cluster0: mailbox@29000000 {
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> ecap0: pwm@23100000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
> index df2e1b0e74a1..2140e0cdec85 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
> @@ -299,6 +299,7 @@ &epwm2 {
> };
>
> &mailbox0_cluster0 {
> + status = "okay";
add new line
> mbox_m4_0: mbox-m4-0 {
> ti,mbox-rx = <0 0 0>;
> ti,mbox-tx = <1 0 0>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> index fba6f5c8d099..1c44d17281dd 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> @@ -1335,6 +1335,7 @@ &main_i2c3 {
> };
>
> &mailbox0_cluster0 {
> + status = "okay";
add new line
> mbox_m4_0: mbox-m4-0 {
> ti,mbox-rx = <0 0 0>;
> ti,mbox-tx = <1 0 0>;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 57+ messages in thread
* [PATCH 21/33] arm64: dts: ti: k3-am62: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (19 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 20/33] arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 22/33] arm64: dts: ti: k3-am62-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (12 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level AM62x SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
index 10e6b5c08619..dcd22ff487ec 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
@@ -407,4 +407,5 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index 6549b7efa656..75aed3a88284 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -128,6 +128,7 @@ wkup_r5fss0_core0: r5f@78000000 {
ti,sci = <&dmsc>;
ti,sci-dev-id = <121>;
ti,sci-proc-ids = <0x01 0xff>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
index 43ee16f171fd..03b8e246d8c2 100644
--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
@@ -506,6 +506,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
&usbss0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 22/33] arm64: dts: ti: k3-am62-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (20 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 21/33] arm64: dts: ti: k3-am62: Enable remote processors at " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 23/33] arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level Beleswar Padhi
` (11 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 AM62 SoCs have multiple programmable remote processors like
R5F, M4F etc. The TI SDKs for AM62 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am62-phycore-som.dtsi | 44 +---------------
.../boot/dts/ti/k3-am62-pocketbeagle2.dts | 45 +---------------
.../boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi | 52 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 33 +-----------
.../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 46 +---------------
5 files changed, 59 insertions(+), 161 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
index dcd22ff487ec..34b2e8d6bf80 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
@@ -52,18 +52,6 @@ rtos_ipc_memory_region: ipc-memories@9c800000 {
no-map;
};
- mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cb00000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@9cc00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cc00000 0x00 0xe00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9da00000 0x00 0x100000>;
@@ -245,20 +233,6 @@ cpsw3g_phy1: ethernet-phy@1 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
&main_pktdma {
bootph-all;
};
@@ -364,13 +338,6 @@ i2c_som_rtc: rtc@52 {
};
};
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
@@ -399,13 +366,4 @@ &sdhci0 {
status = "okay";
};
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
+#include "k3-am62-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
index 2140e0cdec85..e634abe9e8e6 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts
@@ -54,18 +54,6 @@ linux,cma {
linux,cma-default;
};
- mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cb00000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@9cc00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cc00000 0x00 0xe00000>;
- no-map;
- };
-
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
@@ -298,19 +286,6 @@ &epwm2 {
pinctrl-0 = <&epwm2_pins_default>;
};
-&mailbox0_cluster0 {
- status = "okay";
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -361,24 +336,6 @@ &main_i2c2 {
status = "okay";
};
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
@@ -542,3 +499,5 @@ ldo4_reg: ldo4 {
};
};
};
+
+#include "k3-am62-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..9376ae91a17f
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62 SoCs
+ *
+ * Copyright (C) 2021-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cb00000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cc00000 0x00 0xe00000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+
+ mbox_m4_0: mbox-m4-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_m4fss {
+ mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ status = "okay";
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index 1c44d17281dd..fd83dbc9f37b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -1334,37 +1334,6 @@ &main_i2c3 {
status = "disabled";
};
-&mailbox0_cluster0 {
- status = "okay";
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
/* Verdin CAN_1 */
&main_mcan0 {
pinctrl-names = "default";
@@ -1548,3 +1517,5 @@ &wkup_uart0 {
pinctrl-0 = <&pinctrl_wkup_uart0>;
status = "disabled";
};
+
+#include "k3-am62-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
index 03b8e246d8c2..ec2685144558 100644
--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
@@ -58,18 +58,6 @@ linux,cma {
linux,cma-default;
};
- mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cb00000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@9cc00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9cc00000 0x00 0xe00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9da00000 0x00 0x100000>;
@@ -477,38 +465,6 @@ cpsw3g_phy0: ethernet-phy@0 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
&usbss0 {
bootph-all;
status = "okay";
@@ -601,3 +557,5 @@ &epwm1 {
pinctrl-0 = <&main_epwm1_pins_default>;
status = "okay";
};
+
+#include "k3-am62-ti-ipc-firmware.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 23/33] arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (21 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 22/33] arm64: dts: ti: k3-am62-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 24/33] arm64: dts: ti: k3-am62a: Enable remote processors at " Beleswar Padhi
` (10 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Mailbox nodes defined in the top-level AM62A SoC dtsi files are
incomplete and may not be functional unless they are extended with a
chosen interrupt and connection to a remote processor.
As the remote processors depend on memory nodes which are only known at
the board integration level, these nodes should only be enabled when
provided with the above information.
Disable the Mailbox nodes in the dtsi files and only enable the ones
that are actually used on a given board.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 9cad79d7bbc1..d5f018768981 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -804,6 +804,7 @@ mailbox0_cluster0: mailbox@29000000 {
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster1: mailbox@29010000 {
@@ -813,6 +814,7 @@ mailbox0_cluster1: mailbox@29010000 {
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster2: mailbox@29020000 {
@@ -822,6 +824,7 @@ mailbox0_cluster2: mailbox@29020000 {
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster3: mailbox@29030000 {
@@ -831,6 +834,7 @@ mailbox0_cluster3: mailbox@29030000 {
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
main_mcan0: can@20701000 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 24/33] arm64: dts: ti: k3-am62a: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (22 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 23/33] arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 25/33] arm64: dts: ti: k3-am62a-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (9 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level AM62A SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 ++
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 1 +
5 files changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
index ee961ced7208..d22caa7c346b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
@@ -197,6 +197,7 @@ mcu_r5fss0_core0: r5f@79000000 {
ti,sci = <&dmsc>;
ti,sci-dev-id = <9>;
ti,sci-proc-ids = <0x03 0xff>;
+ status = "disabled";
};
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index 57a499759910..3108e9b0c804 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -406,6 +406,7 @@ &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&ospi0 {
@@ -444,4 +445,5 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 9ef1c829a9df..23877dadc98d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -127,6 +127,7 @@ wkup_r5fss0_core0: r5f@78000000 {
ti,sci = <&dmsc>;
ti,sci-dev-id = <121>;
ti,sci-proc-ids = <0x01 0xff>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index 3f4c6fe2999b..7ebcfe8edfe1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -870,6 +870,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
};
&mcu_r5fss0 {
@@ -880,6 +881,7 @@ &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
};
&c7x_0 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
index dbee37f38b7b..41860ac42f3c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
@@ -586,6 +586,7 @@ &wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
bootph-pre-ram;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 25/33] arm64: dts: ti: k3-am62a-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (23 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 24/33] arm64: dts: ti: k3-am62a: Enable remote processors at " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 26/33] arm64: dts: ti: k3-am64: Enable remote processors at board level Beleswar Padhi
` (8 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 AM62A SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for AM62A SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am62a-phycore-som.dtsi | 90 +----------------
.../boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi | 98 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 92 +----------------
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 76 +-------------
4 files changed, 102 insertions(+), 254 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index 3108e9b0c804..44c73ed637da 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -59,30 +59,6 @@ linux,cma {
linux,cma-default;
};
- c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99800000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: c7x-memory@99900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99900000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b800000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b900000 0x00 0xf00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
@@ -209,13 +185,6 @@ opp-1400000000 {
};
};
-&c7x_0 {
- mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
@@ -246,33 +215,6 @@ &fss {
status = "okay";
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -388,27 +330,6 @@ &main_pktdma {
bootph-all;
};
-/* main_rti4 is used by C7x DSP */
-&main_rti4 {
- status = "reserved";
-};
-
-/* main_timer2 is used by C7x DSP */
-&main_timer2 {
- status = "reserved";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
@@ -437,13 +358,4 @@ &sdhci0 {
status = "okay";
};
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
+#include "k3-am62a-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..91583cd23b12
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62A SoCs
+ *
+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x99800000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_0_memory_region: c7x-memory@99900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x99900000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b800000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b900000 0x00 0xf00000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+
+ mbox_c7x_0: mbox-c7x-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+
+ mbox_mcu_r5_0: mbox-mcu-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&c7x_0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
+ memory-region = <&c7x_0_dma_memory_region>,
+ <&c7x_0_memory_region>;
+ status = "okay";
+};
+
+/* main_rti4 is used by C7x DSP */
+&main_rti4 {
+ status = "reserved";
+};
+
+/* main_timer2 is used by C7x DSP */
+&main_timer2 {
+ status = "reserved";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index 7ebcfe8edfe1..ede03f449d65 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -53,30 +53,6 @@ linux,cma {
linux,cma-default;
};
- c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99800000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: c7x-memory@99900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99900000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b800000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b900000 0x00 0xf00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
@@ -713,11 +689,6 @@ &main_uart1 {
status = "reserved";
};
-/* main_timer2 is used by C7x DSP */
-&main_timer2 {
- status = "reserved";
-};
-
&usbss0 {
status = "okay";
ti,vbus-divider;
@@ -835,67 +806,6 @@ &epwm1 {
status = "okay";
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&c7x_0 {
- mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
-/* main_rti4 is used by C7x DSP */
-&main_rti4 {
- status = "reserved";
-};
-
&fss {
status = "okay";
};
@@ -937,3 +847,5 @@ AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
>;
};
};
+
+#include "k3-am62a-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
index 41860ac42f3c..a57fc2362dfd 100644
--- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
@@ -58,30 +58,6 @@ secure_tfa_ddr: tfa@80000000 {
no-map;
};
- c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99800000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: c7x-memory@99900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x99900000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b800000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9b900000 0x00 0xf00000>;
- no-map;
- };
-
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
@@ -551,66 +527,16 @@ cpsw3g_phy1: ethernet-phy@3 {
};
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_r5_0: mbox-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
bootph-pre-ram;
};
-&mcu_r5fss0 {
- status = "okay";
-};
-
&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
firmware-name = "am62d-mcu-r5f0_0-fw";
- status = "okay";
};
&c7x_0 {
- mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
firmware-name = "am62d-c71_0-fw";
- status = "okay";
};
-/* main_rti4 is used by C7x DSP */
-&main_rti4 {
- status = "reserved";
-};
+#include "k3-am62a-ti-ipc-firmware.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 26/33] arm64: dts: ti: k3-am64: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (24 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 25/33] arm64: dts: ti: k3-am62a-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 27/33] arm64: dts: ti: k3-am642-sr-som: Add missing cfg for TI IPC Firmware Beleswar Padhi
` (7 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level AM64x SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 6 ++++++
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 12 ++++++++++++
6 files changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index c7e5da37486a..d872cc671094 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -921,6 +921,7 @@ main_r5fss0: r5fss@78000000 {
<0x78200000 0x00 0x78200000 0x08000>,
<0x78300000 0x00 0x78300000 0x08000>;
power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss0_core0: r5f@78000000 {
compatible = "ti,am64-r5f";
@@ -935,6 +936,7 @@ main_r5fss0_core0: r5f@78000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss0_core1: r5f@78200000 {
@@ -950,6 +952,7 @@ main_r5fss0_core1: r5f@78200000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
@@ -963,6 +966,7 @@ main_r5fss1: r5fss@78400000 {
<0x78600000 0x00 0x78600000 0x08000>,
<0x78700000 0x00 0x78700000 0x08000>;
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
main_r5fss1_core0: r5f@78400000 {
compatible = "ti,am64-r5f";
@@ -977,6 +981,7 @@ main_r5fss1_core0: r5f@78400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
main_r5fss1_core1: r5f@78600000 {
@@ -992,6 +997,7 @@ main_r5fss1_core1: r5f@78600000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index d9d491b12c33..03c46d74ebb5 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -349,28 +349,40 @@ &main_pktdma {
bootph-all;
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&mcu_m4fss {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index b9f472ed1d8e..7640c5efe9b8 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -764,28 +764,40 @@ mbox_m4_0: mbox-m4-0 {
};
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&mcu_m4fss {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 37a5ab0b6b68..fb8bd66f2f94 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -679,28 +679,40 @@ mbox_m4_0: mbox-m4-0 {
};
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&mcu_m4fss {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index ad41479eba73..81adae0a8e55 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -488,28 +488,40 @@ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* USB0_DRVVBUS.USB0_DRVVBUS */
};
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
/* SoC default UART console */
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index df05a124804c..40b619c9a6c9 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -167,28 +167,40 @@ mbox_m4_0: mbox-m4-0 {
};
};
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
+ status = "okay";
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
+ status = "okay";
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
+ status = "okay";
};
&ospi0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 27/33] arm64: dts: ti: k3-am642-sr-som: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (25 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 26/33] arm64: dts: ti: k3-am64: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 28/33] arm64: dts: ti: k3-am64-phycore-som: " Beleswar Padhi
` (6 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Josua Mayer, Logan Bristol, Matthias Schiffer
Currently, only R5F remote processors are enabled for k3-am642-sr SoMs,
whereas the M4F in MCU domain is disabled. Enable the M4F remote
processor at board level by reserving memory carveouts and assigning
mailboxes.
While at it, reserve the MAIN domain timers that are used by R5F remote
processors for ticks to avoid rproc crashes. This config aligns with
other AM64 boards and can be refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Josua Mayer <josua@solid-run.com>
Cc: Logan Bristol <logan.bristol@utexas.edu>
Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Requesting for review/test of this patch.
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 54 +++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index 81adae0a8e55..8cb61f831734 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -162,6 +162,24 @@ main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
+
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a5000000 {
+ reg = <0x00 0xa5000000 0x00 0x00800000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
vdd_mmc0: regulator-vdd-mmc0 {
@@ -291,6 +309,35 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
};
};
+&mailbox0_cluster6 {
+ status = "okay";
+
+ mbox_m4_0: mbox-m4-0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+};
+
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+ status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+ status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+ status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+ status = "reserved";
+};
+
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_default_pins>;
@@ -524,6 +571,13 @@ &main_r5fss1_core1 {
status = "okay";
};
+&mcu_m4fss {
+ mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ status = "okay";
+};
+
/* SoC default UART console */
&main_uart0 {
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 28/33] arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (26 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 27/33] arm64: dts: ti: k3-am642-sr-som: Add missing cfg for TI IPC Firmware Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 29/33] arm64: dts: ti: k3-am642-tqma64xxl: " Beleswar Padhi
` (5 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Wadim Egorov, Matt McKee, Garrett Giordano,
Nathan Morrisson, John Ma, Logan Bristol
The k3-am64-phycore SoM enables all R5F and M4F remote processors.
Reserve the MAIN domain timers that are used by R5F remote
processors for ticks to avoid rproc crashes. This config aligns with
other AM64 boards and can be refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Wadim Egorov <w.egorov@phytec.de>
Cc: Matt McKee <mmckee@phytec.com>
Cc: Garrett Giordano <ggiordano@phytec.com>
Cc: Nathan Morrisson <nmorrisson@phytec.com>
Cc: John Ma <jma@phytec.com>
Cc: Logan Bristol <logan.bristol@utexas.edu>
Requesting for review/test of this patch.
.../boot/dts/ti/k3-am64-phycore-som.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 03c46d74ebb5..1efd547b2ba6 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -275,6 +275,30 @@ mbox_m4_0: mbox-m4-0 {
};
};
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+ status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+ status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+ status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+ status = "reserved";
+};
+
+&main_r5fss0 {
+ status = "okay";
+};
+
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 29/33] arm64: dts: ti: k3-am642-tqma64xxl: Add missing cfg for TI IPC Firmware
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (27 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 28/33] arm64: dts: ti: k3-am64-phycore-som: " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 30/33] arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (4 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel, Matthias Schiffer
Currently, only R5F remote processors are enabled for k3-am642-tqma64xxl
whereas the M4F in MCU domain is disabled. Enable the M4F remote
processor at board level by reserving memory carveouts and assigning
mailboxes.
While at it, reserve the MAIN domain timers that are used by R5F remote
processors for ticks to avoid rproc crashes. This config aligns with
other AM64 boards and can be refactored out later.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Request for review/test of this patch.
.../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index 40b619c9a6c9..860b79aa5ef5 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -79,6 +79,18 @@ main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
no-map;
};
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
rtos_ipc_memory_region: ipc-memories@a5000000 {
reg = <0x00 0xa5000000 0x00 0x00800000>;
alignment = <0x1000>;
@@ -167,6 +179,26 @@ mbox_m4_0: mbox-m4-0 {
};
};
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+ status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+ status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+ status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+ status = "reserved";
+};
+
&main_r5fss0 {
status = "okay";
};
@@ -203,6 +235,13 @@ &main_r5fss1_core1 {
status = "okay";
};
+&mcu_m4fss {
+ mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ status = "okay";
+};
+
&ospi0 {
status = "okay";
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 30/33] arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (28 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 29/33] arm64: dts: ti: k3-am642-tqma64xxl: " Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 31/33] arm64: dts: ti: k3-am65: Enable remote processors at board level Beleswar Padhi
` (3 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 AM64 SoCs have multiple programmable remote processors like
R5F, M4F etc. The TI SDKs for AM64 SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am64-phycore-som.dtsi | 160 +----------------
.../boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi | 162 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 156 +----------------
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 156 +----------------
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 156 +----------------
.../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 156 +----------------
6 files changed, 172 insertions(+), 774 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 1efd547b2ba6..af0fed6124e2 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -52,60 +52,6 @@ main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
leds {
@@ -238,67 +184,6 @@ &cpsw_port1 {
status = "okay";
};
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster6 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
- status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
- status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
- status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
- status = "reserved";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -373,49 +258,6 @@ &main_pktdma {
bootph-all;
};
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1 {
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
@@ -451,3 +293,5 @@ adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
+
+#include "k3-am64-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..847495f76831
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM64 SoCs
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a5000000 {
+ reg = <0x00 0xa5000000 0x00 0x00800000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 2>;
+ ti,mbox-tx = <3 0 2>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 2>;
+ ti,mbox-tx = <3 0 2>;
+ };
+};
+
+&mailbox0_cluster6 {
+ status = "okay";
+
+ mbox_m4_0: mbox-m4-0 {
+ ti,mbox-rx = <0 0 2>;
+ ti,mbox-tx = <1 0 2>;
+ };
+};
+
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+ status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+ status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+ status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+ status = "reserved";
+};
+
+&main_r5fss0 {
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1 {
+ status = "okay";
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+ status = "okay";
+};
+
+&mcu_m4fss {
+ mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
+ memory-region = <&mcu_m4fss_dma_memory_region>,
+ <&mcu_m4fss_memory_region>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 7640c5efe9b8..05b7cdd25a8c 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -64,60 +64,6 @@ main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
evm_12v0: regulator-0 {
@@ -727,106 +673,6 @@ partition@3fc0000 {
};
};
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster6 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1 {
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
- status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
- status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
- status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
- status = "reserved";
-};
-
&serdes_ln_ctrl {
idle-states = <AM64_SERDES0_LANE0_PCIE0>;
};
@@ -890,3 +736,5 @@ &icssg1_iep0 {
pinctrl-names = "default";
pinctrl-0 = <&icssg1_iep0_pins_default>;
};
+
+#include "k3-am64-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index fb8bd66f2f94..cc1569a6519b 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -62,60 +62,6 @@ main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
vusb_main: regulator-0 {
@@ -642,106 +588,6 @@ partition@3fc0000 {
};
};
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster6 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1 {
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
- status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
- status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
- status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
- status = "reserved";
-};
-
&ecap0 {
status = "okay";
/* PWM is available on Pin 1 of header J3 */
@@ -755,3 +601,5 @@ &eqep0 {
pinctrl-names = "default";
pinctrl-0 = <&main_eqep0_pins_default>;
};
+
+#include "k3-am64-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index 8cb61f831734..ce23362b88c3 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -126,60 +126,6 @@ main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
vdd_mmc0: regulator-vdd-mmc0 {
@@ -281,63 +227,6 @@ ethernet_phy2: ethernet-phy@f {
};
};
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster6 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
- status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
- status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
- status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
- status = "reserved";
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_default_pins>;
@@ -535,49 +424,6 @@ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* USB0_DRVVBUS.USB0_DRVVBUS */
};
};
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1 {
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
/* SoC default UART console */
&main_uart0 {
pinctrl-names = "default";
@@ -656,3 +502,5 @@ &usbss0 {
ti,vbus-divider;
ti,usb2-only;
};
+
+#include "k3-am64-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
index 860b79aa5ef5..e752fc8b0a88 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
@@ -42,60 +42,6 @@ main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_m4fss_memory_region: m4f-memory@a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a5000000 {
- reg = <0x00 0xa5000000 0x00 0x00800000>;
- alignment = <0x1000>;
- no-map;
- };
};
reg_1v8: regulator-1v8 {
@@ -142,106 +88,6 @@ eeprom1: eeprom@54 {
};
};
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster6 {
- status = "okay";
-
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-};
-
-/* main_timer8 is used by r5f0-0 */
-&main_timer8 {
- status = "reserved";
-};
-
-/* main_timer9 is used by r5f0-1 */
-&main_timer9 {
- status = "reserved";
-};
-
-/* main_timer10 is used by r5f1-0 */
-&main_timer10 {
- status = "reserved";
-};
-
-/* main_timer11 is used by r5f1-1 */
-&main_timer11 {
- status = "reserved";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1 {
- status = "okay";
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
- status = "okay";
-};
-
-&mcu_m4fss {
- mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
- memory-region = <&mcu_m4fss_dma_memory_region>,
- <&mcu_m4fss_memory_region>;
- status = "okay";
-};
-
&ospi0 {
status = "okay";
pinctrl-names = "default";
@@ -315,3 +161,5 @@ AM64X_IOPAD(0x0008, PIN_INPUT, 0)
>;
};
};
+
+#include "k3-am64-ti-ipc-firmware.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 31/33] arm64: dts: ti: k3-am65: Enable remote processors at board level
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (29 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 30/33] arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 32/33] arm64: dts: ti: k3-am65-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
` (2 subsequent siblings)
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Remote Processors defined in top-level AM65x SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.
Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 6 ++++++
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 6 ++++++
3 files changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index b86ee00d48f7..6cd499ea53e7 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -602,16 +602,22 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+ status = "okay";
};
&mcu_rti1 {
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 7cf1f646500a..f6d9a5779918 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -408,6 +408,7 @@ mcu_r5fss0: r5fss@41000000 {
ranges = <0x41000000 0x00 0x41000000 0x20000>,
<0x41400000 0x00 0x41400000 0x20000>;
power-domains = <&k3_pds 129 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
mcu_r5fss0_core0: r5f@41000000 {
compatible = "ti,am654-r5f";
@@ -422,6 +423,7 @@ mcu_r5fss0_core0: r5f@41000000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
mcu_r5fss0_core1: r5f@41400000 {
@@ -437,6 +439,7 @@ mcu_r5fss0_core1: r5f@41400000 {
ti,atcm-enable = <1>;
ti,btcm-enable = <1>;
ti,loczrama = <1>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index d48171212ac9..e532ea0a22b2 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -541,16 +541,22 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
};
};
+&mcu_r5fss0 {
+ status = "okay";
+};
+
&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ status = "okay";
};
&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+ status = "okay";
};
&ospi0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 32/33] arm64: dts: ti: k3-am65-ti-ipc-firmware: Refactor IPC cfg into new dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (30 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 31/33] arm64: dts: ti: k3-am65: Enable remote processors at board level Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-14 22:38 ` [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode Beleswar Padhi
2025-08-15 5:49 ` [PATCH 00/33] Refactor TI IPC DT configs into dtsi Wadim Egorov
33 siblings, 0 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
The TI K3 AM65 SoCs have multiple programmable remote processors like
R5Fs. The TI SDKs for AM65 SoCs offer sample firmwares which could be
run on these cores to demonstrate an "echo" IPC test. Those firmware
require certain memory carveouts to be reserved from system memory,
timers to be reserved, and certain mailbox configurations for interrupt
based messaging. These configurations could be different for a different
firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
.../boot/dts/ti/k3-am65-iot2050-common.dtsi | 62 ++----------------
.../boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi | 64 +++++++++++++++++++
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 58 +----------------
3 files changed, 72 insertions(+), 112 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 6cd499ea53e7..19eb4a32e18d 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -59,24 +59,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
no-map;
};
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0 0xa1000000 0 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0 0xa1100000 0 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a2000000 {
- reg = <0x00 0xa2000000 0x00 0x00200000>;
- alignment = <0x1000>;
- no-map;
- };
-
/* To reserve the power-on(PON) reason for watchdog reset */
wdt_reset_memory_region: wdt-memory@a2200000 {
reg = <0x00 0xa2200000 0x00 0x1000>;
@@ -582,44 +564,6 @@ &pcie1_rc {
reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-tx = <1 0 0>;
- ti,mbox-rx = <0 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-tx = <1 0 0>;
- ti,mbox-rx = <0 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
- status = "okay";
-};
-
&mcu_rti1 {
memory-region = <&wdt_reset_memory_region>;
};
@@ -692,3 +636,9 @@ &mcu_r5fss0 {
/* lock-step mode not supported on iot2050 boards */
ti,cluster-mode = <0>;
};
+
+#include "k3-am65-ti-ipc-firmware.dtsi"
+
+&rtos_ipc_memory_region {
+ reg = <0x00 0xa2000000 0x00 0x00200000>;
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..514ec4c03056
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on AM65 SoCs
+ *
+ * Copyright (C) 2016-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa1000000 0 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa1100000 0 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a2000000 {
+ reg = <0x00 0xa2000000 0x00 0x00100000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-tx = <1 0 0>;
+ ti,mbox-rx = <0 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-tx = <1 0 0>;
+ ti,mbox-rx = <0 0 0>;
+ };
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ status = "okay";
+};
+
+&mcu_r5fss0_core1 {
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index e532ea0a22b2..adb7b8e6d52e 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -61,24 +61,6 @@ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
reg = <0 0xa0100000 0 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0 0xa1000000 0 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0 0xa1100000 0 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: ipc-memories@a2000000 {
- reg = <0x00 0xa2000000 0x00 0x00100000>;
- alignment = <0x1000>;
- no-map;
- };
};
gpio-keys {
@@ -521,44 +503,6 @@ &serdes1 {
status = "disabled";
};
-&mailbox0_cluster0 {
- status = "okay";
- interrupts = <436>;
-
- mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
- ti,mbox-tx = <1 0 0>;
- ti,mbox-rx = <0 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
- interrupts = <432>;
-
- mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
- ti,mbox-tx = <1 0 0>;
- ti,mbox-rx = <0 0 0>;
- };
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
- status = "okay";
-};
-
-&mcu_r5fss0_core1 {
- memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
- <&mcu_r5fss0_core1_memory_region>;
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
- status = "okay";
-};
-
&ospi0 {
status = "okay";
pinctrl-names = "default";
@@ -653,3 +597,5 @@ &dss {
&wkup_gpio0 {
bootph-all;
};
+
+#include "k3-am65-ti-ipc-firmware.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (31 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 32/33] arm64: dts: ti: k3-am65-ti-ipc-firmware: Refactor IPC cfg into new dtsi Beleswar Padhi
@ 2025-08-14 22:38 ` Beleswar Padhi
2025-08-15 2:41 ` Kumar, Udit
2025-08-15 15:48 ` Andrew Davis
2025-08-15 5:49 ` [PATCH 00/33] Refactor TI IPC DT configs into dtsi Wadim Egorov
33 siblings, 2 replies; 57+ messages in thread
From: Beleswar Padhi @ 2025-08-14 22:38 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, b-padhi, devicetree, linux-kernel,
linux-arm-kernel
Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
R5F cluster in the MCU domain which is configured for LockStep mode at
the moment. The necessary support to use MCU R5F cluster in split mode
was added in the bootloader. And the TI IPC firmware for the split
processors is already available public.
Therefore, Switch this R5F cluster to Split mode by default in all the
boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
gives out an extra general purpose R5F core free to run any applications
as required. Lockstep mode remains default in the SoC level dtsi, so
downstream board dts which do not use TI IPC Firmware config should not
be impacted by this switch.
Users who prefer to use the fault-tolerant lockstep mode with TI IPC
firmware config, can do that by setting `ti,cluster-mode` property to 1.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 +
.../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
index 8eff7bd2e771..ddf3cd899d0e 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
@@ -94,6 +94,7 @@ &main_timer2 {
&mcu_r5fss0 {
status = "okay";
+ ti,cluster-mode = <0>;
};
&mcu_r5fss0_core0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
index 5b3fa95aed76..57890a3b38a2 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
@@ -211,6 +211,7 @@ &main_timer15 {
};
&mcu_r5fss0 {
+ ti,cluster-mode = <0>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
index 40c9f2b64e7e..7ee8a8615246 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
@@ -179,6 +179,7 @@ &main_timer5 {
};
&mcu_r5fss0 {
+ ti,cluster-mode = <0>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
index b5a4496a05bf..e12fa55a4df0 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
@@ -254,6 +254,7 @@ &main_timer9 {
};
&mcu_r5fss0 {
+ ti,cluster-mode = <0>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 57+ messages in thread* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-14 22:38 ` [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode Beleswar Padhi
@ 2025-08-15 2:41 ` Kumar, Udit
2025-08-15 3:13 ` Nishanth Menon
2025-08-15 15:48 ` Andrew Davis
1 sibling, 1 reply; 57+ messages in thread
From: Kumar, Udit @ 2025-08-15 2:41 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel
On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
> R5F cluster in the MCU domain which is configured for LockStep mode at
> the moment. The necessary support to use MCU R5F cluster in split mode
> was added in the bootloader. And the TI IPC firmware for the split
> processors is already available public.
It will be better to mention sha id of bootloader with links, may be
below tear-line
> Therefore, Switch this R5F cluster to Split mode by default in all the
> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
> gives out an extra general purpose R5F core free to run any applications
> as required. Lockstep mode remains default in the SoC level dtsi, so
> downstream board dts which do not use TI IPC Firmware config should not
> be impacted by this switch.
>
> Users who prefer to use the fault-tolerant lockstep mode with TI IPC
> firmware config, can do that by setting `ti,cluster-mode` property to 1.
IMO, you need to change boot-loader as well for this,
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 +
> .../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 +
> 4 files changed, 4 insertions(+)
> [..]
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-15 2:41 ` Kumar, Udit
@ 2025-08-15 3:13 ` Nishanth Menon
0 siblings, 0 replies; 57+ messages in thread
From: Nishanth Menon @ 2025-08-15 3:13 UTC (permalink / raw)
To: Kumar, Udit
Cc: Beleswar Padhi, vigneshr, kristo, robh, krzk+dt, conor+dt, afd,
hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel
On 08:11-20250815, Kumar, Udit wrote:
>
> On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
> > Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
> > R5F cluster in the MCU domain which is configured for LockStep mode at
> > the moment. The necessary support to use MCU R5F cluster in split mode
> > was added in the bootloader. And the TI IPC firmware for the split
> > processors is already available public.
>
> It will be better to mention sha id of bootloader with links, may be below
> tear-line
In the commit message, let us stick to just what the kernel folks need
to know. Specifics of bootloader etc can belong to the diffstat -
unless the patch has direct relationship to the bootloader in some form
and we need to refer to that details in git log in the kernel (the
diffstat and discussion information is already on public-inbox if anyone
wants to do "deep research" :P ).
Device Tree is about describing hardware. Let us keep it to that.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-14 22:38 ` [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode Beleswar Padhi
2025-08-15 2:41 ` Kumar, Udit
@ 2025-08-15 15:48 ` Andrew Davis
2025-08-18 15:56 ` Kumar, Udit
2025-08-22 17:26 ` Beleswar Prasad Padhi
1 sibling, 2 replies; 57+ messages in thread
From: Andrew Davis @ 2025-08-15 15:48 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel
On 8/14/25 5:38 PM, Beleswar Padhi wrote:
> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
> R5F cluster in the MCU domain which is configured for LockStep mode at
> the moment. The necessary support to use MCU R5F cluster in split mode
> was added in the bootloader. And the TI IPC firmware for the split
> processors is already available public.
>
> Therefore, Switch this R5F cluster to Split mode by default in all the
> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
> gives out an extra general purpose R5F core free to run any applications
> as required. Lockstep mode remains default in the SoC level dtsi, so
> downstream board dts which do not use TI IPC Firmware config should not
> be impacted by this switch.
>
> Users who prefer to use the fault-tolerant lockstep mode with TI IPC
> firmware config, can do that by setting `ti,cluster-mode` property to 1.
What a user prefers and other configuration like that does not belong
in devicetree, which should only describe the hardware.
Configuration should be done using the normal methods, like kernel
cmdline, module params, ioctls, etc.. Maybe we can even set the mode
based on some signal in the firmware itself, like in the resource table.
Andrew
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 +
> .../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 +
> 4 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
> index 8eff7bd2e771..ddf3cd899d0e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
> @@ -94,6 +94,7 @@ &main_timer2 {
>
> &mcu_r5fss0 {
> status = "okay";
> + ti,cluster-mode = <0>;
> };
>
> &mcu_r5fss0_core0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
> index 5b3fa95aed76..57890a3b38a2 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
> @@ -211,6 +211,7 @@ &main_timer15 {
> };
>
> &mcu_r5fss0 {
> + ti,cluster-mode = <0>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
> index 40c9f2b64e7e..7ee8a8615246 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
> @@ -179,6 +179,7 @@ &main_timer5 {
> };
>
> &mcu_r5fss0 {
> + ti,cluster-mode = <0>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> index b5a4496a05bf..e12fa55a4df0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> @@ -254,6 +254,7 @@ &main_timer9 {
> };
>
> &mcu_r5fss0 {
> + ti,cluster-mode = <0>;
> status = "okay";
> };
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-15 15:48 ` Andrew Davis
@ 2025-08-18 15:56 ` Kumar, Udit
2025-08-22 17:26 ` Beleswar Prasad Padhi
1 sibling, 0 replies; 57+ messages in thread
From: Kumar, Udit @ 2025-08-18 15:56 UTC (permalink / raw)
To: Andrew Davis, Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt,
conor+dt
Cc: hnagalla, jm, devicetree, linux-kernel, linux-arm-kernel,
Udit Kumar
Hello Andrew,
On 8/15/2025 9:18 PM, Andrew Davis wrote:
> On 8/14/25 5:38 PM, Beleswar Padhi wrote:
>> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
>> R5F cluster in the MCU domain which is configured for LockStep mode at
>> the moment. The necessary support to use MCU R5F cluster in split mode
>> was added in the bootloader. And the TI IPC firmware for the split
>> processors is already available public.
>>
>> Therefore, Switch this R5F cluster to Split mode by default in all the
>> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
>> gives out an extra general purpose R5F core free to run any applications
>> as required. Lockstep mode remains default in the SoC level dtsi, so
>> downstream board dts which do not use TI IPC Firmware config should not
>> be impacted by this switch.
>>
>> Users who prefer to use the fault-tolerant lockstep mode with TI IPC
>> firmware config, can do that by setting `ti,cluster-mode` property to 1.
>
> What a user prefers and other configuration like that does not belong
> in devicetree, which should only describe the hardware.
>
> Configuration should be done using the normal methods, like kernel
> cmdline, module params, ioctls, etc.. Maybe we can even set the mode
> based on some signal in the firmware itself, like in the resource table.
>
Agreed configuration part ,
but as default, what this CPU should be lock-step or cluster-mode
> Andrew
>
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> [..]
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-15 15:48 ` Andrew Davis
2025-08-18 15:56 ` Kumar, Udit
@ 2025-08-22 17:26 ` Beleswar Prasad Padhi
2025-08-22 17:31 ` Andrew Davis
1 sibling, 1 reply; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 17:26 UTC (permalink / raw)
To: Andrew Davis, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel
Hi Andrew, Nishanth,
On 8/15/2025 9:18 PM, Andrew Davis wrote:
> On 8/14/25 5:38 PM, Beleswar Padhi wrote:
>> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
>> R5F cluster in the MCU domain which is configured for LockStep mode at
>> the moment. The necessary support to use MCU R5F cluster in split mode
>> was added in the bootloader. And the TI IPC firmware for the split
>> processors is already available public.
>>
>> Therefore, Switch this R5F cluster to Split mode by default in all the
>> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
>> gives out an extra general purpose R5F core free to run any applications
>> as required. Lockstep mode remains default in the SoC level dtsi, so
>> downstream board dts which do not use TI IPC Firmware config should not
>> be impacted by this switch.
>>
>> Users who prefer to use the fault-tolerant lockstep mode with TI IPC
>> firmware config, can do that by setting `ti,cluster-mode` property to 1.
>
> What a user prefers and other configuration like that does not belong
> in devicetree, which should only describe the hardware.
>
> Configuration should be done using the normal methods, like kernel
> cmdline, module params, ioctls, etc.. Maybe we can even set the mode
> based on some signal in the firmware itself, like in the resource table.
Agreed with your point.. But that is going to take a long time to implement
+ upstream. I interpreted from [0] that it was okay to enable this split
mode
once we had refactored the firmware related nodes in an overlay? (Since
people can swap out the dtsi if they don't need the firmware config)
Nishanth/Andrew,
Please advise if this patch is okay or should be dropped in the revision...
[0]: https://lore.kernel.org/all/20250523114822.jrv73frz2wbzdd6d@falsify/
Thanks,
Beleswar
>
> Andrew
>
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 +
>> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 +
>> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 +
>> .../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 +
>> 4 files changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>> index 8eff7bd2e771..ddf3cd899d0e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>> @@ -94,6 +94,7 @@ &main_timer2 {
>> &mcu_r5fss0 {
>> status = "okay";
>> + ti,cluster-mode = <0>;
>> };
>> &mcu_r5fss0_core0 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>> index 5b3fa95aed76..57890a3b38a2 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>> @@ -211,6 +211,7 @@ &main_timer15 {
>> };
>> &mcu_r5fss0 {
>> + ti,cluster-mode = <0>;
>> status = "okay";
>> };
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>> index 40c9f2b64e7e..7ee8a8615246 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>> @@ -179,6 +179,7 @@ &main_timer5 {
>> };
>> &mcu_r5fss0 {
>> + ti,cluster-mode = <0>;
>> status = "okay";
>> };
>> diff --git
>> a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>> index b5a4496a05bf..e12fa55a4df0 100644
>> ---
>> a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>> +++
>> b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>> @@ -254,6 +254,7 @@ &main_timer9 {
>> };
>> &mcu_r5fss0 {
>> + ti,cluster-mode = <0>;
>> status = "okay";
>> };
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode
2025-08-22 17:26 ` Beleswar Prasad Padhi
@ 2025-08-22 17:31 ` Andrew Davis
0 siblings, 0 replies; 57+ messages in thread
From: Andrew Davis @ 2025-08-22 17:31 UTC (permalink / raw)
To: Beleswar Prasad Padhi, nm, vigneshr, kristo, robh, krzk+dt,
conor+dt
Cc: u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel
On 8/22/25 12:26 PM, Beleswar Prasad Padhi wrote:
> Hi Andrew, Nishanth,
>
> On 8/15/2025 9:18 PM, Andrew Davis wrote:
>> On 8/14/25 5:38 PM, Beleswar Padhi wrote:
>>> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a
>>> R5F cluster in the MCU domain which is configured for LockStep mode at
>>> the moment. The necessary support to use MCU R5F cluster in split mode
>>> was added in the bootloader. And the TI IPC firmware for the split
>>> processors is already available public.
>>>
>>> Therefore, Switch this R5F cluster to Split mode by default in all the
>>> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This
>>> gives out an extra general purpose R5F core free to run any applications
>>> as required. Lockstep mode remains default in the SoC level dtsi, so
>>> downstream board dts which do not use TI IPC Firmware config should not
>>> be impacted by this switch.
>>>
>>> Users who prefer to use the fault-tolerant lockstep mode with TI IPC
>>> firmware config, can do that by setting `ti,cluster-mode` property to 1.
>>
>> What a user prefers and other configuration like that does not belong
>> in devicetree, which should only describe the hardware.
>>
>> Configuration should be done using the normal methods, like kernel
>> cmdline, module params, ioctls, etc.. Maybe we can even set the mode
>> based on some signal in the firmware itself, like in the resource table.
>
>
> Agreed with your point.. But that is going to take a long time to implement
> + upstream. I interpreted from [0] that it was okay to enable this split mode
> once we had refactored the firmware related nodes in an overlay? (Since
> people can swap out the dtsi if they don't need the firmware config)
>
> Nishanth/Andrew,
> Please advise if this patch is okay or should be dropped in the revision...
>
I would drop this and send it later as part of its own series, it doesn't belong
in this series which should be refactors only, this patch is changing things, no
reason to mixed the two types of patches.
Andrew
> [0]: https://lore.kernel.org/all/20250523114822.jrv73frz2wbzdd6d@falsify/
>
> Thanks,
> Beleswar
>
>>
>> Andrew
>>
>>>
>>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>>> ---
>>> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 +
>>> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 +
>>> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 +
>>> .../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 +
>>> 4 files changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>>> index 8eff7bd2e771..ddf3cd899d0e 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>>> @@ -94,6 +94,7 @@ &main_timer2 {
>>> &mcu_r5fss0 {
>>> status = "okay";
>>> + ti,cluster-mode = <0>;
>>> };
>>> &mcu_r5fss0_core0 {
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>>> index 5b3fa95aed76..57890a3b38a2 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>>> @@ -211,6 +211,7 @@ &main_timer15 {
>>> };
>>> &mcu_r5fss0 {
>>> + ti,cluster-mode = <0>;
>>> status = "okay";
>>> };
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>>> index 40c9f2b64e7e..7ee8a8615246 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>>> @@ -179,6 +179,7 @@ &main_timer5 {
>>> };
>>> &mcu_r5fss0 {
>>> + ti,cluster-mode = <0>;
>>> status = "okay";
>>> };
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>>> index b5a4496a05bf..e12fa55a4df0 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>>> @@ -254,6 +254,7 @@ &main_timer9 {
>>> };
>>> &mcu_r5fss0 {
>>> + ti,cluster-mode = <0>;
>>> status = "okay";
>>> };
>>
^ permalink raw reply [flat|nested] 57+ messages in thread
* Re: [PATCH 00/33] Refactor TI IPC DT configs into dtsi
2025-08-14 22:38 [PATCH 00/33] Refactor TI IPC DT configs into dtsi Beleswar Padhi
` (32 preceding siblings ...)
2025-08-14 22:38 ` [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode Beleswar Padhi
@ 2025-08-15 5:49 ` Wadim Egorov
2025-08-22 17:00 ` Beleswar Prasad Padhi
33 siblings, 1 reply; 57+ messages in thread
From: Wadim Egorov @ 2025-08-15 5:49 UTC (permalink / raw)
To: Beleswar Padhi, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel, Robert Nelson, Jo_o Paulo Gon_alves,
Parth Pancholi, Emanuele Ghidoli, Francesco Dolcini,
Matthias Schiffer, Logan Bristol, Josua Mayer, John Ma,
Nathan Morrisson, Garrett Giordano, Matt McKee, Andrejs Cainikovs,
Max Krummenacher, Stefan Eichenberger, Hiago De Franco
Hi Beleswar,
On 8/15/25 1:38 AM, Beleswar Padhi wrote:
> The TI K3 SoCs have multiple programmable remote processors like
> R5F, M4F, C6x/C7x etc. The TI SDKs for these SoCs offer sample firmware
> which could be run on these cores to demonstrate an "echo" IPC test.
> Those firmware require certain memory carveouts to be reserved from
> system memory, timers to be reserved, and certain mailbox
> configurations for interrupt based messaging. These configurations
> could be different for a different firmware.
>
> Refactor these firmware dependent configurations from board level DTS
> into a dtsi for now. This dtsi for TI IPC firmware is board-independent
> and can be applied to all boards from the same SoC Family. This gets
> rid of code duplication (>50%) and allows more freedom for users
> developing custom firmware (or no firmware) to utilize system resources
> better; easily by swapping out this dtsi. To maintain backward
> compatibility, the dtsi is included in all existing boards.
I remember I asked myself the same question on how to represent the
relation between used FW and memory carveouts+others when adding our
first K3 board.
This change comes quite late so I am wondering if there is any other
motivation besides code reduction / more freedom for custom FW behind it?
>
> DTSI vs Overlay:
> 1. I chose DTSI over overlay as both the ways required including the
> refactored file in existing board-level files to maintain backward
> compatibility, so didn't see the advantage of using overlays here.
> 2. If we do down the overlay path, existing board-level file names have
> to be changed to indicate they are without the IPC support; so that
> they can be combined with the overlay to generate the same-named DTBs.
> For example:
> k3-am69-sk.dtb := k3-am69-sk-sans-ipc.dtb k3-j784s4-ti-ipc-firmware.dtbo
> ~~~~~~~~
While it's a good idea to keep backward compatibility for older devices,
have you considered using overlays for new/upcoming devices?
Regards,
Wadim
>
> I am not sure if this renaming of files is ideal?
>
> Testing Done:
> 1. Tested Boot across all TI K3 EVM/SK boards.
> 2. Tested IPC on all TI K3 J7* EVM/SK boards (& AM62x SK).
> 3. Tested that each patch in the series generates no new warnings/errors.
> 4. HELP needed: Boot/IPC test on vendor boards utilizing TI K3 SoCs.
>
> Note for vendors:
> 1. This series streamlines all boards(external vendors included) to use the
> TI IPC DTSI config. In the process, several new nodes related to remote
> processors have been added/enabled in the final DTS. Need vendors help in
> performing a sanity boot & IPC functionality test with the changes included
> (More info in indivdual patch)
> 2. If you wish to not include all of the TI IPC DTSI configs and leave the
> board files as it is currently, just let me know so and I will drop those
> patches in the next revision.
> Cc: Robert Nelson <robertcnelson@gmail.com>
> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
> Cc: Parth Pancholi <parth.pancholi@toradex.com>
> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
> Cc: Logan Bristol <logan.bristol@utexas.edu>
> Cc: Josua Mayer <josua@solid-run.com>
> Cc: John Ma <jma@phytec.com>
> Cc: Nathan Morrisson <nmorrisson@phytec.com>
> Cc: Garrett Giordano <ggiordano@phytec.com>
> Cc: Matt McKee <mmckee@phytec.com>
> Cc: Wadim Egorov <w.egorov@phytec.de>
> Cc: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> Cc: Max Krummenacher <max.krummenacher@toradex.com>
> Cc: Stefan Eichenberger <stefan.eichenberger@toradex.com>
> Cc: Hiago De Franco <hiago.franco@toradex.com>
>
> Thanks,
> Beleswar
>
> Beleswar Padhi (33):
> arm64: dts: ti: k3-j7200: Enable remote processors at board level
> arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout
> locations"
> Revert "arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x
> carveout locations"
> arm64: dts: ti: k3-j721e: Enable remote processors at board level
> arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI IPC FW
> arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-j721s2: Enable remote processors at board level
> arm64: dts: ti: k3-j721s2-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-j784s4-j742s2: Enable remote processors at board
> level
> arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC
> cfg into new dtsi
> arm64: dts: ti: k3-j784s4-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board
> level
> arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node
> arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
> arm64: dts: ti: k3-am62p-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
> arm64: dts: ti: k3-am62-pocketbeagle2: Add missing cfg for TI IPC
> Firmware
> arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level
> arm64: dts: ti: k3-am62: Enable remote processors at board level
> arm64: dts: ti: k3-am62-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level
> arm64: dts: ti: k3-am62a: Enable remote processors at board level
> arm64: dts: ti: k3-am62a-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am64: Enable remote processors at board level
> arm64: dts: ti: k3-am642-sr-som: Add missing cfg for TI IPC Firmware
> arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC
> Firmware
> arm64: dts: ti: k3-am642-tqma64xxl: Add missing cfg for TI IPC
> Firmware
> arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-am65: Enable remote processors at board level
> arm64: dts: ti: k3-am65-ti-ipc-firmware: Refactor IPC cfg into new
> dtsi
> arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to
> Split-mode
>
> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 1 +
> .../boot/dts/ti/k3-am62-phycore-som.dtsi | 43 +--
> .../boot/dts/ti/k3-am62-pocketbeagle2.dts | 36 +-
> .../boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi | 52 +++
> arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 31 +-
> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 +
> arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 1 +
> .../boot/dts/ti/k3-am62a-phycore-som.dtsi | 90 +----
> .../boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi | 98 +++++
> arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 92 +----
> arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 77 +---
> .../dts/ti/k3-am62p-j722s-common-mcu.dtsi | 1 +
> .../dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 1 +
> .../boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi | 60 +++
> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++-
> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 54 +--
> .../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 47 +--
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 6 +
> .../boot/dts/ti/k3-am64-phycore-som.dtsi | 124 +------
> .../boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi | 162 ++++++++
> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 146 +-------
> arch/arm64/boot/dts/ti/k3-am642-sk.dts | 146 +-------
> arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 92 +----
> .../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 107 +-----
> .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 58 +--
> arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 3 +
> .../boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi | 64 ++++
> .../arm64/boot/dts/ti/k3-am654-base-board.dts | 54 +--
> .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 152 +-------
> .../boot/dts/ti/k3-am68-phycore-som.dtsi | 235 +-----------
> arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 229 +-----------
> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 348 +----------------
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 115 +-----
> .../boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 131 +++++++
> .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 229 +-----------
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 +
> .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +
> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 266 +------------
> arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 266 +------------
> .../boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 289 ++++++++++++++
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 +
> .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +
> arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 231 +-----------
> .../dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 250 +++++++++++++
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 154 +-------
> arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 1 +
> .../boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 163 ++++++++
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 26 +-
> .../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 337 +----------------
> .../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 9 +
> .../k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 3 +
> ...-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 351 ++++++++++++++++++
> .../dts/ti/k3-j784s4-ti-ipc-firmware.dtsi | 34 ++
> 57 files changed, 1820 insertions(+), 3717 deletions(-)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
>
^ permalink raw reply [flat|nested] 57+ messages in thread* Re: [PATCH 00/33] Refactor TI IPC DT configs into dtsi
2025-08-15 5:49 ` [PATCH 00/33] Refactor TI IPC DT configs into dtsi Wadim Egorov
@ 2025-08-22 17:00 ` Beleswar Prasad Padhi
0 siblings, 0 replies; 57+ messages in thread
From: Beleswar Prasad Padhi @ 2025-08-22 17:00 UTC (permalink / raw)
To: Wadim Egorov, nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: afd, u-kumar1, hnagalla, jm, devicetree, linux-kernel,
linux-arm-kernel, Robert Nelson, Jo_o Paulo Gon_alves,
Parth Pancholi, Emanuele Ghidoli, Francesco Dolcini,
Matthias Schiffer, Logan Bristol, Josua Mayer, John Ma,
Nathan Morrisson, Garrett Giordano, Matt McKee, Andrejs Cainikovs,
Max Krummenacher, Stefan Eichenberger, Hiago De Franco
Hi Wadim,
On 8/15/2025 11:19 AM, Wadim Egorov wrote:
> Hi Beleswar,
>
> On 8/15/25 1:38 AM, Beleswar Padhi wrote:
>> The TI K3 SoCs have multiple programmable remote processors like
>> R5F, M4F, C6x/C7x etc. The TI SDKs for these SoCs offer sample firmware
>> which could be run on these cores to demonstrate an "echo" IPC test.
>> Those firmware require certain memory carveouts to be reserved from
>> system memory, timers to be reserved, and certain mailbox
>> configurations for interrupt based messaging. These configurations
>> could be different for a different firmware.
>>
>> Refactor these firmware dependent configurations from board level DTS
>> into a dtsi for now. This dtsi for TI IPC firmware is board-independent
>> and can be applied to all boards from the same SoC Family. This gets
>> rid of code duplication (>50%) and allows more freedom for users
>> developing custom firmware (or no firmware) to utilize system resources
>> better; easily by swapping out this dtsi. To maintain backward
>> compatibility, the dtsi is included in all existing boards.
>
> I remember I asked myself the same question on how to represent the
> relation between used FW and memory carveouts+others when adding our
> first K3 board.
>
> This change comes quite late so I am wondering if there is any other
> motivation besides code reduction / more freedom for custom FW behind it?
Sorry for the delay in response,
The main motivation is to provide more freedom for custom firmwares.
Besides, we were observing some bugs where peripherals like mailbox,
rprocs are enabled at the SoC level dtsi without the proper IRQ/carveout
assignment respectively. This was failing the device probe and throwing
out errors. So we put up this cleanup series to make things more
maintainable & modular.
>
>
>>
>> DTSI vs Overlay:
>> 1. I chose DTSI over overlay as both the ways required including the
>> refactored file in existing board-level files to maintain backward
>> compatibility, so didn't see the advantage of using overlays here.
>> 2. If we do down the overlay path, existing board-level file names have
>> to be changed to indicate they are without the IPC support; so that
>> they can be combined with the overlay to generate the same-named DTBs.
>> For example:
>> k3-am69-sk.dtb := k3-am69-sk-sans-ipc.dtb k3-j784s4-ti-ipc-firmware.dtbo
>> ~~~~~~~~
>
> While it's a good idea to keep backward compatibility for older
> devices, have you considered using overlays for new/upcoming devices?
Yes, and this is the first step towards it. IMO, future devices should put
everything firmware related as an overlay. This allows the same base
board to work with multiple firmwares, even at runtime!
Thanks,
Beleswar
>
> Regards,
> Wadim
>
>>
>> I am not sure if this renaming of files is ideal?
>>
>> Testing Done:
>> 1. Tested Boot across all TI K3 EVM/SK boards.
>> 2. Tested IPC on all TI K3 J7* EVM/SK boards (& AM62x SK).
>> 3. Tested that each patch in the series generates no new
>> warnings/errors.
>> 4. HELP needed: Boot/IPC test on vendor boards utilizing TI K3 SoCs.
>>
>> Note for vendors:
>> 1. This series streamlines all boards(external vendors included) to
>> use the
>> TI IPC DTSI config. In the process, several new nodes related to remote
>> processors have been added/enabled in the final DTS. Need vendors
>> help in
>> performing a sanity boot & IPC functionality test with the changes
>> included
>> (More info in indivdual patch)
>> 2. If you wish to not include all of the TI IPC DTSI configs and
>> leave the
>> board files as it is currently, just let me know so and I will drop
>> those
>> patches in the next revision.
>> Cc: Robert Nelson <robertcnelson@gmail.com>
>> Cc: Jo_o Paulo Gon_alves <joao.goncalves@toradex.com>
>> Cc: Parth Pancholi <parth.pancholi@toradex.com>
>> Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
>> Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
>> Cc: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
>> Cc: Logan Bristol <logan.bristol@utexas.edu>
>> Cc: Josua Mayer <josua@solid-run.com>
>> Cc: John Ma <jma@phytec.com>
>> Cc: Nathan Morrisson <nmorrisson@phytec.com>
>> Cc: Garrett Giordano <ggiordano@phytec.com>
>> Cc: Matt McKee <mmckee@phytec.com>
>> Cc: Wadim Egorov <w.egorov@phytec.de>
>> Cc: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
>> Cc: Max Krummenacher <max.krummenacher@toradex.com>
>> Cc: Stefan Eichenberger <stefan.eichenberger@toradex.com>
>> Cc: Hiago De Franco <hiago.franco@toradex.com>
>>
>> Thanks,
>> Beleswar
>>
>> Beleswar Padhi (33):
>> arm64: dts: ti: k3-j7200: Enable remote processors at board level
>> arm64: dts: ti: k3-j7200-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout
>> locations"
>> Revert "arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x
>> carveout locations"
>> arm64: dts: ti: k3-j721e: Enable remote processors at board level
>> arm64: dts: ti: k3-j721e-beagleboneai64: Add missing cfg for TI
>> IPC FW
>> arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-j721s2: Enable remote processors at board level
>> arm64: dts: ti: k3-j721s2-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-j784s4-j742s2: Enable remote processors at board
>> level
>> arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC
>> cfg into new dtsi
>> arm64: dts: ti: k3-j784s4-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board
>> level
>> arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node
>> arm64: dts: ti: k3-am62p-verdin: Add missing cfg for TI IPC Firmware
>> arm64: dts: ti: k3-am62p-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am62-verdin: Add missing cfg for TI IPC Firmware
>> arm64: dts: ti: k3-am62-pocketbeagle2: Add missing cfg for TI IPC
>> Firmware
>> arm64: dts: ti: k3-am62: Enable Mailbox nodes at the board level
>> arm64: dts: ti: k3-am62: Enable remote processors at board level
>> arm64: dts: ti: k3-am62-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am62a: Enable Mailbox nodes at the board level
>> arm64: dts: ti: k3-am62a: Enable remote processors at board level
>> arm64: dts: ti: k3-am62a-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am64: Enable remote processors at board level
>> arm64: dts: ti: k3-am642-sr-som: Add missing cfg for TI IPC Firmware
>> arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC
>> Firmware
>> arm64: dts: ti: k3-am642-tqma64xxl: Add missing cfg for TI IPC
>> Firmware
>> arm64: dts: ti: k3-am64-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-am65: Enable remote processors at board level
>> arm64: dts: ti: k3-am65-ti-ipc-firmware: Refactor IPC cfg into new
>> dtsi
>> arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to
>> Split-mode
>>
>> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 1 +
>> .../boot/dts/ti/k3-am62-phycore-som.dtsi | 43 +--
>> .../boot/dts/ti/k3-am62-pocketbeagle2.dts | 36 +-
>> .../boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi | 52 +++
>> arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 31 +-
>> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 1 +
>> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 +
>> arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 1 +
>> .../boot/dts/ti/k3-am62a-phycore-som.dtsi | 90 +----
>> .../boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi | 98 +++++
>> arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 1 +
>> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 92 +----
>> arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 77 +---
>> .../dts/ti/k3-am62p-j722s-common-mcu.dtsi | 1 +
>> .../dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 1 +
>> .../boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi | 60 +++
>> arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 42 ++-
>> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 54 +--
>> .../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 47 +--
>> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 6 +
>> .../boot/dts/ti/k3-am64-phycore-som.dtsi | 124 +------
>> .../boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi | 162 ++++++++
>> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 146 +-------
>> arch/arm64/boot/dts/ti/k3-am642-sk.dts | 146 +-------
>> arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 92 +----
>> .../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 107 +-----
>> .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 58 +--
>> arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 3 +
>> .../boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi | 64 ++++
>> .../arm64/boot/dts/ti/k3-am654-base-board.dts | 54 +--
>> .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 152 +-------
>> .../boot/dts/ti/k3-am68-phycore-som.dtsi | 235 +-----------
>> arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 229 +-----------
>> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 348 +----------------
>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +
>> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +
>> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 115 +-----
>> .../boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 131 +++++++
>> .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 229 +-----------
>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 +
>> .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +
>> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 266 +------------
>> arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 266 +------------
>> .../boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 289 ++++++++++++++
>> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 +
>> .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +
>> arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 231 +-----------
>> .../dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 250 +++++++++++++
>> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 154 +-------
>> arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 1 +
>> .../boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 163 ++++++++
>> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 26 +-
>> .../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 337 +----------------
>> .../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 9 +
>> .../k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 3 +
>> ...-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 351 ++++++++++++++++++
>> .../dts/ti/k3-j784s4-ti-ipc-firmware.dtsi | 34 ++
>> 57 files changed, 1820 insertions(+), 3717 deletions(-)
>> create mode 100644 arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi
>> create mode 100644 arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi
>> create mode 100644 arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
>> create mode 100644
>> arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
>>
>
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