From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FCECCA0EE4 for ; Sat, 23 Aug 2025 06:38:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=7m4LttuFeoCH8waWnd0sdxbtC8CJgww1Wx6P0x+seds=; b=Rw5IAkzZ82QlXie2yCJdAg/7KV 8NFFihngBiOtfQ7zd4xtI76fXLyUa8PJJi5caLa6IzUr3r9gyXeoSPowN64sEeNrp9gXwTasNpTcC pTsCvaYCsRGiSk57Xnj5JHYcSWZE9Isudim2KwRa/WuWUH4mEUONxPzVaqU7DlDw+JsCW2TBcs9kO RmxzjyuxXofIJJ+1oE/fGfXU19Uq8VjQTG/vYuDTBLKW19dwz7tRxMAmqQFjtnxg1mxtb7h1tinab 4ew9A/J5tLmbE3LKoEflHCv1ut2v44uEKMx7CgzEJFftHcYleiYUGwx9l+C6eeK2fk1mJtqeEPIYk I7StKYtA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uphtN-000000049U1-0r64; Sat, 23 Aug 2025 06:38:21 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1upToU-000000034Yf-0s18 for linux-arm-kernel@bombadil.infradead.org; Fri, 22 Aug 2025 15:36:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=7m4LttuFeoCH8waWnd0sdxbtC8CJgww1Wx6P0x+seds=; b=pGPGs/xAYZLH9YvJ6klo9sgHAy +7c49jTbGwui/BCRoKt/8Pw0S8DRgG7hpVEIXn58gSjzXsVyIEWwpSd/huDSlBW8Ihl4M3ygXoc8S sM5HLNLFSMdURsbO0mxga3IngIEOfZ1I7eqa/5sLMKVZyWDAHo1kd3WZRI8HLVTxlr9/aIkc984zi mC5z4PlIdHlC05I917A39/2T1Kh0G7dvW+w37ewxNXVq+5dOx1RnlA0Y/lXQUpLv5TPhbLcy9+iaQ 7VH4foFFyyYc2DzXpOBhocaKkxwbTKayN+YS19/fPcxtJ8rNqwdZHzsXK9X8xlMO396qobOiJxCBG 8s3TGQfw==; Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1upToR-00000000yzz-0pzm for linux-arm-kernel@lists.infradead.org; Fri, 22 Aug 2025 15:36:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85B6C15A1; Fri, 22 Aug 2025 08:36:08 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E7C33F63F; Fri, 22 Aug 2025 08:36:11 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org Cc: James Morse , shameerali.kolothum.thodi@huawei.com, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Rex Nie , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich Subject: [PATCH 21/33] arm_mpam: Extend reset logic to allow devices to be reset any time Date: Fri, 22 Aug 2025 15:30:36 +0000 Message-Id: <20250822153048.2287-56-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250822153048.2287-1-james.morse@arm.com> References: <20250822153048.2287-1-james.morse@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250822_163619_592379_712292B2 X-CRM114-Status: GOOD ( 16.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org cpuhp callbacks aren't the only time the MSC configuration may need to be reset. Resctrl has an API call to reset a class. If an MPAM error interrupt arrives it indicates the driver has misprogrammed an MSC. The safest thing to do is reset all the MSCs and disable MPAM. Add a helper to reset RIS via their class. Call this from mpam_disable(), which can be scheduled from the error interrupt handler. Signed-off-by: James Morse --- drivers/resctrl/mpam_devices.c | 62 +++++++++++++++++++++++++++++++-- drivers/resctrl/mpam_internal.h | 1 + 2 files changed, 61 insertions(+), 2 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 759244966736..3516cbe8623e 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -915,8 +915,6 @@ static int mpam_reset_ris(void *arg) u16 partid, partid_max; struct mpam_msc_ris *ris = arg; - mpam_assert_srcu_read_lock_held(); - if (ris->in_reset_state) return 0; @@ -1569,6 +1567,66 @@ static void mpam_enable_once(void) mpam_partid_max + 1, mpam_pmg_max + 1); } +static void mpam_reset_component_locked(struct mpam_component *comp) +{ + int idx; + struct mpam_msc *msc; + struct mpam_vmsc *vmsc; + struct mpam_msc_ris *ris; + + might_sleep(); + lockdep_assert_cpus_held(); + + idx = srcu_read_lock(&mpam_srcu); + list_for_each_entry_rcu(vmsc, &comp->vmsc, comp_list) { + msc = vmsc->msc; + + list_for_each_entry_rcu(ris, &vmsc->ris, vmsc_list) { + if (!ris->in_reset_state) + mpam_touch_msc(msc, mpam_reset_ris, ris); + ris->in_reset_state = true; + } + } + srcu_read_unlock(&mpam_srcu, idx); +} + +static void mpam_reset_class_locked(struct mpam_class *class) +{ + int idx; + struct mpam_component *comp; + + lockdep_assert_cpus_held(); + + idx = srcu_read_lock(&mpam_srcu); + list_for_each_entry_rcu(comp, &class->components, class_list) + mpam_reset_component_locked(comp); + srcu_read_unlock(&mpam_srcu, idx); +} + +static void mpam_reset_class(struct mpam_class *class) +{ + cpus_read_lock(); + mpam_reset_class_locked(class); + cpus_read_unlock(); +} + +/* + * Called in response to an error IRQ. + * All of MPAMs errors indicate a software bug, restore any modified + * controls to their reset values. + */ +void mpam_disable(void) +{ + int idx; + struct mpam_class *class; + + idx = srcu_read_lock(&mpam_srcu); + list_for_each_entry_srcu(class, &mpam_classes, classes_list, + srcu_read_lock_held(&mpam_srcu)) + mpam_reset_class(class); + srcu_read_unlock(&mpam_srcu, idx); +} + /* * Enable mpam once all devices have been probed. * Scheduled by mpam_discovery_cpu_online() once all devices have been created. diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h index 466d670a01eb..b30fee2b7674 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -281,6 +281,7 @@ extern u8 mpam_pmg_max; /* Scheduled work callback to enable mpam once all MSC have been probed */ void mpam_enable(struct work_struct *work); +void mpam_disable(void); int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level, cpumask_t *affinity); -- 2.20.1