From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF00ACA0EFF for ; Sun, 31 Aug 2025 02:17:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Cc:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=/X5ICgCO9mFK1dcI03FeXGC11uS9PqgDvHYa8gHPgNM=; b=quJiT6or6jrFAN XyIoSjlWxpMXvtLa8T+vlG219sA0TRVyYqmUgoUUscmRKdasQ6F2DcEpMsU/xa3fHgzP18x4f1SYc U02g6YEP/y3AzvFvF1K3Ia3WLh+ms4r+fnG0kMpJYzw8k2j26fICqoyXAo8fCkN2hlzE3X9a2118R bHZ4PuzCnzFUCDtrgUV8r7fiUlDmexJ3udoZcO3+AezFytZR3Nt4PcIiH8HXcuiUHwncMkXJbW6zb hpLlZoZLYUjzdCSzHLPJ5Azk7c0J/ysZoAeA3x+hj+otwk7KExg2V6LBTsfsauZffKYYRj6uFlah3 RLP++JpBEKKNS4QVH8xw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1usXdU-00000008lwa-0iEb; Sun, 31 Aug 2025 02:17:40 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1usXaj-00000008kya-3ESX for linux-arm-kernel@lists.infradead.org; Sun, 31 Aug 2025 02:14:51 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Sun, 31 Aug 2025 10:14:38 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Sun, 31 Aug 2025 10:14:38 +0800 From: Ryan Chen To: ryan_chen , Eddie James , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Lee Jones , , , , Subject: [PATCH v2 0/4] irqchip: Add support for Aspeed AST2700 SCU interrupt controller Date: Sun, 31 Aug 2025 10:14:34 +0800 Message-ID: <20250831021438.976893-1-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250830_191449_813887_4F05E8AB X-CRM114-Status: GOOD ( 10.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds support for the SCU (System Control Unit) interrupt controllers on the Aspeed AST2700 SoC. AST2700 follows the same multi-instance SCU interrupt controller design as AST2600, with four independent interrupt domains (scu-ic0 to 3). However, unlike previous SoCs that use a single register for both enable and status bits, AST2700 splits them into separate IER (Interrupt Enable) and ISR (Interrupt Status) registers. To support this, the driver is refactored to use a variant-based init structure, selected by compatible string. Register access is also converted from regmap to MMIO (via `of_iomap()`), and a per-variant IRQ handler is used depending on register layout. v2: - Refactor SCU IC driver to support variant-based initialization - Add AST2700 compatible strings to YAML and header files - Extend DT bindings in mfd and irqchip for AST2700 - Add IRQ handler logic for separate IER/ISR layout Ryan Chen (4): irqchip/aspeed-scu-ic: Refactor driver to support variant-based initialization dt-bindings: mfd: aspeed: Add AST2700 SCU compatibles dt-bindings: interrupt-controller: aspeed: Add AST2700 SCU IC compatibles irqchip/aspeed-scu-ic: Add support AST2700 SCU interrupt controllers .../aspeed,ast2500-scu-ic.yaml | 6 +- .../bindings/mfd/aspeed,ast2x00-scu.yaml | 4 + drivers/irqchip/irq-aspeed-scu-ic.c | 238 ++++++++++-------- .../interrupt-controller/aspeed-scu-ic.h | 14 ++ 4 files changed, 163 insertions(+), 99 deletions(-) -- 2.34.1