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* [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment
@ 2025-09-02  9:10 Christian Bruel
  2025-09-04  9:35 ` Marc Zyngier
  0 siblings, 1 reply; 2+ messages in thread
From: Christian Bruel @ 2025-09-02  9:10 UTC (permalink / raw)
  To: maz, tglx
  Cc: linux-arm-kernel, linux-kernel, fabrice.gasnier, mani,
	Christian Bruel

The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
numbers in the log2(nr_irqs) bits for the domain.

The problem arises if the base vector (GICV2m base spi) is not aligned with
nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
to be identified.

To fix this, use bitmap_find_next_zero_area_off() instead of
bitmap_find_free_region() to align the initial base vector with nr_irqs.

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
---
Changes in v2:
   (Marc Zyngier)
 - Move align_off definition inside the loop
 - Reworked Commit Message

Changes in v1:
   (Marc Zyngier)
 - Replace the incorrect usage of msi_attrib.multiple with nr_irqs
 - Reworked changelog
---
 drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index 24ef5af569fe..8a3410c2b7b5 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 {
 	msi_alloc_info_t *info = args;
 	struct v2m_data *v2m = NULL, *tmp;
-	int hwirq, offset, i, err = 0;
+	int hwirq, i, err = 0;
+	unsigned long offset;
+	unsigned long align_mask = nr_irqs - 1;
 
 	spin_lock(&v2m_lock);
 	list_for_each_entry(tmp, &v2m_nodes, entry) {
-		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
-						 get_count_order(nr_irqs));
-		if (offset >= 0) {
+		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);
+
+		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,
+							nr_irqs, align_mask, align_off);
+		if (offset < tmp->nr_spis) {
 			v2m = tmp;
+			bitmap_set(v2m->bm, offset, nr_irqs);
 			break;
 		}
 	}
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment
  2025-09-02  9:10 [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment Christian Bruel
@ 2025-09-04  9:35 ` Marc Zyngier
  0 siblings, 0 replies; 2+ messages in thread
From: Marc Zyngier @ 2025-09-04  9:35 UTC (permalink / raw)
  To: Christian Bruel
  Cc: tglx, linux-arm-kernel, linux-kernel, fabrice.gasnier, mani

This is actually v3, right?

On Tue, 02 Sep 2025 10:10:45 +0100,
Christian Bruel <christian.bruel@foss.st.com> wrote:
> 
> The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
> low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
> numbers in the log2(nr_irqs) bits for the domain.
> 
> The problem arises if the base vector (GICV2m base spi) is not aligned with
> nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
> vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
> to be identified.
> 
> To fix this, use bitmap_find_next_zero_area_off() instead of
> bitmap_find_free_region() to align the initial base vector with nr_irqs.
> 
> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
> ---
> Changes in v2:
>    (Marc Zyngier)
>  - Move align_off definition inside the loop
>  - Reworked Commit Message
> 
> Changes in v1:
>    (Marc Zyngier)
>  - Replace the incorrect usage of msi_attrib.multiple with nr_irqs
>  - Reworked changelog
> ---
>  drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
> index 24ef5af569fe..8a3410c2b7b5 100644
> --- a/drivers/irqchip/irq-gic-v2m.c
> +++ b/drivers/irqchip/irq-gic-v2m.c
> @@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
>  {
>  	msi_alloc_info_t *info = args;
>  	struct v2m_data *v2m = NULL, *tmp;
> -	int hwirq, offset, i, err = 0;
> +	int hwirq, i, err = 0;
> +	unsigned long offset;
> +	unsigned long align_mask = nr_irqs - 1;
>  
>  	spin_lock(&v2m_lock);
>  	list_for_each_entry(tmp, &v2m_nodes, entry) {
> -		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
> -						 get_count_order(nr_irqs));
> -		if (offset >= 0) {
> +		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);
> +
> +		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,
> +							nr_irqs, align_mask, align_off);
> +		if (offset < tmp->nr_spis) {
>  			v2m = tmp;
> +			bitmap_set(v2m->bm, offset, nr_irqs);
>  			break;
>  		}
>  	}

Reviewed-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Jazz isn't dead. It just smells funny.


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2025-09-04 10:48 UTC | newest]

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