From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51CC6CA1010 for ; Fri, 5 Sep 2025 06:51:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZIoV1H9eLHg17FQiRnns/29HY3NIVMPujETEfeL7akI=; b=m6JKPaUNSAfwRMUZm+IyXz/aV+ X8QS+Lm9+rKQa/+fsP4TA1WowMKfFxBlpdRslmRoXaNRIDblx/+Bx5fl/DiJEs2IyRydDTpzzMtVg bmZdB9B1XD5OBEY27fK9sCMjwTXZ2lJppEgFARv8O3lWSeFXOW/P2xeBRdD4HPut9Y8v4+PUbufa3 ZFZ5vsd4vor7QampYGtFTmhnBzXujbIR/fhrYBP1evPtH5IawJitQsNyxrRKfaBqK6zDMAge7Dq8w Ve6CVXqhFiXXyeD4efsbbLVkZ0mCWr4fFFsNWtJpiY5Bp76KaWQfxJzGfkgWLZO5y/1TAtOB+tpjv ISsX6YWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uuQIN-0000000HOcX-0laC; Fri, 05 Sep 2025 06:51:39 +0000 Received: from lelvem-ot01.ext.ti.com ([198.47.23.234]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uuOsj-0000000GxNt-3MQS for linux-arm-kernel@lists.infradead.org; Fri, 05 Sep 2025 05:21:07 +0000 Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 5855L36e3246616; Fri, 5 Sep 2025 00:21:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757049663; bh=ZIoV1H9eLHg17FQiRnns/29HY3NIVMPujETEfeL7akI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=C3sGGWBe+a9FqP3Su+v3Nx26z/iana5EbiXyeQxnZPN0JUMNAg1iS1e6tTKup/71X 2guvY/W68DDIDiMxqTPAhMPlMJ3GiiUTzZHft2rDmW33Ds2TfI6DmtCQ2V6XL5+V4B 5V2d0FCBhl2HCaxMj1txo0Wntk8fnw1nCa4I1XBw= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 5855L2hZ656075 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 5 Sep 2025 00:21:02 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 5 Sep 2025 00:21:02 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Fri, 5 Sep 2025 00:21:02 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5855Ioiv220581; Fri, 5 Sep 2025 00:20:58 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , Subject: [PATCH v3 28/33] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new dtsi Date: Fri, 5 Sep 2025 10:48:41 +0530 Message-ID: <20250905051846.1189612-29-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250905051846.1189612-1-b-padhi@ti.com> References: <20250905051846.1189612-1-b-padhi@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250904_222105_927231_82A67615 X-CRM114-Status: GOOD ( 17.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The TI K3 J722S SoCs have multiple programmable remote processors like R5F, C7x etc. The TI SDKs for J722S SoCs offer sample firmwares which could be run on these cores to demonstrate an "echo" IPC test. Those firmware require certain memory carveouts to be reserved from system memory, timers to be reserved, and certain mailbox configurations for interrupt based messaging. These configurations could be different for a different firmware. While DT is not meant for system configurations, at least refactor these configurations from board level DTS into a dtsi for now. This dtsi for TI IPC firmware is board-independent and can be applied to all boards from the same SoC Family. This gets rid of code duplication and allows more freedom for users developing custom firmware (or no firmware) to utilize system resources better; easily by swapping out this dtsi. To maintain backward compatibility, the dtsi is included in all boards. Signed-off-by: Beleswar Padhi --- v3: Changelog: 1. None Link to v2: https://lore.kernel.org/all/20250823160901.2177841-29-b-padhi@ti.com/ v2: Changelog: 1. Re-ordered patch from [PATCH 14/33] to [PATCH v2 28/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-15-b-padhi@ti.com/ .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 155 +---------------- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 157 +---------------- .../boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 163 ++++++++++++++++++ 3 files changed, 166 insertions(+), 309 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts index b329e4cb0c37..e1eaeb0015a2 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -61,60 +61,6 @@ wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1000000 0x00 0x100000>; - no-map; - }; - - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2100000 0x00 0xf00000>; - no-map; - }; - - c7x_0_dma_memory_region: c7x-dma-memory@a3000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3000000 0x00 0x100000>; - no-map; - }; - - c7x_0_memory_region: c7x-memory@a3100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3100000 0x00 0xf00000>; - no-map; - }; - - c7x_1_dma_memory_region: c7x-dma-memory@a4000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa4000000 0x00 0x100000>; - no-map; - }; - - c7x_1_memory_region: c7x-memory@a4100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa4100000 0x00 0xf00000>; - no-map; - }; - - rtos_ipc_memory_region: ipc-memories@a5000000 { - reg = <0x00 0xa5000000 0x00 0x1c00000>; - alignment = <0x1000>; - no-map; - }; }; vsys_5v0: regulator-1 { @@ -453,103 +399,4 @@ &sdhci1 { status = "okay"; }; -&mailbox0_cluster0 { - status = "okay"; - - mbox_wkup_r5_0: mbox-wkup-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster1 { - status = "okay"; - - mbox_mcu_r5_0: mbox-mcu-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster2 { - status = "okay"; - - mbox_c7x_0: mbox-c7x-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster3 { - status = "okay"; - - mbox_main_r5_0: mbox-main-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; - - mbox_c7x_1: mbox-c7x-1 { - ti,mbox-rx = <2 0 0>; - ti,mbox-tx = <3 0 0>; - }; -}; - -/* Timers are used by Remoteproc firmware */ -&main_timer0 { - status = "reserved"; -}; - -&main_timer1 { - status = "reserved"; -}; - -&main_timer2 { - status = "reserved"; -}; - -&wkup_r5fss0 { - status = "okay"; -}; - -&wkup_r5fss0_core0 { - mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>; - memory-region = <&wkup_r5fss0_core0_dma_memory_region>, - <&wkup_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&mcu_r5fss0 { - status = "okay"; -}; - -&mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; - memory-region = <&mcu_r5fss0_core0_dma_memory_region>, - <&mcu_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&main_r5fss0 { - status = "okay"; -}; - -&main_r5fss0_core0 { - mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>; - memory-region = <&main_r5fss0_core0_dma_memory_region>, - <&main_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&c7x_0 { - mboxes = <&mailbox0_cluster2 &mbox_c7x_0>; - memory-region = <&c7x_0_dma_memory_region>, - <&c7x_0_memory_region>; - status = "okay"; -}; - -&c7x_1 { - mboxes = <&mailbox0_cluster3 &mbox_c7x_1>; - memory-region = <&c7x_1_dma_memory_region>, - <&c7x_1_memory_region>; - status = "okay"; -}; +#include "k3-j722s-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 2b9e007432a9..7ff738b40706 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -63,60 +63,6 @@ wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1000000 0x00 0x100000>; - no-map; - }; - - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2100000 0x00 0xf00000>; - no-map; - }; - - c7x_0_dma_memory_region: c7x-dma-memory@a3000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3000000 0x00 0x100000>; - no-map; - }; - - c7x_0_memory_region: c7x-memory@a3100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3100000 0x00 0xf00000>; - no-map; - }; - - c7x_1_dma_memory_region: c7x-dma-memory@a4000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa4000000 0x00 0x100000>; - no-map; - }; - - c7x_1_memory_region: c7x-memory@a4100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa4100000 0x00 0xf00000>; - no-map; - }; - - rtos_ipc_memory_region: ipc-memories@a5000000 { - reg = <0x00 0xa5000000 0x00 0x1c00000>; - alignment = <0x1000>; - no-map; - }; }; vmain_pd: regulator-0 { @@ -788,107 +734,6 @@ &sdhci1 { bootph-all; }; -&mailbox0_cluster0 { - status = "okay"; - - mbox_wkup_r5_0: mbox-wkup-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster1 { - status = "okay"; - - mbox_mcu_r5_0: mbox-mcu-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster2 { - status = "okay"; - - mbox_c7x_0: mbox-c7x-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; -}; - -&mailbox0_cluster3 { - status = "okay"; - - mbox_main_r5_0: mbox-main-r5-0 { - ti,mbox-rx = <0 0 0>; - ti,mbox-tx = <1 0 0>; - }; - - mbox_c7x_1: mbox-c7x-1 { - ti,mbox-rx = <2 0 0>; - ti,mbox-tx = <3 0 0>; - }; -}; - -/* Timers are used by Remoteproc firmware */ -&main_timer0 { - status = "reserved"; -}; - -&main_timer1 { - status = "reserved"; -}; - -&main_timer2 { - status = "reserved"; -}; - -&wkup_r5fss0 { - status = "okay"; -}; - -&wkup_r5fss0_core0 { - mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>; - memory-region = <&wkup_r5fss0_core0_dma_memory_region>, - <&wkup_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&mcu_r5fss0 { - status = "okay"; -}; - -&mcu_r5fss0_core0 { - mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; - memory-region = <&mcu_r5fss0_core0_dma_memory_region>, - <&mcu_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&main_r5fss0 { - status = "okay"; -}; - -&main_r5fss0_core0 { - mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>; - memory-region = <&main_r5fss0_core0_dma_memory_region>, - <&main_r5fss0_core0_memory_region>; - status = "okay"; -}; - -&c7x_0 { - mboxes = <&mailbox0_cluster2 &mbox_c7x_0>; - memory-region = <&c7x_0_dma_memory_region>, - <&c7x_0_memory_region>; - status = "okay"; -}; - -&c7x_1 { - mboxes = <&mailbox0_cluster3 &mbox_c7x_1>; - memory-region = <&c7x_1_dma_memory_region>, - <&c7x_1_memory_region>; - status = "okay"; -}; - &serdes_ln_ctrl { idle-states = , ; @@ -999,3 +844,5 @@ &mcu_i2c0 { clock-frequency = <400000>; status = "okay"; }; + +#include "k3-j722s-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi new file mode 100644 index 000000000000..442d78cf450a --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs + * + * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&reserved_memory { + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1000000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2000000 0x00 0x100000>; + no-map; + }; + + main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2100000 0x00 0xf00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@a3000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3000000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@a3100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3100000 0x00 0xf00000>; + no-map; + }; + + c7x_1_dma_memory_region: c7x-dma-memory@a4000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4000000 0x00 0x100000>; + no-map; + }; + + c7x_1_memory_region: c7x-memory@a4100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4100000 0x00 0xf00000>; + no-map; + }; + + rtos_ipc_memory_region: ipc-memories@a5000000 { + reg = <0x00 0xa5000000 0x00 0x1c00000>; + alignment = <0x1000>; + no-map; + }; +}; + +&mailbox0_cluster0 { + status = "okay"; + + mbox_wkup_r5_0: mbox-wkup-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + status = "okay"; + + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + status = "okay"; + + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster3 { + status = "okay"; + + mbox_main_r5_0: mbox-main-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; + + mbox_c7x_1: mbox-c7x-1 { + ti,mbox-rx = <2 0 0>; + ti,mbox-tx = <3 0 0>; + }; +}; + +/* Timers are used by Remoteproc firmware */ +&main_timer0 { + status = "reserved"; +}; + +&main_timer1 { + status = "reserved"; +}; + +&main_timer2 { + status = "reserved"; +}; + +&wkup_r5fss0 { + status = "okay"; +}; + +&wkup_r5fss0_core0 { + mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>; + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; + status = "okay"; +}; + +&mcu_r5fss0 { + status = "okay"; +}; + +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; + status = "okay"; +}; + +&main_r5fss0 { + status = "okay"; +}; + +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>; + memory-region = <&main_r5fss0_core0_dma_memory_region>, + <&main_r5fss0_core0_memory_region>; + status = "okay"; +}; + +&c7x_0 { + mboxes = <&mailbox0_cluster2 &mbox_c7x_0>; + memory-region = <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; + status = "okay"; +}; + +&c7x_1 { + mboxes = <&mailbox0_cluster3 &mbox_c7x_1>; + memory-region = <&c7x_1_dma_memory_region>, + <&c7x_1_memory_region>; + status = "okay"; +}; -- 2.34.1