From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E88BCA1010 for ; Fri, 5 Sep 2025 05:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=y9GEZTDjbayUZBnmza6WDo9S6uUKh0SJDsivwXYhlIU=; b=h0/KK9UZi82Gr4kNwSZABVsSu2 FYnUZJjWudTk/GrgyD1fD+awAVH3nVPn19vWcsxsJjJ9P0cCR1NZTSNUGPABg46tAcq63mu0Kr5pG RH9eVuU1A5tg2MgF/KBD6kImN9fmIITJ1kmS8P9rdAElrNnDS4g9XhmKo8e8NCXK8FM++L0xAcXVj egD/mwz2o8lg14+/kSP034ANIxK3gGNUlPvUBzuYUM23eRNqULed2cj/iJkHK8eGLIFjOlIQ3Tfha BYxlb3ohe87IhopU80yCn1M8vsQ+vL+g8c2QnVi3diiwvH+CA9e+A6pdZ+EnSq/b02M/SplH++Yeb 5uebYkiw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uuPDU-0000000H497-1to1; Fri, 05 Sep 2025 05:42:32 +0000 Received: from lelvem-ot01.ext.ti.com ([198.47.23.234]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uuOqw-0000000GwcE-2UQT for linux-arm-kernel@lists.infradead.org; Fri, 05 Sep 2025 05:19:15 +0000 Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 5855JCSg3246106; Fri, 5 Sep 2025 00:19:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757049552; bh=y9GEZTDjbayUZBnmza6WDo9S6uUKh0SJDsivwXYhlIU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=scODo8O2yuQe3ppApR0hYykbUHCsy8s98mgXgO3S1o0ICaqvfsB3Ozev0VQ1rGwZo ivCX9b1QCLdbJhcdKQND05Y0CGXme6sy0En/GPFZsJAdD1Tf9SramhLTiK9XsOQjEE yZ+e7ryb8GEb51TOsWdso6NcS3C3jGgg0gcQ8QzE= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 5855JC5s688543 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 5 Sep 2025 00:19:12 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 5 Sep 2025 00:19:11 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Fri, 5 Sep 2025 00:19:11 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5855IoiW220581; Fri, 5 Sep 2025 00:19:07 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , Subject: [PATCH v3 03/33] arm64: dts: ti: k3-j721s2: Enable remote processors at board level Date: Fri, 5 Sep 2025 10:48:16 +0530 Message-ID: <20250905051846.1189612-4-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250905051846.1189612-1-b-padhi@ti.com> References: <20250905051846.1189612-1-b-padhi@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250904_221914_725542_1D0A28A5 X-CRM114-Status: GOOD ( 10.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remote Processors defined in top-level J721S2 SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi Acked-by: Andrew Davis --- v3: Changelog: 1. Carried A/B tag. Link to v2: https://lore.kernel.org/all/20250823160901.2177841-4-b-padhi@ti.com/ v2: Changelog: 1. Re-ordered patch from [PATCH 08/33] to [PATCH v2 03/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-9-b-padhi@ti.com/ arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 ++++++ arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 12 ++++++++++++ 5 files changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi index fd715fee8170..383594732e81 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi @@ -371,24 +371,28 @@ &main_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status = "okay"; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status = "okay"; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status = "okay"; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status = "okay"; }; /* eMMC */ @@ -407,10 +411,12 @@ &main_sdhci1 { &main_r5fss0 { ti,cluster-mode = <0>; + status = "okay"; }; &main_r5fss1 { ti,cluster-mode = <0>; + status = "okay"; }; /* Timers are used by Remoteproc firmware */ @@ -438,16 +444,22 @@ &main_timer5 { status = "reserved"; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status = "okay"; }; &mcu_r5fss0_core1 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status = "okay"; }; &ospi0 { diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi index 4ca2d4e2fb9b..2d2edeeb7347 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi @@ -291,24 +291,32 @@ mbox_c71_1: mbox-c71-1 { }; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status = "okay"; }; &mcu_r5fss0_core1 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status = "okay"; }; &main_r5fss0 { ti,cluster-mode = <0>; + status = "okay"; }; &main_r5fss1 { ti,cluster-mode = <0>; + status = "okay"; }; /* Timers are used by Remoteproc firmware */ @@ -340,24 +348,28 @@ &main_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status = "okay"; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status = "okay"; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status = "okay"; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status = "okay"; }; &c71_0 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 0ad752975acd..80c51b11ac9f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1895,6 +1895,7 @@ main_r5fss0: r5fss@5c00000 { ranges = <0x5c00000 0x00 0x5c00000 0x20000>, <0x5d00000 0x00 0x5d00000 0x20000>; power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; main_r5fss0_core0: r5f@5c00000 { compatible = "ti,j721s2-r5f"; @@ -1909,6 +1910,7 @@ main_r5fss0_core0: r5f@5c00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; main_r5fss0_core1: r5f@5d00000 { @@ -1924,6 +1926,7 @@ main_r5fss0_core1: r5f@5d00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; @@ -1935,6 +1938,7 @@ main_r5fss1: r5fss@5e00000 { ranges = <0x5e00000 0x00 0x5e00000 0x20000>, <0x5f00000 0x00 0x5f00000 0x20000>; power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; main_r5fss1_core0: r5f@5e00000 { compatible = "ti,j721s2-r5f"; @@ -1949,6 +1953,7 @@ main_r5fss1_core0: r5f@5e00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; main_r5fss1_core1: r5f@5f00000 { @@ -1964,6 +1969,7 @@ main_r5fss1_core1: r5f@5f00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index bc31266126d0..837097751c18 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -690,6 +690,7 @@ mcu_r5fss0: r5fss@41000000 { ranges = <0x41000000 0x00 0x41000000 0x20000>, <0x41400000 0x00 0x41400000 0x20000>; power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; mcu_r5fss0_core0: r5f@41000000 { compatible = "ti,j721s2-r5f"; @@ -704,6 +705,7 @@ mcu_r5fss0_core0: r5f@41000000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; mcu_r5fss0_core1: r5f@41400000 { @@ -719,6 +721,7 @@ mcu_r5fss0_core1: r5f@41400000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index a9dbe14fb0c9..f252007262d3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -572,24 +572,32 @@ mbox_c71_1: mbox-c71-1 { }; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status = "okay"; }; &mcu_r5fss0_core1 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status = "okay"; }; &main_r5fss0 { ti,cluster-mode = <0>; + status = "okay"; }; &main_r5fss1 { ti,cluster-mode = <0>; + status = "okay"; }; /* Timers are used by Remoteproc firmware */ @@ -621,24 +629,28 @@ &main_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status = "okay"; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status = "okay"; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status = "okay"; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status = "okay"; }; &c71_0 { -- 2.34.1