[PATCH v1 0/4] clk/rockchip: Fix I2S 8CH mclk output for RK3368

[PATCH v1 0/4] clk/rockchip: Fix I2S 8CH mclk output for RK3368

[WeiHao Li]

I2S 8CH needs assign correct clock to output frequency wanted, this
serial fix it.

These changes were tested on a RK3368-based board with es8316 codec [1],
playback function is good.

[1] https://ieiao.github.io/wiki/embedded-dev/rockchip/rk3368

Tested-by: WeiHao Li <cn.liweihao@gmail.com>
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>

WeiHao Li (4):
  clk: rockchip: rk3368: fix SCLK_I2S_8CH_OUT flags
  dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC
  clk: rockchip: rk3368: use clock ids CLK_I2S_8CH_PRE and
    CLK_I2S_8CH_FRAC
  arm64: dts: rockchip: Assign I2S 8 channel clock for rk3368

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++
 drivers/clk/rockchip/clk-rk3368.c        | 6 +++---
 include/dt-bindings/clock/rk3368-cru.h   | 3 +++
 3 files changed, 8 insertions(+), 3 deletions(-)

-- 
2.39.5

[PATCH v1 1/4] clk: rockchip: rk3368: fix SCLK_I2S_8CH_OUT flags

[WeiHao Li]

Clock SCLK_I2S_8CH_OUT has no capability to adjust clock frequency by
itself, add CLK_SET_RATE_PARENT flag to fix it.

Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
---
 drivers/clk/rockchip/clk-rk3368.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 95e6996adb..8159f643dc 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -371,7 +371,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 			  RK3368_CLKSEL_CON(28), 0,
 			  RK3368_CLKGATE_CON(6), 2, GFLAGS,
 			  &rk3368_i2s_8ch_fracmux),
-	COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "i2s_8ch_clkout", mux_i2s_8ch_clkout_p, 0,
+	COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "i2s_8ch_clkout", mux_i2s_8ch_clkout_p, CLK_SET_RATE_PARENT,
 			RK3368_CLKSEL_CON(27), 15, 1, MFLAGS,
 			RK3368_CLKGATE_CON(6), 0, GFLAGS),
 	GATE(SCLK_I2S_8CH, "sclk_i2s_8ch", "i2s_8ch_pre", CLK_SET_RATE_PARENT,
-- 
2.39.5

[PATCH v1 2/4] dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC

[WeiHao Li]

We need a clock id to assign clock parent when use i2s 8ch as audio
device, CLK_I2S_8CH_FRAC should be CLK_I2S_8CH_PRE parent so we can get
frequency we want.

Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
---
 include/dt-bindings/clock/rk3368-cru.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
index b951e29069..795e721957 100644
--- a/include/dt-bindings/clock/rk3368-cru.h
+++ b/include/dt-bindings/clock/rk3368-cru.h
@@ -183,6 +183,9 @@
 #define HCLK_BUS		477
 #define HCLK_PERI		478
 
+#define CLK_I2S_8CH_PRE		500
+#define CLK_I2S_8CH_FRAC	501
+
 /* soft-reset indices */
 #define SRST_CORE_B0		0
 #define SRST_CORE_B1		1
-- 
2.39.5

Re: [PATCH v1 2/4] dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC

[Krzysztof Kozlowski]

On 05/09/2025 15:23, WeiHao Li wrote:
> We need a clock id to assign clock parent when use i2s 8ch as audio
> device, CLK_I2S_8CH_FRAC should be CLK_I2S_8CH_PRE parent so we can get
> frequency we want.
> 
> Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
> ---
>  include/dt-bindings/clock/rk3368-cru.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
> index b951e29069..795e721957 100644
> --- a/include/dt-bindings/clock/rk3368-cru.h
> +++ b/include/dt-bindings/clock/rk3368-cru.h
> @@ -183,6 +183,9 @@
>  #define HCLK_BUS		477
>  #define HCLK_PERI		478
>  
> +#define CLK_I2S_8CH_PRE		500

479

> +#define CLK_I2S_8CH_FRAC	501

480, no?


Best regards,
Krzysztof

Re: [PATCH v1 2/4] dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC

[李维豪]

Hi,

Krzysztof Kozlowski <krzk@kernel.org> 于2025年9月5日周五 22:13写道：
>
> On 05/09/2025 15:23, WeiHao Li wrote:
> > We need a clock id to assign clock parent when use i2s 8ch as audio
> > device, CLK_I2S_8CH_FRAC should be CLK_I2S_8CH_PRE parent so we can get
> > frequency we want.
> >
> > Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
> > ---
> >  include/dt-bindings/clock/rk3368-cru.h | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
> > index b951e29069..795e721957 100644
> > --- a/include/dt-bindings/clock/rk3368-cru.h
> > +++ b/include/dt-bindings/clock/rk3368-cru.h
> > @@ -183,6 +183,9 @@
> >  #define HCLK_BUS             477
> >  #define HCLK_PERI            478
> >
> > +#define CLK_I2S_8CH_PRE              500
>
> 479
>
> > +#define CLK_I2S_8CH_FRAC     501
>
> 480, no?
>

Neither of these clocks belong to the previous grouping in terms of
type, so I chose to start with a new integer id here.

Yours,
WeiHao

Re: [PATCH v1 2/4] dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC

[Krzysztof Kozlowski]

On 06/09/2025 03:34, 李维豪 wrote:
> Hi,
> 
> Krzysztof Kozlowski <krzk@kernel.org> 于2025年9月5日周五 22:13写道：
>>
>> On 05/09/2025 15:23, WeiHao Li wrote:
>>> We need a clock id to assign clock parent when use i2s 8ch as audio
>>> device, CLK_I2S_8CH_FRAC should be CLK_I2S_8CH_PRE parent so we can get
>>> frequency we want.
>>>
>>> Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
>>> ---
>>>  include/dt-bindings/clock/rk3368-cru.h | 3 +++
>>>  1 file changed, 3 insertions(+)
>>>
>>> diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
>>> index b951e29069..795e721957 100644
>>> --- a/include/dt-bindings/clock/rk3368-cru.h
>>> +++ b/include/dt-bindings/clock/rk3368-cru.h
>>> @@ -183,6 +183,9 @@
>>>  #define HCLK_BUS             477
>>>  #define HCLK_PERI            478
>>>
>>> +#define CLK_I2S_8CH_PRE              500
>>
>> 479
>>
>>> +#define CLK_I2S_8CH_FRAC     501
>>
>> 480, no?
>>
> 
> Neither of these clocks belong to the previous grouping in terms of
> type, so I chose to start with a new integer id here.

I don't know what is "previous grouping" here, but IDs are abstract and
are incremented by 1.

Best regards,
Krzysztof

[PATCH v1 3/4] clk: rockchip: rk3368: use clock ids CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC

[WeiHao Li]

Export the clocks via the newly added clock-ids.

Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
---
 drivers/clk/rockchip/clk-rk3368.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 8159f643dc..1fb18c9596 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -244,7 +244,7 @@ static struct rockchip_cpuclk_rate_table rk3368_cpuclkl_rates[] __initdata = {
 };
 
 static struct rockchip_clk_branch rk3368_i2s_8ch_fracmux __initdata =
-	MUX(0, "i2s_8ch_pre", mux_i2s_8ch_pre_p, CLK_SET_RATE_PARENT,
+	MUX(CLK_I2S_8CH_PRE, "i2s_8ch_pre", mux_i2s_8ch_pre_p, CLK_SET_RATE_PARENT,
 	    RK3368_CLKSEL_CON(27), 8, 2, MFLAGS);
 
 static struct rockchip_clk_branch rk3368_spdif_8ch_fracmux __initdata =
@@ -367,7 +367,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 	COMPOSITE(0, "i2s_8ch_src", mux_pll_src_cpll_gpll_p, 0,
 			RK3368_CLKSEL_CON(27), 12, 1, MFLAGS, 0, 7, DFLAGS,
 			RK3368_CLKGATE_CON(6), 1, GFLAGS),
-	COMPOSITE_FRACMUX(0, "i2s_8ch_frac", "i2s_8ch_src", CLK_SET_RATE_PARENT,
+	COMPOSITE_FRACMUX(CLK_I2S_8CH_FRAC, "i2s_8ch_frac", "i2s_8ch_src", CLK_SET_RATE_PARENT,
 			  RK3368_CLKSEL_CON(28), 0,
 			  RK3368_CLKGATE_CON(6), 2, GFLAGS,
 			  &rk3368_i2s_8ch_fracmux),
-- 
2.39.5

[PATCH v1 4/4] arm64: dts: rockchip: Assign I2S 8 channel clock for rk3368

[WeiHao Li]

I2S 8CH needs assign correct clock to output frequency wanted. This
patch assign CLK_I2S_8CH_FRAC as CLK_I2S_8CH_PRE parents.

Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cdcbc0a944..d931b5f5ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -862,6 +862,8 @@ i2s_8ch: i2s-8ch@ff898000 {
 		compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
 		reg = <0x0 0xff898000 0x0 0x1000>;
 		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks =  <&cru CLK_I2S_8CH_PRE>;
+		assigned-clock-parents = <&cru CLK_I2S_8CH_FRAC>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
 		dmas = <&dmac_bus 0>, <&dmac_bus 1>;
-- 
2.39.5