From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06A76CAC585 for ; Mon, 8 Sep 2025 17:11:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sK45ZTmS4qjwnokqc3Je2oE8JrZhHuQzfuGQ5UnjzRM=; b=z5TRBJTABl2Js0qOlDR1W8n8Fh lQsiDsNFRVfnU5m7dshFk6ewhDokRX3Nrar3g1O9jau8DbapT0CX0h6xG1wPqX86WaFa13BcB4FX2 hHs6vWVA+9JK0BNsJd6VjIbRgNLIF5un0U7+6oiKZrPJ6f85LSbgzLw+eeSd1O8FZ7m7FcqH/d8JU tTyh0kuHzZq6QAKYhtceuaRZriL65kgLCQaIXLI5LSHBC05Vo5Bsuz0dDKP5iPPQ505jeA9DdaToE rOsk8TbQrbL1ex74MdOW0JTAiy7n6EgnrjWPizvqsr5AuQ27RnlaeJ7ZELulWYmWj4qUDYehuYXfp /gIQ43bw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uvfPD-000000015nS-0Bqs; Mon, 08 Sep 2025 17:11:51 +0000 Received: from lelvem-ot01.ext.ti.com ([198.47.23.234]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uvcrg-000000006gt-2nNk for linux-arm-kernel@lists.infradead.org; Mon, 08 Sep 2025 14:29:06 +0000 Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 588ET16s3882990; Mon, 8 Sep 2025 09:29:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757341741; bh=sK45ZTmS4qjwnokqc3Je2oE8JrZhHuQzfuGQ5UnjzRM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yyJdtIwI+oaa2KIaPidzDQfakcMF8InKSIUzaDSMMmFLds7AqG0fMXzMhulMwbQ9P pRdIQgz8J7VQ4jVvTwzWZjqvZo/qHnufO6RY5K7zI1dP8Lb/B09BCaAMTLXT6FSKlE BIY29kjyiH9MZf8TcKigVVdXXdHcJ60x+JGeEFUQ= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 588ET1d33019303 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 8 Sep 2025 09:29:01 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 8 Sep 2025 09:29:00 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 8 Sep 2025 09:29:00 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 588ESece1037553; Mon, 8 Sep 2025 09:28:56 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , , Subject: [PATCH v4 02/34] arm64: dts: ti: k3-j721e: Enable remote processors at board level Date: Mon, 8 Sep 2025 19:57:54 +0530 Message-ID: <20250908142826.1828676-3-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250908142826.1828676-1-b-padhi@ti.com> References: <20250908142826.1828676-1-b-padhi@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250908_072904_804507_9011BFF3 X-CRM114-Status: GOOD ( 11.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remote Processors defined in top-level J721E SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi Acked-by: Andrew Davis --- v4: Changelog: 1. None Link to v3: https://lore.kernel.org/all/20250905051846.1189612-3-b-padhi@ti.com/ v3: Changelog: 1. Carried A/B tag. Link to v2: https://lore.kernel.org/all/20250823160901.2177841-3-b-padhi@ti.com/ v2: Changelog: 1. Reordered patch from [PATCH 05/33] to [PATCH v2 02/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-6-b-padhi@ti.com/ .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 18 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 ++++++ .../arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 12 ++++++++++++ 5 files changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index fb899c99753e..0d1a313a7d10 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -935,37 +935,55 @@ mbox_c71_0: mbox-c71-0 { }; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; +&main_r5fss0 { + status = "okay"; +}; + &main_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; +&main_r5fss1 { + status = "okay"; +}; + &main_r5fss1_core0 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index ab3666ff4297..e748f704e3b6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2182,6 +2182,7 @@ main_r5fss0: r5fss@5c00000 { ranges = <0x5c00000 0x00 0x5c00000 0x20000>, <0x5d00000 0x00 0x5d00000 0x20000>; power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; main_r5fss0_core0: r5f@5c00000 { compatible = "ti,j721e-r5f"; @@ -2196,6 +2197,7 @@ main_r5fss0_core0: r5f@5c00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; main_r5fss0_core1: r5f@5d00000 { @@ -2211,6 +2213,7 @@ main_r5fss0_core1: r5f@5d00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; @@ -2222,6 +2225,7 @@ main_r5fss1: r5fss@5e00000 { ranges = <0x5e00000 0x00 0x5e00000 0x20000>, <0x5f00000 0x00 0x5f00000 0x20000>; power-domains = <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; main_r5fss1_core0: r5f@5e00000 { compatible = "ti,j721e-r5f"; @@ -2236,6 +2240,7 @@ main_r5fss1_core0: r5f@5e00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; main_r5fss1_core1: r5f@5f00000 { @@ -2251,6 +2256,7 @@ main_r5fss1_core1: r5f@5f00000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index b02142b2b460..42a21398e389 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -594,6 +594,7 @@ mcu_r5fss0: r5fss@41000000 { ranges = <0x41000000 0x00 0x41000000 0x20000>, <0x41400000 0x00 0x41400000 0x20000>; power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; mcu_r5fss0_core0: r5f@41000000 { compatible = "ti,j721e-r5f"; @@ -608,6 +609,7 @@ mcu_r5fss0_core0: r5f@41000000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; mcu_r5fss0_core1: r5f@41400000 { @@ -623,6 +625,7 @@ mcu_r5fss0_core1: r5f@41400000 { ti,atcm-enable = <1>; ti,btcm-enable = <1>; ti,loczrama = <1>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index ffef3d1cfd55..62b9c13a91e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1349,13 +1349,19 @@ mbox_c71_0: mbox-c71-0 { }; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; @@ -1363,10 +1369,12 @@ &mcu_r5fss0_core1 { &main_r5fss0 { ti,cluster-mode = <0>; + status = "okay"; }; &main_r5fss1 { ti,cluster-mode = <0>; + status = "okay"; }; /* Timers are used by Remoteproc firmware */ @@ -1399,24 +1407,28 @@ &main_timer15 { }; &main_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index 0722f6361cc8..795b041ee733 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -554,23 +554,31 @@ mbox_c71_0: mbox-c71-0 { }; }; +&mcu_r5fss0 { + status = "okay"; +}; + &mcu_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; &main_r5fss0 { + status = "okay"; ti,cluster-mode = <0>; }; &main_r5fss1 { + status = "okay"; ti,cluster-mode = <0>; }; @@ -604,24 +612,28 @@ &main_timer15 { }; &main_r5fss0_core0 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; &main_r5fss0_core1 { + status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { + status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; -- 2.34.1