From: James Morse <james.morse@arm.com>
To: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
D Scott Phillips OS <scott@os.amperecomputing.com>,
carl@os.amperecomputing.com, lcherian@marvell.com,
bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com,
baolin.wang@linux.alibaba.com,
Jamie Iles <quic_jiles@quicinc.com>,
Xin Hao <xhao@linux.alibaba.com>,
peternewman@google.com, dfustini@baylibre.com,
amitsinght@marvell.com, David Hildenbrand <david@redhat.com>,
Dave Martin <dave.martin@arm.com>, Koba Ko <kobak@nvidia.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
fenghuay@nvidia.com, baisheng.gao@unisoc.com,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Rob Herring <robh@kernel.org>,
Rohit Mathew <rohit.mathew@arm.com>,
Rafael Wysocki <rafael@kernel.org>, Len Brown <lenb@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Hanjun Guo <guohanjun@huawei.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Danilo Krummrich <dakr@kernel.org>
Subject: [PATCH v2 24/29] arm_mpam: Track bandwidth counter state for overflow and power management
Date: Wed, 10 Sep 2025 20:43:04 +0000 [thread overview]
Message-ID: <20250910204309.20751-25-james.morse@arm.com> (raw)
In-Reply-To: <20250910204309.20751-1-james.morse@arm.com>
Bandwidth counters need to run continuously to correctly reflect the
bandwidth.
The value read may be lower than the previous value read in the case
of overflow and when the hardware is reset due to CPU hotplug.
Add struct mbwu_state to track the bandwidth counter to allow overflow
and power management to be handled.
Signed-off-by: James Morse <james.morse@arm.com>
---
Changes since v1:
* Fixed lock/unlock typo.
---
drivers/resctrl/mpam_devices.c | 154 +++++++++++++++++++++++++++++++-
drivers/resctrl/mpam_internal.h | 23 +++++
2 files changed, 175 insertions(+), 2 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 1543c33c5d6a..eeb62ed94520 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -918,6 +918,7 @@ static void gen_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val,
*ctl_val |= MSMON_CFG_x_CTL_MATCH_PARTID;
*flt_val = FIELD_PREP(MSMON_CFG_x_FLT_PARTID, ctx->partid);
+
if (m->ctx->match_pmg) {
*ctl_val |= MSMON_CFG_x_CTL_MATCH_PMG;
*flt_val |= FIELD_PREP(MSMON_CFG_x_FLT_PMG, ctx->pmg);
@@ -972,6 +973,7 @@ static void clean_msmon_ctl_val(u32 *cur_ctl)
static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
u32 flt_val)
{
+ struct msmon_mbwu_state *mbwu_state;
struct mpam_msc *msc = m->ris->vmsc->msc;
/*
@@ -990,20 +992,32 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
mpam_write_monsel_reg(msc, MBWU, 0);
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
+
+ mbwu_state = &m->ris->mbwu_state[m->ctx->mon];
+ if (mbwu_state)
+ mbwu_state->prev_val = 0;
+
break;
default:
return;
}
}
+static u64 mpam_msmon_overflow_val(struct mpam_msc_ris *ris)
+{
+ /* TODO: scaling, and long counters */
+ return GENMASK_ULL(30, 0);
+}
+
/* Call with MSC lock held */
static void __ris_msmon_read(void *arg)
{
- u64 now;
bool nrdy = false;
struct mon_read *m = arg;
+ u64 now, overflow_val = 0;
struct mon_cfg *ctx = m->ctx;
struct mpam_msc_ris *ris = m->ris;
+ struct msmon_mbwu_state *mbwu_state;
struct mpam_props *rprops = &ris->props;
struct mpam_msc *msc = m->ris->vmsc->msc;
u32 mon_sel, ctl_val, flt_val, cur_ctl, cur_flt;
@@ -1031,11 +1045,30 @@ static void __ris_msmon_read(void *arg)
now = mpam_read_monsel_reg(msc, CSU);
if (mpam_has_feature(mpam_feat_msmon_csu_hw_nrdy, rprops))
nrdy = now & MSMON___NRDY;
+ now = FIELD_GET(MSMON___VALUE, now);
break;
case mpam_feat_msmon_mbwu:
now = mpam_read_monsel_reg(msc, MBWU);
if (mpam_has_feature(mpam_feat_msmon_mbwu_hw_nrdy, rprops))
nrdy = now & MSMON___NRDY;
+ now = FIELD_GET(MSMON___VALUE, now);
+
+ if (nrdy)
+ break;
+
+ mbwu_state = &ris->mbwu_state[ctx->mon];
+ if (!mbwu_state)
+ break;
+
+ /* Add any pre-overflow value to the mbwu_state->val */
+ if (mbwu_state->prev_val > now)
+ overflow_val = mpam_msmon_overflow_val(ris) - mbwu_state->prev_val;
+
+ mbwu_state->prev_val = now;
+ mbwu_state->correction += overflow_val;
+
+ /* Include bandwidth consumed before the last hardware reset */
+ now += mbwu_state->correction;
break;
default:
m->err = -EINVAL;
@@ -1048,7 +1081,6 @@ static void __ris_msmon_read(void *arg)
return;
}
- now = FIELD_GET(MSMON___VALUE, now);
*m->val += now;
}
@@ -1261,6 +1293,67 @@ static int mpam_reprogram_ris(void *_arg)
return 0;
}
+/* Call with MSC lock held */
+static int mpam_restore_mbwu_state(void *_ris)
+{
+ int i;
+ struct mon_read mwbu_arg;
+ struct mpam_msc_ris *ris = _ris;
+
+ for (i = 0; i < ris->props.num_mbwu_mon; i++) {
+ if (ris->mbwu_state[i].enabled) {
+ mwbu_arg.ris = ris;
+ mwbu_arg.ctx = &ris->mbwu_state[i].cfg;
+ mwbu_arg.type = mpam_feat_msmon_mbwu;
+
+ __ris_msmon_read(&mwbu_arg);
+ }
+ }
+
+ return 0;
+}
+
+/* Call with MSC lock and held */
+static int mpam_save_mbwu_state(void *arg)
+{
+ int i;
+ u64 val;
+ struct mon_cfg *cfg;
+ u32 cur_flt, cur_ctl, mon_sel;
+ struct mpam_msc_ris *ris = arg;
+ struct msmon_mbwu_state *mbwu_state;
+ struct mpam_msc *msc = ris->vmsc->msc;
+
+ for (i = 0; i < ris->props.num_mbwu_mon; i++) {
+ mbwu_state = &ris->mbwu_state[i];
+ cfg = &mbwu_state->cfg;
+
+ if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
+ return -EIO;
+
+ mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, i) |
+ FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);
+ mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel);
+
+ cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT);
+ cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
+ mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0);
+
+ val = mpam_read_monsel_reg(msc, MBWU);
+ mpam_write_monsel_reg(msc, MBWU, 0);
+
+ cfg->mon = i;
+ cfg->pmg = FIELD_GET(MSMON_CFG_x_FLT_PMG, cur_flt);
+ cfg->match_pmg = FIELD_GET(MSMON_CFG_x_CTL_MATCH_PMG, cur_ctl);
+ cfg->partid = FIELD_GET(MSMON_CFG_x_FLT_PARTID, cur_flt);
+ mbwu_state->correction += val;
+ mbwu_state->enabled = FIELD_GET(MSMON_CFG_x_CTL_EN, cur_ctl);
+ mpam_mon_sel_unlock(msc);
+ }
+
+ return 0;
+}
+
static void mpam_init_reset_cfg(struct mpam_config *reset_cfg)
{
memset(reset_cfg, 0, sizeof(*reset_cfg));
@@ -1335,6 +1428,9 @@ static void mpam_reset_msc(struct mpam_msc *msc, bool online)
* for non-zero partid may be lost while the CPUs are offline.
*/
ris->in_reset_state = online;
+
+ if (mpam_is_enabled() && !online)
+ mpam_touch_msc(msc, &mpam_save_mbwu_state, ris);
}
}
@@ -1369,6 +1465,9 @@ static void mpam_reprogram_msc(struct mpam_msc *msc)
mpam_reprogram_ris_partid(ris, partid, cfg);
}
ris->in_reset_state = reset;
+
+ if (mpam_has_feature(mpam_feat_msmon_mbwu, &ris->props))
+ mpam_touch_msc(msc, &mpam_restore_mbwu_state, ris);
}
}
@@ -2091,11 +2190,33 @@ static void mpam_unregister_irqs(void)
static void __destroy_component_cfg(struct mpam_component *comp)
{
+ struct mpam_msc *msc;
+ struct mpam_vmsc *vmsc;
+ struct mpam_msc_ris *ris;
+
+ lockdep_assert_held(&mpam_list_lock);
+
add_to_garbage(comp->cfg);
+ list_for_each_entry(vmsc, &comp->vmsc, comp_list) {
+ msc = vmsc->msc;
+
+ if (mpam_mon_sel_lock(msc)) {
+ list_for_each_entry(ris, &vmsc->ris, vmsc_list)
+ add_to_garbage(ris->mbwu_state);
+ mpam_mon_sel_unlock(msc);
+ }
+ }
}
static int __allocate_component_cfg(struct mpam_component *comp)
{
+ int err = 0;
+ struct mpam_msc *msc;
+ struct mpam_vmsc *vmsc;
+ struct mpam_msc_ris *ris;
+ struct msmon_mbwu_state *mbwu_state;
+
+ lockdep_assert_held(&mpam_list_lock);
mpam_assert_partid_sizes_fixed();
if (comp->cfg)
@@ -2106,6 +2227,35 @@ static int __allocate_component_cfg(struct mpam_component *comp)
return -ENOMEM;
init_garbage(comp->cfg);
+ list_for_each_entry(vmsc, &comp->vmsc, comp_list) {
+ if (!vmsc->props.num_mbwu_mon)
+ continue;
+
+ msc = vmsc->msc;
+ list_for_each_entry(ris, &vmsc->ris, vmsc_list) {
+ if (!ris->props.num_mbwu_mon)
+ continue;
+
+ mbwu_state = kcalloc(ris->props.num_mbwu_mon,
+ sizeof(*ris->mbwu_state),
+ GFP_KERNEL);
+ if (!mbwu_state) {
+ __destroy_component_cfg(comp);
+ err = -ENOMEM;
+ break;
+ }
+
+ if (mpam_mon_sel_lock(msc)) {
+ init_garbage(mbwu_state);
+ ris->mbwu_state = mbwu_state;
+ mpam_mon_sel_unlock(msc);
+ }
+ }
+
+ if (err)
+ break;
+ }
+
return 0;
}
diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index bb01e7dbde40..725c2aefa8a2 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -212,6 +212,26 @@ struct mon_cfg {
enum mon_filter_options opts;
};
+/*
+ * Changes to enabled and cfg are protected by the msc->lock.
+ * Changes to prev_val and correction are protected by the msc's mon_sel_lock.
+ */
+struct msmon_mbwu_state {
+ bool enabled;
+ struct mon_cfg cfg;
+
+ /* The value last read from the hardware. Used to detect overflow. */
+ u64 prev_val;
+
+ /*
+ * The value to add to the new reading to account for power management,
+ * and shifts to trigger the overflow interrupt.
+ */
+ u64 correction;
+
+ struct mpam_garbage garbage;
+};
+
struct mpam_class {
/* mpam_components in this class */
struct list_head components;
@@ -304,6 +324,9 @@ struct mpam_msc_ris {
/* parent: */
struct mpam_vmsc *vmsc;
+ /* msmon mbwu configuration is preserved over reset */
+ struct msmon_mbwu_state *mbwu_state;
+
struct mpam_garbage garbage;
};
--
2.39.5
next prev parent reply other threads:[~2025-09-10 20:47 UTC|newest]
Thread overview: 200+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 20:42 [PATCH v2 00/29] arm_mpam: Add basic mpam driver James Morse
2025-09-10 20:42 ` [PATCH v2 01/29] ACPI / PPTT: Add a helper to fill a cpumask from a processor container James Morse
2025-09-11 10:43 ` Jonathan Cameron
2025-09-11 10:48 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-25 9:32 ` Stanimir Varbanov
2025-10-10 16:54 ` James Morse
2025-10-02 3:35 ` Fenghua Yu
2025-10-10 16:54 ` James Morse
2025-10-03 0:15 ` Gavin Shan
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 02/29] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels James Morse
2025-09-11 10:46 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-11 14:08 ` Ben Horgan
2025-09-19 16:10 ` James Morse
2025-10-02 3:55 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:17 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 03/29] ACPI / PPTT: Find cache level by cache-id James Morse
2025-09-11 10:59 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-11 15:27 ` Lorenzo Pieralisi
2025-09-19 16:10 ` James Morse
2025-10-02 4:30 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:23 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 04/29] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id James Morse
2025-09-11 11:06 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-10-02 5:03 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 05/29] arm64: kconfig: Add Kconfig entry for MPAM James Morse
2025-09-12 10:14 ` Ben Horgan
2025-10-02 5:06 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:32 ` Gavin Shan
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 06/29] ACPI / MPAM: Parse the MPAM table James Morse
2025-09-11 13:17 ` Jonathan Cameron
2025-09-19 16:11 ` James Morse
2025-09-26 14:48 ` Jonathan Cameron
2025-10-17 18:50 ` James Morse
2025-09-11 14:56 ` Lorenzo Pieralisi
2025-09-19 16:11 ` James Morse
2025-09-16 13:17 ` [PATCH] arm_mpam: Try reading again if MPAM instance returns not ready Zeng Heng
2025-09-19 16:11 ` James Morse
2025-09-20 10:14 ` Zeng Heng
2025-10-02 3:21 ` [PATCH v2 06/29] ACPI / MPAM: Parse the MPAM table Fenghua Yu
2025-10-17 18:50 ` James Morse
2025-10-03 0:58 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 07/29] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate James Morse
2025-09-11 13:35 ` Jonathan Cameron
2025-09-23 16:41 ` James Morse
2025-09-26 14:55 ` Jonathan Cameron
2025-10-17 18:51 ` James Morse
2025-09-17 11:03 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 3:53 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 08/29] arm_mpam: Add the class and component structures for firmware described ris James Morse
2025-09-11 14:22 ` Jonathan Cameron
2025-09-26 17:52 ` James Morse
2025-09-11 16:30 ` Markus Elfring
2025-09-26 17:52 ` James Morse
2025-09-26 18:15 ` Markus Elfring
2025-10-17 18:51 ` James Morse
2025-10-03 16:54 ` Fenghua Yu
2025-10-17 18:51 ` James Morse
2025-10-06 23:13 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 09/29] arm_mpam: Add MPAM MSC register layout definitions James Morse
2025-09-11 15:00 ` Jonathan Cameron
2025-10-17 18:53 ` James Morse
2025-09-12 7:33 ` Markus Elfring
2025-10-06 23:25 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 10/29] arm_mpam: Add cpuhp callbacks to probe MSC hardware James Morse
2025-09-11 15:07 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-12 10:42 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 17:56 ` Fenghua Yu
2025-10-06 23:42 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 11/29] arm_mpam: Probe hardware to find the supported partid/pmg values James Morse
2025-09-11 15:18 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-12 11:11 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 18:58 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 12/29] arm_mpam: Add helpers for managing the locking around the mon_sel registers James Morse
2025-09-11 15:24 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-11 15:31 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-05 0:09 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 13/29] arm_mpam: Probe the hardware features resctrl supports James Morse
2025-09-11 15:29 ` Jonathan Cameron
2025-09-29 17:45 ` James Morse
2025-09-11 15:37 ` Ben Horgan
2025-09-29 17:45 ` James Morse
2025-09-30 13:32 ` Ben Horgan
2025-10-05 0:53 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 14/29] arm_mpam: Merge supported features during mpam_enable() into mpam_class James Morse
2025-09-12 11:49 ` Jonathan Cameron
2025-09-29 17:45 ` James Morse
2025-10-05 1:28 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 15/29] arm_mpam: Reset MSC controls from cpu hp callbacks James Morse
2025-09-12 11:25 ` Ben Horgan
2025-09-12 14:52 ` Ben Horgan
2025-09-30 17:06 ` James Morse
2025-09-30 17:06 ` James Morse
2025-09-12 11:55 ` Jonathan Cameron
2025-09-30 17:06 ` James Morse
2025-09-30 2:51 ` Shaopeng Tan (Fujitsu)
2025-10-01 9:51 ` James Morse
[not found] ` <1f084a23-7211-4291-99b6-7f5192fb9096@nvidia.com>
2025-10-17 18:50 ` James Morse
2025-09-10 20:42 ` [PATCH v2 16/29] arm_mpam: Add a helper to touch an MSC from any CPU James Morse
2025-09-12 11:57 ` Jonathan Cameron
2025-10-01 9:50 ` James Morse
2025-10-05 21:08 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 17/29] arm_mpam: Extend reset logic to allow devices to be reset any time James Morse
2025-09-12 11:42 ` Ben Horgan
2025-10-02 18:02 ` James Morse
2025-09-12 12:02 ` Jonathan Cameron
2025-09-30 17:06 ` James Morse
2025-09-25 7:16 ` Fenghua Yu
2025-10-02 18:02 ` James Morse
2025-09-10 20:42 ` [PATCH v2 18/29] arm_mpam: Register and enable IRQs James Morse
2025-09-12 12:12 ` Jonathan Cameron
2025-10-02 18:02 ` James Morse
2025-09-12 14:40 ` Ben Horgan
2025-10-02 18:03 ` James Morse
2025-09-12 15:22 ` Dave Martin
2025-10-03 18:02 ` James Morse
2025-09-25 6:33 ` Fenghua Yu
2025-10-03 18:03 ` James Morse
2025-09-10 20:42 ` [PATCH v2 19/29] arm_mpam: Use a static key to indicate when mpam is enabled James Morse
2025-09-12 12:13 ` Jonathan Cameron
2025-10-03 18:03 ` James Morse
2025-09-12 14:42 ` Ben Horgan
2025-10-03 18:03 ` James Morse
2025-09-26 2:31 ` Fenghua Yu
2025-10-03 18:04 ` James Morse
2025-09-10 20:43 ` [PATCH v2 20/29] arm_mpam: Allow configuration to be applied and restored during cpu online James Morse
2025-09-12 12:22 ` Jonathan Cameron
2025-10-07 11:11 ` James Morse
2025-09-12 15:00 ` Ben Horgan
2025-09-25 6:53 ` Fenghua Yu
2025-10-03 18:04 ` James Morse
2025-09-10 20:43 ` [PATCH v2 21/29] arm_mpam: Probe and reset the rest of the features James Morse
2025-09-12 13:07 ` Jonathan Cameron
2025-10-03 18:05 ` James Morse
2025-09-10 20:43 ` [PATCH v2 22/29] arm_mpam: Add helpers to allocate monitors James Morse
2025-09-12 13:11 ` Jonathan Cameron
2025-10-06 14:57 ` James Morse
2025-10-06 15:56 ` James Morse
2025-09-10 20:43 ` [PATCH v2 23/29] arm_mpam: Add mpam_msmon_read() to read monitor value James Morse
2025-09-11 15:46 ` Ben Horgan
2025-09-12 15:08 ` Ben Horgan
2025-10-06 16:00 ` James Morse
2025-10-06 15:59 ` James Morse
2025-09-12 13:21 ` Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-25 2:30 ` Fenghua Yu
2025-10-09 17:48 ` James Morse
2025-09-10 20:43 ` James Morse [this message]
2025-09-12 13:24 ` [PATCH v2 24/29] arm_mpam: Track bandwidth counter state for overflow and power management Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-12 15:55 ` Ben Horgan
2025-10-13 16:29 ` James Morse
2025-09-10 20:43 ` [PATCH v2 25/29] arm_mpam: Probe for long/lwd mbwu counters James Morse
2025-09-12 13:27 ` Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-10 20:43 ` [PATCH v2 26/29] arm_mpam: Use long MBWU counters if supported James Morse
2025-09-12 13:29 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-26 4:51 ` Fenghua Yu
2025-09-10 20:43 ` [PATCH v2 27/29] arm_mpam: Add helper to reset saved mbwu state James Morse
2025-09-12 13:33 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-18 2:35 ` Shaopeng Tan (Fujitsu)
2025-10-10 16:53 ` James Morse
2025-09-26 4:11 ` Fenghua Yu
2025-10-10 16:53 ` James Morse
2025-09-10 20:43 ` [PATCH v2 28/29] arm_mpam: Add kunit test for bitmap reset James Morse
2025-09-12 13:37 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-12 16:06 ` Ben Horgan
2025-10-10 16:53 ` James Morse
2025-09-26 2:35 ` Fenghua Yu
2025-10-10 16:53 ` James Morse
2025-09-10 20:43 ` [PATCH v2 29/29] arm_mpam: Add kunit tests for props_mismatch() James Morse
2025-09-12 13:41 ` Jonathan Cameron
2025-10-10 16:54 ` James Morse
2025-09-12 16:01 ` Ben Horgan
2025-10-10 16:54 ` James Morse
2025-09-26 2:36 ` Fenghua Yu
2025-10-10 16:54 ` James Morse
2025-09-25 7:18 ` [PATCH v2 00/29] arm_mpam: Add basic mpam driver Fenghua Yu
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