From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC3C9CAC58D for ; Thu, 11 Sep 2025 11:06:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Subject:CC:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=obhp0MwVVogEta7GZvMh/n4Hkt/1ooEG9BFWf66+jBw=; b=I/ENe1Fs6x5vWhJ9+D5CUo5EvW c+7NODo6PBhDWGVe+eUtEALpxNITbrnwf44A8keJMFeK7dRKNHFhRV9n33PG11gwz54A+uhqYUiyI xdkR72D7tcntHg9m3NqBVdeamQ3G3y56eULcN9CZOO1XCFv6SlVpqkeH1dZ3dwjmJR/KjBP9SthB6 MkRys32j3HqL8B30dRhzKoMCteRXwOHhouVJAM94YkiIiHXnHcVzNH5YElDSIXJ7aUUDk9Qspxzki bbHuaiEI7vy0agGECHKNH0SGkQJ89PbiGUwRoh1Vv+4MG1jydDFX2iSOk5UyDQQtflT2vMQmRMXwF jVhvc5fQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uwf8B-00000002XVW-24kO; Thu, 11 Sep 2025 11:06:23 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uwf89-00000002XU8-1iE6 for linux-arm-kernel@lists.infradead.org; Thu, 11 Sep 2025 11:06:22 +0000 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4cMvlH2pWCz6L64s; Thu, 11 Sep 2025 19:02:03 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id C5FCD1402F5; Thu, 11 Sep 2025 19:06:16 +0800 (CST) Received: from localhost (10.203.177.15) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 11 Sep 2025 13:06:15 +0200 Date: Thu, 11 Sep 2025 12:06:14 +0100 From: Jonathan Cameron To: James Morse CC: , , , D Scott Phillips OS , , , , , , Jamie Iles , Xin Hao , , , , David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , , , Rob Herring , Rohit Mathew , "Rafael Wysocki" , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , "Will Deacon" , Greg Kroah-Hartman , Danilo Krummrich Subject: Re: [PATCH v2 04/29] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id Message-ID: <20250911120614.00001e92@huawei.com> In-Reply-To: <20250910204309.20751-5-james.morse@arm.com> References: <20250910204309.20751-1-james.morse@arm.com> <20250910204309.20751-5-james.morse@arm.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.203.177.15] X-ClientProxiedBy: lhrpeml100012.china.huawei.com (7.191.174.184) To frapeml500008.china.huawei.com (7.182.85.71) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250911_040621_734062_3305E719 X-CRM114-Status: GOOD ( 29.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 10 Sep 2025 20:42:44 +0000 James Morse wrote: > MPAM identifies CPUs by the cache_id in the PPTT cache structure. > > The driver needs to know which CPUs are associated with the cache. > The CPUs may not all be online, so cacheinfo does not have the > information. > > Add a helper to pull this information out of the PPTT. > > CC: Rohit Mathew > Signed-off-by: James Morse > Reviewed-by: Sudeep Holla > --- > Changes since v1: > * Added punctuation to the commit message. > * Removed a comment about an alternative implementaion. > * Made the loop continue with a warning if a CPU is missing from the PPTT. > > Changes since RFC: > * acpi_count_levels() now returns a value. > * Converted the table-get stuff to use Jonathan's cleanup helper. Why for this case does it makes sense to not just use acpi_get_pptt()? Also you don't introduce the acpi_get_table_reg() helper until patch 6. > * Dropped Sudeep's Review tag due to the cleanup change. > --- > drivers/acpi/pptt.c | 59 ++++++++++++++++++++++++++++++++++++++++++++ > include/linux/acpi.h | 6 +++++ > 2 files changed, 65 insertions(+) > > diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c > index c5f2a51d280b..c379a9952b00 100644 > --- a/drivers/acpi/pptt.c > +++ b/drivers/acpi/pptt.c > @@ -966,3 +966,62 @@ int find_acpi_cache_level_from_id(u32 cache_id) > > return -ENOENT; > } > + > +/** > + * acpi_pptt_get_cpumask_from_cache_id() - Get the cpus associated with the > + * specified cache > + * @cache_id: The id field of the unified cache Similar comment to previous patch. If we are going to make this unified only can we reflect that in the function name. I worry this will get reused and that restriction will surprise. > + * @cpus: Where to build the cpumask > + * > + * Determine which CPUs are below this cache in the PPTT. This allows the property > + * to be found even if the CPUs are offline. > + * > + * The PPTT table must be rev 3 or later, > + * > + * Return: -ENOENT if the PPTT doesn't exist, or the cache cannot be found. > + * Otherwise returns 0 and sets the cpus in the provided cpumask. > + */ > +int acpi_pptt_get_cpumask_from_cache_id(u32 cache_id, cpumask_t *cpus) > +{ > + u32 acpi_cpu_id; > + int level, cpu, num_levels; > + struct acpi_pptt_cache *cache; > + struct acpi_pptt_cache_v1 *cache_v1; > + struct acpi_pptt_processor *cpu_node; > + struct acpi_table_header *table __free(acpi_table) = acpi_get_table_ret(ACPI_SIG_PPTT, 0); > + > + cpumask_clear(cpus); > + > + if (IS_ERR(table)) > + return -ENOENT; > + > + if (table->revision < 3) > + return -ENOENT; > + > + for_each_possible_cpu(cpu) { > + acpi_cpu_id = get_acpi_id_for_cpu(cpu); > + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); > + if (WARN_ON_ONCE(!cpu_node)) > + continue; > + num_levels = acpi_count_levels(table, cpu_node, NULL); > + > + /* Start at 1 for L1 */ > + for (level = 1; level <= num_levels; level++) { > + cache = acpi_find_cache_node(table, acpi_cpu_id, > + ACPI_PPTT_CACHE_TYPE_UNIFIED, > + level, &cpu_node); > + if (!cache) > + continue; > + > + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1, > + cache, > + sizeof(struct acpi_pptt_cache)); sizeof(*cache) makes more sense to me. > + > + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID && > + cache_v1->cache_id == cache_id) > + cpumask_set_cpu(cpu, cpus); > + } > + } > + > + return 0; > +}