Re: [PATCH v1 5/5] clk: samsung: introduce exynos8890 clock driver

[kernel test robot <lkp@intel.com>]

Hi Ivaylo,

kernel test robot noticed the following build errors:

[auto build test ERROR on krzk-dt/for-next]
[also build test ERROR on linus/master v6.17-rc5]
[cannot apply to krzk/for-next clk/clk-next next-20250912]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ivaylo-Ivanov/dt-bindings-clock-add-exynos8890-SoC/20250914-202302
base:   https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt.git for-next
patch link:    https://lore.kernel.org/r/20250914122116.2616801-6-ivo.ivanov.ivanov1%40gmail.com
patch subject: [PATCH v1 5/5] clk: samsung: introduce exynos8890 clock driver
config: csky-randconfig-001-20250914 (https://download.01.org/0day-ci/archive/20250914/202509142156.qb0htmwo-lkp@intel.com/config)
compiler: csky-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250914/202509142156.qb0htmwo-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509142156.qb0htmwo-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/clk/samsung/clk-exynos8890.c: In function 'exynos8890_init_clocks':
>> drivers/clk/samsung/clk-exynos8890.c:49:45: error: implicit declaration of function 'FIELD_PREP' [-Wimplicit-function-declaration]
      49 | #define QCH_DIS                 (QCH_MASK | FIELD_PREP(QCH_EN_MASK, 0))
         |                                             ^~~~~~~~~~
   drivers/clk/samsung/clk-exynos8890.c:88:31: note: in expansion of macro 'QCH_DIS'
      88 |                         val = QCH_DIS;
         |                               ^~~~~~~


vim +/FIELD_PREP +49 drivers/clk/samsung/clk-exynos8890.c

    39	
    40	/*
    41	 * As exynos8890 first introduced hwacg, cmu registers are mapped similarly
    42	 * to exynos7, with the exception of the new q-state and q-ch registers that
    43	 * can set the behavior of automatic gates.
    44	 */
    45	
    46	/* decoded magic number from downstream */
    47	#define QCH_EN_MASK		BIT(0)
    48	#define QCH_MASK		(GENMASK(19, 16) | BIT(12))
  > 49	#define QCH_DIS			(QCH_MASK | FIELD_PREP(QCH_EN_MASK, 0))
    50	

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