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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Jinqian Yang <yangjinqian1@huawei.com>
Subject: [PATCH 7/8] KVM: arm64: Convert SCTLR_EL1 RES0 handling to compute_reg_res0_bits()
Date: Wed, 17 Sep 2025 17:58:39 +0100	[thread overview]
Message-ID: <20250917165840.1633412-8-maz@kernel.org> (raw)
In-Reply-To: <20250917165840.1633412-1-maz@kernel.org>

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/config.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c
index 0e6723bd75775..09af46e16ac30 100644
--- a/arch/arm64/kvm/config.c
+++ b/arch/arm64/kvm/config.c
@@ -1050,7 +1050,7 @@ static const
 struct reg_to_feat_map tcr2_el2_feat_map = FEAT_MAP(TCR2_EL2, FEAT_TCR2,
 						    tcr2_el2_bit_feat_map);
 
-static const struct reg_bits_to_feat_map sctlr_el1_feat_map[] = {
+static const struct reg_bits_to_feat_map sctlr_el1_bit_feat_map[] = {
 	NEEDS_FEAT(SCTLR_EL1_CP15BEN	|
 		   SCTLR_EL1_ITD	|
 		   SCTLR_EL1_SED,
@@ -1124,6 +1124,10 @@ static const struct reg_bits_to_feat_map sctlr_el1_feat_map[] = {
 		   FEAT_AA64EL1),
 };
 
+static const
+struct reg_to_feat_map sctlr_el1_feat_map = FEAT_MAP(SCTLR_EL1, FEAT_AA64EL1,
+						    sctlr_el1_bit_feat_map);
+
 static const struct reg_bits_to_feat_map mdcr_el2_feat_map[] = {
 	NEEDS_FEAT(MDCR_EL2_EBWE, FEAT_Debugv8p9),
 	NEEDS_FEAT(MDCR_EL2_TDOSA, FEAT_DoubleLock),
@@ -1196,8 +1200,7 @@ void __init check_feature_map(void)
 	check_reg_feat_map(&hcr_feat_map);
 	check_reg_feat_map(&sctlr2_feat_map);
 	check_reg_feat_map(&tcr2_el2_feat_map);
-	check_feat_map(sctlr_el1_feat_map, ARRAY_SIZE(sctlr_el1_feat_map),
-		       SCTLR_EL1_RES0, "SCTLR_EL1");
+	check_reg_feat_map(&sctlr_el1_feat_map);
 	check_feat_map(mdcr_el2_feat_map, ARRAY_SIZE(mdcr_el2_feat_map),
 		       MDCR_EL2_RES0, "MDCR_EL2");
 }
@@ -1407,9 +1410,7 @@ void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *r
 		*res1 = TCR2_EL2_RES1;
 		break;
 	case SCTLR_EL1:
-		*res0 = compute_res0_bits(kvm, sctlr_el1_feat_map,
-					  ARRAY_SIZE(sctlr_el1_feat_map), 0, 0);
-		*res0 |= SCTLR_EL1_RES0;
+		*res0 = compute_reg_res0_bits(kvm, &sctlr_el1_feat_map, 0, 0);
 		*res1 = SCTLR_EL1_RES1;
 		break;
 	case MDCR_EL2:
-- 
2.39.2



  parent reply	other threads:[~2025-09-17 16:59 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-17 16:58 [PATCH 0/8] KVM: arm64: Handle effective RES0 behaviour of undefined registers Marc Zyngier
2025-09-17 16:58 ` [PATCH 1/8] KVM: arm64: Enforce absence of FEAT_FGT on FGT registers Marc Zyngier
2025-09-18  6:07   ` Oliver Upton
2025-09-18  9:53     ` Marc Zyngier
2025-09-17 16:58 ` [PATCH 2/8] KVM: arm64: Enforce absence of FEAT_FGT2 on FGT2 registers Marc Zyngier
2025-09-17 16:58 ` [PATCH 3/8] KVM: arm64: Enforce absence of FEAT_HCX on HCRX_EL2 Marc Zyngier
2025-09-17 16:58 ` [PATCH 4/8] KVM: arm64: Convert HCR_EL2 RES0 handling to compute_reg_res0_bits() Marc Zyngier
2025-09-17 16:58 ` [PATCH 5/8] KVM: arm64: Enforce absence of FEAT_SCTLR2 on SCTLR2_EL{1,2} Marc Zyngier
2025-09-17 16:58 ` [PATCH 6/8] KVM: arm64: Enforce absence of FEAT_TCR2 on TCR2_EL2 Marc Zyngier
2025-09-17 16:58 ` Marc Zyngier [this message]
2025-09-17 16:58 ` [PATCH 8/8] KVM: arm64: Convert MDCR_EL2 RES0 handling to compute_reg_res0_bits() Marc Zyngier

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