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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="u4M+BrM+qE9Xid1p" Content-Disposition: inline In-Reply-To: <20250929-mtk-pll-rpm-v1-1-49541777878d@collabora.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --u4M+BrM+qE9Xid1p Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Sep 29, 2025 at 02:13:20PM +0200, Nicolas Frattaroli wrote: > The clock controllers for mfgpll, mfgpll-sc0, and mfgpll-sc1 all need > CLK_TOP_MFG_EB to be on if their clock control registers are touched in > any way. >=20 > This was not known at the time this binding was written, as this > dependency only came to light when I started poking at the MFlexGraphics > hardware, where this undocumented peculiarity made itself known through > SErrors being thrown during register reads. >=20 > Add a clocks property to the binding to describe this relationship, and > mark it as required for the affected clocks. >=20 > Fixes: dd240e95f1be ("dt-bindings: clock: mediatek: Describe MT8196 clock= controllers") > Signed-off-by: Nicolas Frattaroli > --- > .../bindings/clock/mediatek,mt8196-sys-clock.yaml | 28 ++++++++++++++++= ++++++ > 1 file changed, 28 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-= clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-cl= ock.yaml > index 660ab64f390d2e722b7d3e25cf057926da318bc0..41aacd8d5f69050eebdf8392f= 7b652427632f491 100644 > --- a/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.y= aml > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.y= aml > @@ -45,6 +45,9 @@ properties: > reg: > maxItems: 1 > =20 > + clocks: > + maxItems: 1 > + > '#clock-cells': > const: 1 > =20 > @@ -90,6 +93,23 @@ required: > =20 > additionalProperties: false > =20 > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8196-mfgpll-pll-ctrl > + - mediatek,mt8196-mfgpll-sc0-pll-ctrl > + - mediatek,mt8196-mfgpll-sc1-pll-ctrl > + then: > + properties: > + clocks: > + items: > + - description: mfg_eb clock > + required: > + - clocks Don't you want an else: properties: clocks: false here? > + > examples: > - | > apmixedsys_clk: syscon@10000800 { > @@ -104,4 +124,12 @@ examples: > mediatek,hardware-voter =3D <&scp_hwv>; > #clock-cells =3D <1>; > }; > + - | > + #include > =20 > + clock-controller@4b810000 { > + compatible =3D "mediatek,mt8196-mfgpll-pll-ctrl", "syscon"; > + reg =3D <0x4b810000 0x400>; > + clocks =3D <&topckgen CLK_TOP_MFG_EB>; > + #clock-cells =3D <1>; > + }; >=20 > --=20 > 2.51.0 >=20 --u4M+BrM+qE9Xid1p Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaNrCeAAKCRB4tDGHoIJi 0iJxAP4mU6+C8Eh7IxIoYQL1Qb0tkSwfwCjYaPhrKJSDWD8nUwEAx0m/G5GfkzGq vzTWSFTPy8nqiETYWXzWi/6gx3Yqpwo= =JKYV -----END PGP SIGNATURE----- --u4M+BrM+qE9Xid1p--