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(h-178-174-189-39.A498.priv.bahnhof.se. [178.174.189.39]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-58b011343b6sm1933369e87.35.2025.10.03.08.03.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Oct 2025 08:03:10 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Catalin Marinas , Will Deacon , Mark Rutland , Thomas Gleixner Cc: Maulik Shah , Sudeep Holla , Daniel Lezcano , Vincent Guittot , linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Ulf Hansson Subject: [PATCH 2/3] arm64: smp: Implement cpus_has_pending_ipi() Date: Fri, 3 Oct 2025 17:02:44 +0200 Message-ID: <20251003150251.520624-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251003150251.520624-1-ulf.hansson@linaro.org> References: <20251003150251.520624-1-ulf.hansson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251003_080313_692930_20237FEF X-CRM114-Status: GOOD ( 13.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To add support for keeping track of whether there may be a pending IPI scheduled for a CPU or a group of CPUs, let's implement cpus_has_pending_ipi() for arm64. Note, the implementation is intentionally lightweight and doesn't use any additional lock. This is good enough for cpuidle based decisions. Signed-off-by: Ulf Hansson --- arch/arm64/kernel/smp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 68cea3a4a35c..dd1acfa91d44 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -55,6 +55,8 @@ #include +static DEFINE_PER_CPU(bool, pending_ipi); + /* * as from 2.5, kernels no longer have an init_tasks structure * so we need some other way of telling a new secondary core @@ -1012,6 +1014,8 @@ static void do_handle_IPI(int ipinr) if ((unsigned)ipinr < NR_IPI) trace_ipi_exit(ipi_types[ipinr]); + + per_cpu(pending_ipi, cpu) = false; } static irqreturn_t ipi_handler(int irq, void *data) @@ -1024,10 +1028,26 @@ static irqreturn_t ipi_handler(int irq, void *data) static void smp_cross_call(const struct cpumask *target, unsigned int ipinr) { + unsigned int cpu; + + for_each_cpu(cpu, target) + per_cpu(pending_ipi, cpu) = true; + trace_ipi_raise(target, ipi_types[ipinr]); arm64_send_ipi(target, ipinr); } +bool cpus_has_pending_ipi(const struct cpumask *mask) +{ + unsigned int cpu; + + for_each_cpu(cpu, mask) { + if (per_cpu(pending_ipi, cpu)) + return true; + } + return false; +} + static bool ipi_should_be_nmi(enum ipi_msg_type ipi) { if (!system_uses_irq_prio_masking()) -- 2.43.0