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Mon, 06 Oct 2025 16:22:00 -0700 (PDT) Date: Mon, 6 Oct 2025 23:21:25 +0000 In-Reply-To: <20251006232125.1833979-1-royluo@google.com> Mime-Version: 1.0 References: <20251006232125.1833979-1-royluo@google.com> X-Mailer: git-send-email 2.51.0.618.g983fd99d29-goog Message-ID: <20251006232125.1833979-5-royluo@google.com> Subject: [PATCH v1 4/4] dt-bindings: phy: google: Add Google SoC USB PHY From: Roy Luo To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Thinh Nguyen , Philipp Zabel , Peter Griffin , "=?UTF-8?q?Andr=C3=A9=20Draszik?=" , Tudor Ambarus Cc: Joy Chakraborty , Naveen Kumar , Roy Luo , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251007_002203_244815_F728CDBE X-CRM114-Status: GOOD ( 13.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document the USB PHY bindings for Google Tensor SoCs. Signed-off-by: Roy Luo --- .../bindings/phy/google,usb-phy.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/google,usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/google,usb-phy.yaml b/Documentation/devicetree/bindings/phy/google,usb-phy.yaml new file mode 100644 index 000000000000..5552696edfff --- /dev/null +++ b/Documentation/devicetree/bindings/phy/google,usb-phy.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2025, Google LLC +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/google,usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google USB PHY + +maintainers: + - Roy Luo + +description: + Describes the USB PHY block on Google Tensor SoCs. + +properties: + compatible: + items: + - enum: + - google,lga-usb-phy + - const: google,usb-phy + + reg: + minItems: 3 + maxItems: 3 + + reg-names: + items: + - const: usb2_cfg_csr + - const: dp_top_csr + - const: usb_top_cfg_csr + + "#phy-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: usb2_phy_clk + + resets: + maxItems: 1 + + reset-names: + items: + - const: usb2_phy_reset + + power-domains: + maxItems: 1 + + orientation-switch: + type: boolean + description: + Indicates the PHY as a handler of USB Type-C orientation changes + +required: + - compatible + - reg + - reg-names + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb_phy: usb_phy@c410000 { + compatible = "google,lga-usb-phy", "google,usb-phy"; + reg = <0 0x0c450014 0 0xc>, + <0 0x0c637000 0 0xa0>, + <0 0x0c45002c 0 0x4>; + reg-names = "usb2_cfg_csr", "dp_top_csr", "usb_top_cfg_csr"; + #phy-cells = <1>; + clocks = <&hsion_usb2_phy_reset_clk>; + clock-names = "usb2_phy_clk"; + resets = <&hsion_resets_usb2_phy>; + reset-names = "usb2_phy_reset"; + power-domains = <&hsio_n_usb_pd>; + orientation-switch; + }; + }; +... -- 2.51.0.618.g983fd99d29-goog