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From: Sasha Levin <sashal@kernel.org>
To: patches@lists.linux.dev, stable@vger.kernel.org
Cc: Bryan Brattlof <bb@ti.com>, Nishanth Menon <nm@ti.com>,
	Sasha Levin <sashal@kernel.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 6.17-6.16] soc: ti: k3-socinfo: Add information for AM62L SR1.1
Date: Thu,  9 Oct 2025 11:54:42 -0400	[thread overview]
Message-ID: <20251009155752.773732-16-sashal@kernel.org> (raw)
In-Reply-To: <20251009155752.773732-1-sashal@kernel.org>

From: Bryan Brattlof <bb@ti.com>

[ Upstream commit 037e496038f6e4cfb3642a0ffc2db19838d564dd ]

The second silicon revision for the AM62L was mainly a ROM revision
and therefore this silicon revision is labeled SR1.1

Add a new decode array to properly identify this revision as SR1.1

Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250908-62l-chipid-v1-1-9c7194148140@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

LLM Generated explanations, may be completely bogus:

YES
- The patch teaches `k3_chipinfo_variant_to_sr()` how to decode AM62Lx
  silicon variant 0/1 into the correct revision strings by adding
  `am62lx_rev_string_map[] = {"1.0","1.1"}` and a dedicated `case
  JTAG_ID_PARTNO_AM62LX` (drivers/soc/ti/k3-socinfo.c:65,
  drivers/soc/ti/k3-socinfo.c:92). Without it, the existing default
  branch (drivers/soc/ti/k3-socinfo.c:98) blindly prints `SR<x>.0`, so
  the new SR1.1 silicon shows up as “SR2.0”—a clear mis-identification
  bug.
- That revision string is what gets registered in
  `/sys/devices/soc0/revision` and is what subsystem code keys on via
  `soc_device_match()`. We already rely on that mechanism for other K3
  parts (e.g. the AM62Px SR1.1 quirk in
  drivers/mmc/host/sdhci_am654.c:896), so shipping incorrect data
  prevents present and future AM62Lx-specific fixes or workarounds from
  triggering and can mislead userspace diagnostics.
- The change is tightly scoped to string decoding, has no architectural
  side effects, and mirrors the precedent set for J721E SR2.0 support
  (drivers/soc/ti/k3-socinfo.c:65-103 history). Risk is minimal while
  correcting real user-visible behaviour for existing hardware.
- Ensure the earlier ID-enabling commit (`soc: ti: k3-socinfo: Add JTAG
  ID for AM62LX`, c62bc66d53de) is in the target stable branch; with
  that prerequisite met, this bug-fix-style decode update is safe to
  pick up.

 drivers/soc/ti/k3-socinfo.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c
index d716be113c84f..50c170a995f90 100644
--- a/drivers/soc/ti/k3-socinfo.c
+++ b/drivers/soc/ti/k3-socinfo.c
@@ -66,6 +66,10 @@ static const char * const j721e_rev_string_map[] = {
 	"1.0", "1.1", "2.0",
 };
 
+static const char * const am62lx_rev_string_map[] = {
+	"1.0", "1.1",
+};
+
 static int
 k3_chipinfo_partno_to_names(unsigned int partno,
 			    struct soc_device_attribute *soc_dev_attr)
@@ -92,6 +96,12 @@ k3_chipinfo_variant_to_sr(unsigned int partno, unsigned int variant,
 		soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%s",
 						   j721e_rev_string_map[variant]);
 		break;
+	case JTAG_ID_PARTNO_AM62LX:
+		if (variant >= ARRAY_SIZE(am62lx_rev_string_map))
+			goto err_unknown_variant;
+		soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%s",
+						   am62lx_rev_string_map[variant]);
+		break;
 	default:
 		variant++;
 		soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%x.0",
-- 
2.51.0



  parent reply	other threads:[~2025-10-09 15:58 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20251009155752.773732-1-sashal@kernel.org>
2025-10-09 15:54 ` [PATCH AUTOSEL 6.17-6.12] soc: apple: mailbox: Add Apple A11 and T2 mailbox support Sasha Levin
2025-10-10  2:22   ` Nick Chan
2025-11-04  0:22     ` Sasha Levin
2025-10-09 15:54 ` [PATCH AUTOSEL 6.17-6.12] soc: sunxi: sram: add entry for a523 Sasha Levin
2025-10-09 16:38   ` Andre Przywara
2025-11-04  0:22     ` Sasha Levin
2025-10-09 15:54 ` [PATCH AUTOSEL 6.17-5.10] pinctrl: single: fix bias pull up/down handling in pin_config_set Sasha Levin
2025-10-09 15:54 ` Sasha Levin [this message]
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17] mfd: macsmc: Add "apple,t8103-smc" compatible Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-5.4] mfd: stmpe: Remove IRQ domain upon removal Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-5.4] cpufreq/longhaul: handle NULL policy in longhaul_exit Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-6.16] firmware: ti_sci: Enable abort handling of entry to LPM Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-5.15] soc: aspeed: socinfo: Add AST27xx silicon IDs Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-6.6] arm64: zynqmp: Revert usb node drive strength and slew rate for zcu106 Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-6.12] arm64: zynqmp: Disable coresight by default Sasha Levin
2025-10-09 15:55 ` [PATCH AUTOSEL 6.17-6.6] pmdomain: apple: Add "apple,t8103-pmgr-pwrstate" Sasha Levin
2025-10-09 15:56 ` [PATCH AUTOSEL 6.17-6.16] arm64: versal-net: Update rtc calibration value Sasha Levin
2025-10-09 15:56 ` [PATCH AUTOSEL 6.17-5.10] soc: ti: pruss: don't use %pK through printk Sasha Levin
2025-10-09 15:56 ` [PATCH AUTOSEL 6.17-5.4] mfd: stmpe-i2c: Add missing MODULE_LICENSE Sasha Levin
2025-10-09 15:56 ` [PATCH AUTOSEL 6.17-5.4] irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment Sasha Levin

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