From: Jernej Skrabec <jernej.skrabec@gmail.com>
To: mripard@kernel.org, wens@csie.org
Cc: maarten.lankhorst@linux.intel.com, tzimmermann@suse.de,
airlied@gmail.com, simona@ffwll.ch, samuel@sholland.org,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
Jernej Skrabec <jernej.skrabec@gmail.com>
Subject: [PATCH 11/30] drm/sun4i: de2/de3: Simplify CSC config interface
Date: Sun, 12 Oct 2025 21:23:11 +0200 [thread overview]
Message-ID: <20251012192330.6903-12-jernej.skrabec@gmail.com> (raw)
In-Reply-To: <20251012192330.6903-1-jernej.skrabec@gmail.com>
Merging both function into one lets this one decide on it's own if CSC
should be enabled or not. Currently heuristics for that is pretty simple
- enable it for YUV formats and disable for RGB. DE3 and newer allows
YUV pipeline, which will be easier to implement these way.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 89 ++++++++++----------------
drivers/gpu/drm/sun4i/sun8i_csc.h | 9 ++-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 11 +---
3 files changed, 40 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c
index c100d29b1a89..cf0c5121661b 100644
--- a/drivers/gpu/drm/sun4i/sun8i_csc.c
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.c
@@ -107,23 +107,28 @@ static const u32 yuv2rgb_de3[2][3][12] = {
},
};
-static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
- enum sun8i_csc_mode mode,
- enum drm_color_encoding encoding,
- enum drm_color_range range)
+static void sun8i_csc_setup(struct regmap *map, u32 base,
+ enum sun8i_csc_mode mode,
+ enum drm_color_encoding encoding,
+ enum drm_color_range range)
{
+ u32 base_reg, val;
const u32 *table;
- u32 base_reg;
int i;
table = yuv2rgb[range][encoding];
switch (mode) {
+ case SUN8I_CSC_MODE_OFF:
+ val = 0;
+ break;
case SUN8I_CSC_MODE_YUV2RGB:
+ val = SUN8I_CSC_CTRL_EN;
base_reg = SUN8I_CSC_COEFF(base, 0);
regmap_bulk_write(map, base_reg, table, 12);
break;
case SUN8I_CSC_MODE_YVU2RGB:
+ val = SUN8I_CSC_CTRL_EN;
for (i = 0; i < 12; i++) {
if ((i & 3) == 1)
base_reg = SUN8I_CSC_COEFF(base, i + 1);
@@ -135,28 +140,37 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
}
break;
default:
+ val = 0;
DRM_WARN("Wrong CSC mode specified.\n");
return;
}
+
+ regmap_write(map, SUN8I_CSC_CTRL(base), val);
}
-static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer,
- enum sun8i_csc_mode mode,
- enum drm_color_encoding encoding,
- enum drm_color_range range)
+static void sun8i_de3_ccsc_setup(struct regmap *map, int layer,
+ enum sun8i_csc_mode mode,
+ enum drm_color_encoding encoding,
+ enum drm_color_range range)
{
+ u32 addr, val, mask;
const u32 *table;
- u32 addr;
int i;
+ mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer);
table = yuv2rgb_de3[range][encoding];
switch (mode) {
+ case SUN8I_CSC_MODE_OFF:
+ val = 0;
+ break;
case SUN8I_CSC_MODE_YUV2RGB:
+ val = mask;
addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0);
regmap_bulk_write(map, addr, table, 12);
break;
case SUN8I_CSC_MODE_YVU2RGB:
+ val = mask;
for (i = 0; i < 12; i++) {
if ((i & 3) == 1)
addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
@@ -173,67 +187,30 @@ static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer,
}
break;
default:
+ val = 0;
DRM_WARN("Wrong CSC mode specified.\n");
return;
}
-}
-
-static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable)
-{
- u32 val;
-
- if (enable)
- val = SUN8I_CSC_CTRL_EN;
- else
- val = 0;
-
- regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val);
-}
-
-static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable)
-{
- u32 val, mask;
-
- mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer);
-
- if (enable)
- val = mask;
- else
- val = 0;
regmap_update_bits(map, SUN50I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE),
mask, val);
}
-void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
- enum sun8i_csc_mode mode,
- enum drm_color_encoding encoding,
- enum drm_color_range range)
+void sun8i_csc_config(struct sun8i_mixer *mixer, int layer,
+ enum sun8i_csc_mode mode,
+ enum drm_color_encoding encoding,
+ enum drm_color_range range)
{
u32 base;
if (mixer->cfg->de_type == SUN8I_MIXER_DE3) {
- sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer,
- mode, encoding, range);
+ sun8i_de3_ccsc_setup(mixer->engine.regs, layer,
+ mode, encoding, range);
return;
}
base = ccsc_base[mixer->cfg->ccsc][layer];
- sun8i_csc_set_coefficients(mixer->engine.regs, base,
- mode, encoding, range);
-}
-
-void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable)
-{
- u32 base;
-
- if (mixer->cfg->de_type == SUN8I_MIXER_DE3) {
- sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable);
- return;
- }
-
- base = ccsc_base[mixer->cfg->ccsc][layer];
-
- sun8i_csc_enable(mixer->engine.regs, base, enable);
+ sun8i_csc_setup(mixer->engine.regs, base,
+ mode, encoding, range);
}
diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h
index 828b86fd0cab..27b6807fc786 100644
--- a/drivers/gpu/drm/sun4i/sun8i_csc.h
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.h
@@ -28,10 +28,9 @@ enum sun8i_csc_mode {
SUN8I_CSC_MODE_YVU2RGB,
};
-void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
- enum sun8i_csc_mode mode,
- enum drm_color_encoding encoding,
- enum drm_color_range range);
-void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable);
+void sun8i_csc_config(struct sun8i_mixer *mixer, int layer,
+ enum sun8i_csc_mode mode,
+ enum drm_color_encoding encoding,
+ enum drm_color_range range);
#endif
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 727117658c6c..adcd05acba1b 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -213,14 +213,9 @@ static void sun8i_vi_layer_update_colors(struct sun8i_mixer *mixer, int channel,
fmt = state->fb->format;
csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
- if (csc_mode != SUN8I_CSC_MODE_OFF) {
- sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
- state->color_encoding,
- state->color_range);
- sun8i_csc_enable_ccsc(mixer, channel, true);
- } else {
- sun8i_csc_enable_ccsc(mixer, channel, false);
- }
+ sun8i_csc_config(mixer, channel, csc_mode,
+ state->color_encoding,
+ state->color_range);
}
static void sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
--
2.51.0
next prev parent reply other threads:[~2025-10-12 19:24 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-12 19:23 [PATCH 00/30] drm/sun4i: Refactor layer code for proper DE33 support Jernej Skrabec
2025-10-12 19:23 ` [PATCH 01/30] drm/sun4i: mixer: Fix up DE33 channel macros Jernej Skrabec
2025-10-19 7:41 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 02/30] drm/sun4i: mixer: Remove ccsc cfg for >= DE3 Jernej Skrabec
2025-10-19 7:42 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 03/30] drm/sun4i: de2: Initialize layer fields earlier Jernej Skrabec
2025-10-19 7:44 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 04/30] drm/sun4i: ui_layer: Move check from update to check callback Jernej Skrabec
2025-10-19 8:24 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 05/30] drm/sun4i: vi_layer: " Jernej Skrabec
2025-10-19 8:25 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 06/30] drm/sun4i: layers: Make atomic commit functions void Jernej Skrabec
2025-10-19 8:51 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 07/30] drm/sun4i: Move blender config from layers to mixer Jernej Skrabec
2025-10-27 16:00 ` Chen-Yu Tsai
2025-10-27 18:11 ` Jernej Škrabec
2025-10-12 19:23 ` [PATCH 08/30] drm/sun4i: ui layer: Write attributes in one go Jernej Skrabec
2025-10-27 16:04 ` Chen-Yu Tsai
2025-10-27 18:13 ` Jernej Škrabec
2025-10-27 18:16 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 09/30] drm/sun4i: vi " Jernej Skrabec
2025-10-27 16:24 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 10/30] drm/sun4i: mixer: Remove setting layer enable bit Jernej Skrabec
2025-10-27 16:28 ` Chen-Yu Tsai
2025-10-12 19:23 ` Jernej Skrabec [this message]
2025-10-27 16:49 ` [PATCH 11/30] drm/sun4i: de2/de3: Simplify CSC config interface Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 12/30] drm/sun4i: csc: Simplify arguments with taking plane state Jernej Skrabec
2025-10-27 16:51 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 13/30] drm/sun4i: de2/de3: Move plane type determination to mixer Jernej Skrabec
2025-10-27 17:14 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 14/30] drm/sun4i: ui_layer: Change index meaning Jernej Skrabec
2025-10-27 16:59 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 15/30] drm/sun4i: layer: move num of planes calc out of layer code Jernej Skrabec
2025-10-27 16:55 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 16/30] drm/sun4i: ui_layer: use layer struct instead of multiple args Jernej Skrabec
2025-10-27 17:43 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 17/30] drm/sun4i: vi_layer: " Jernej Skrabec
2025-10-27 17:45 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 18/30] drm/sun4i: ui_scaler: use layer instead of mixer for args Jernej Skrabec
2025-10-27 17:49 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 19/30] drm/sun4i: vi_scaler: " Jernej Skrabec
2025-10-27 17:50 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 20/30] drm/sun4i: layers: Make regmap for layers configurable Jernej Skrabec
2025-11-03 15:14 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 21/30] drm/sun4i: csc: use layer arg instead of mixer Jernej Skrabec
2025-11-03 14:56 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 22/30] drm/sun4i: layers: add physical index arg Jernej Skrabec
2025-11-03 15:11 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 23/30] drm/sun4i: vi_scaler: Update DE33 base calculation Jernej Skrabec
2025-11-03 17:00 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 24/30] drm/sun4i: mixer: Convert heuristics to quirk Jernej Skrabec
2025-11-03 17:05 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 25/30] drm/sun4i: ui_scaler: drop sanity checks Jernej Skrabec
2025-11-03 17:05 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 26/30] drm/sun4i: mixer: Add quirk for number of VI scalers Jernej Skrabec
2025-11-03 17:11 ` Chen-Yu Tsai
2025-11-04 16:50 ` Jernej Škrabec
2025-10-12 19:23 ` [PATCH 27/30] drm/sun4i: mixer: split out layer config Jernej Skrabec
2025-11-03 17:20 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 28/30] drm/sun4i: layer: replace mixer with layer struct Jernej Skrabec
2025-11-03 17:31 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 29/30] drm/sun4i: vi_scaler: Find mixer from crtc Jernej Skrabec
2025-11-03 17:33 ` Chen-Yu Tsai
2025-10-12 19:23 ` [PATCH 30/30] drm/sun4i: Nuke mixer pointer from layer code Jernej Skrabec
2025-11-03 17:34 ` Chen-Yu Tsai
2025-10-31 7:50 ` [PATCH 00/30] drm/sun4i: Refactor layer code for proper DE33 support Ryan Walklin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251012192330.6903-12-jernej.skrabec@gmail.com \
--to=jernej.skrabec@gmail.com \
--cc=airlied@gmail.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=maarten.lankhorst@linux.intel.com \
--cc=mripard@kernel.org \
--cc=samuel@sholland.org \
--cc=simona@ffwll.ch \
--cc=tzimmermann@suse.de \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).