From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4C09CCD1BE for ; Wed, 22 Oct 2025 06:55:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Cc:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=okB6pByIyI/e7nRJH3quN/+Tf6BalqrmJcLACRktqs8=; b=wLi/NKt7chuFXm oW/mlik8qADn4Xx1ITEPUfjvnB8ywukr4LKg35+Wib1bwgrkZM5iZ13/wXSXl6DvfHgipNuY3GqTt iJLG2eSGgL3ZZRysepe0rCdY5/vKGXTf+EuH92/iJXBl6+PWATdtn51MQejFsVyQ7W6DCghPnsKDc nmqodLPybz8qSwp69WlxaEBXyHZlD4dOqWyfAOUc/uHWxLr3HeSSwnlyG+c59c0dP/Yf30uWztfOw /FIf/Qftpt7IpbNkLchpvq/JZD8MDbfCkeQFHmn05yaUqGLIuzq0pKKLK/Ry1ZwTg0F2sVlANKtX+ xhSGyYx97IHstDkxJBcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vBSkj-00000001jsh-2ApS; Wed, 22 Oct 2025 06:55:21 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vBSkg-00000001jrA-2FIK for linux-arm-kernel@lists.infradead.org; Wed, 22 Oct 2025 06:55:20 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 22 Oct 2025 14:55:07 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 22 Oct 2025 14:55:07 +0800 From: Ryan Chen To: ryan_chen , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , , Kevin Chen , , , , Subject: [PATCH v5 0/3] AST2700 interrupt controller hierarchy support Date: Wed, 22 Oct 2025 14:55:04 +0800 Message-ID: <20251022065507.1152071-1-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251021_235518_594315_8DB9B79F X-CRM114-Status: GOOD ( 12.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series introduces YAML bindings and driver support for the ASPEED AST2700 interrupt controller hierarchy. The AST2700 SoC contains two top-level interrupt controller blocks, INTC0 and INTC1, each responsible for routing different interrupt groups to various CPU targets. v5: - Adds two new YAML bindings: - aspeed,ast2700-intc0.yaml - aspeed,ast2700-intc1.yaml - irq-aspeed-intc.c - add aspeed,ast2700-intc0-ic, aspeed,ast2700-intc0-ic compatible. v4: - aspeed,ast2700-intc.yaml - Clarify the relationship between INTC0/INTC1 parent nodes, the aspeed,ast2700-intc-ic child nodes, and the GIC. - Add a block diagram and DT examples showing the cascaded wiring (GIC <- INTC0 <- INTC1 children). - Mirrors the datasheet-described topology and register map, including the separation of INTC0/INTC1 regions. - Lets DT unambiguously express first-level (GIC parent) and cascaded second-level (INTC0 parent) interrupt controllers via examples that use `interrupts` for INTC0 children and `interrupts-extended` for INTC1 children routed into INTC0. - irq-ast2700-intc.c - Drop all string decoding and human readable tables. Debugfs now dumps raw routing/protection registers only. - Split into a separate source file and made it modular - If the compatible not match ast2700-intc0/1, bail out return -ENODEV. v3: - aspeed,ast2700-intc.yaml - Clarify the relationship between INTC0/INTC1 parent nodes, the aspeed,ast2700-intc-ic child nodes, and the GIC. - Add a block diagram and DT examples showing the cascaded wiring (GIC <- INTC0 <- INTC1 children). - Mirrors the datasheet-described topology and register map, including the separation of INTC0/INTC1 regions and their routing/protection registers. - Lets DT unambiguously express first-level (GIC parent) and cascaded second-level (INTC0 parent) interrupt controllers via examples that use `interrupts` for INTC0 children and `interrupts-extended` for INTC1 children routed into INTC0. - irq-aspeed-intc.c - separate c file from irq-aspeed-intc.c - make m v2: - fix dt bindingcheck Ryan Chen (3): dt-bindings: interrupt-controller: aspeed,ast2700: Add support for INTC hierarchy Irqchip/ast2700-intc: add debugfs support for routing/protection display irqchip: aspeed: add compatible strings for ast2700-intc0-ic and ast2700-intc1-ic .../aspeed,ast2700-intc0.yaml | 97 ++++++++++ .../aspeed,ast2700-intc1.yaml | 94 ++++++++++ drivers/irqchip/Kconfig | 6 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-aspeed-intc.c | 2 + drivers/irqchip/irq-ast2700-intc.c | 174 ++++++++++++++++++ 6 files changed, 374 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml create mode 100644 drivers/irqchip/irq-ast2700-intc.c -- 2.34.1