From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81DE1CCD193 for ; Thu, 23 Oct 2025 19:51:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=PhIaBIZ7am8ZgbVJpVk9cc5jOr1kEQ9WXXGWhedx1UE=; b=F9Hrc54ZvXqVj549stLu7r1uTJ r41eCzBQ6u3OYe79NlE49GtoDHwS4sJSpw+oETr29whB+QDGrZhpX8CGneoIkDCHT8gMtE42sR8vb 31LSr1IEFQs0X7uDYqsa13N/XDJ4WO1FC8Z/T9YyTcc3lDNC+6KRZSE/GqNbHJwI0ZedvyBd95op3 ZD9vh4+jiXIHuFDSuvvKOt0Dnf+FhAoibfUxcbHpX92bf6U6W79EZexmfthebYWnaz2DtpFNYLcvP gpkTQTI3dYlPfkXjiMlyMZ5AhMBRagOnL7FdPPtfhSHyNd6A4t28kVSUZ0uR55QBmu+yaYbIrGMHW bpqDZC9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vC1L4-00000007PtM-25ul; Thu, 23 Oct 2025 19:51:10 +0000 Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vC1Kr-00000007Phf-1MJY; Thu, 23 Oct 2025 19:50:58 +0000 ARC-Seal: i=1; a=rsa-sha256; t=1761249046; cv=none; d=zohomail.com; s=zohoarc; b=VZ7GWreo75ZUbL9NNCfxPCVpi7qyPKbN5E0qEVlsDRuM1OJUevGcgYWgYk/bYOukdONnZvCNbL+e8uW1tiCysgXW/ieBPelR2KWD154JyT4YM3MRRwlvT+EiPwui/6RAnEQX4b9UbFZrIO53IPycfb5FwhQIsU54on7NjUcyHdE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1761249046; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=PhIaBIZ7am8ZgbVJpVk9cc5jOr1kEQ9WXXGWhedx1UE=; b=I/Zj7AFuhWqpfE6z5dtPqUJH5+6TOpR9KF5JEXXBoJqAdhmZfSZrHGhI4pPNsmG+7XNzyisTh0WFpDWDATkWBrd8mpvaeCx0gAFPevwZ/2y4dlWnx8qH1+GuoM5PiDsRzcaGpGFU5CQDeUL2tgsY6KH/M05jOR4ZfyjY5TDJtxY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1761249046; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=PhIaBIZ7am8ZgbVJpVk9cc5jOr1kEQ9WXXGWhedx1UE=; b=IALLLXg+O8N+V3C97iwKeh7iHsM7TGErkWmo/47PLIFXc2yebmstjPJ1CSoXpNYo Ov2VtN5wqY4FCjsU/ns6+FBukuoX4HRFJjXA6vEeGSyX97vi2hKyWa/iizmxgeWVpHV aU7YT+d5LRPf8D89CJD+Upnd+J73YPsj77ajWa+Q= Received: by mx.zohomail.com with SMTPS id 1761249044423531.8145925936169; Thu, 23 Oct 2025 12:50:44 -0700 (PDT) From: Nicolas Frattaroli Date: Thu, 23 Oct 2025 21:49:23 +0200 Subject: [PATCH v3 05/24] phy: mediatek: ufs: Add support for resets MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251023-mt8196-ufs-v3-5-0f04b4a795ff@collabora.com> References: <20251023-mt8196-ufs-v3-0-0f04b4a795ff@collabora.com> In-Reply-To: <20251023-mt8196-ufs-v3-0-0f04b4a795ff@collabora.com> To: Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Peter Wang , Stanley Jhu , "James E.J. Bottomley" , "Martin K. Petersen" , Philipp Zabel , Liam Girdwood , Mark Brown Cc: Louis-Alexis Eyraud , kernel@collabora.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251023_125057_414857_95E00360 X-CRM114-Status: GOOD ( 19.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MediaTek UFS PHY supports PHY resets. Until now, they've been implemented in the UFS host driver. Since they were never documented in the UFS HCI node's DT bindings, and no mainline DT uses it, it's fine if it's moved to the correct location, which is the PHY driver. Implement the MPHY reset logic in this driver and expose it through the phy subsystem's reset op. The reset itself is optional, as judging by other mainline devices that use this hardware, it's not required for the device to function. If no reset is present, the reset op returns -EOPNOTSUPP, which means that the ufshci driver can detect it's present and not double sleep in its own reset function, where it will call the phy reset. Reviewed-by: Philipp Zabel Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Peter Wang Signed-off-by: Nicolas Frattaroli --- drivers/phy/mediatek/phy-mtk-ufs.c | 71 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/phy/mediatek/phy-mtk-ufs.c b/drivers/phy/mediatek/phy-mtk-ufs.c index 0cb5a25b1b7a..d77ba689ebc8 100644 --- a/drivers/phy/mediatek/phy-mtk-ufs.c +++ b/drivers/phy/mediatek/phy-mtk-ufs.c @@ -4,6 +4,7 @@ * Author: Stanley Chu */ +#include #include #include #include @@ -11,6 +12,8 @@ #include #include #include +#include +#include #include "phy-mtk-io.h" @@ -36,9 +39,17 @@ #define UFSPHY_CLKS_CNT 2 +#define UFS_MTK_SIP_MPHY_CTRL BIT(8) + +enum ufs_mtk_mphy_op { + UFS_MPHY_BACKUP = 0, + UFS_MPHY_RESTORE +}; + struct ufs_mtk_phy { struct device *dev; void __iomem *mmio; + struct reset_control *reset; struct clk_bulk_data clks[UFSPHY_CLKS_CNT]; }; @@ -141,9 +152,59 @@ static int ufs_mtk_phy_power_off(struct phy *generic_phy) return 0; } +static int ufs_mtk_phy_ctrl(struct ufs_mtk_phy *phy, enum ufs_mtk_mphy_op op) +{ + struct arm_smccc_res res; + + arm_smccc_smc(MTK_SIP_UFS_CONTROL, UFS_MTK_SIP_MPHY_CTRL, op, + 0, 0, 0, 0, 0, &res); + + switch (res.a0) { + case SMCCC_RET_NOT_SUPPORTED: + return -EOPNOTSUPP; + case SMCCC_RET_INVALID_PARAMETER: + return -EINVAL; + default: + return 0; + } +} + +static int ufs_mtk_phy_reset(struct phy *generic_phy) +{ + struct ufs_mtk_phy *phy = get_ufs_mtk_phy(generic_phy); + int ret; + + if (!phy->reset) + return -EOPNOTSUPP; + + ret = reset_control_assert(phy->reset); + if (ret) + return ret; + + usleep_range(100, 110); + + ret = reset_control_deassert(phy->reset); + if (ret) + return ret; + + /* + * To avoid double-sleep and other unintended side-effects in the ufshci + * driver, don't return the phy_ctrl retval here, but just return -EPROTO. + */ + ret = ufs_mtk_phy_ctrl(phy, UFS_MPHY_RESTORE); + if (ret) { + dev_err(phy->dev, "UFS_MPHY_RESTORE SMC command failed: %pe\n", + ERR_PTR(ret)); + return -EPROTO; + } + + return 0; +} + static const struct phy_ops ufs_mtk_phy_ops = { .power_on = ufs_mtk_phy_power_on, .power_off = ufs_mtk_phy_power_off, + .reset = ufs_mtk_phy_reset, .owner = THIS_MODULE, }; @@ -163,8 +224,18 @@ static int ufs_mtk_phy_probe(struct platform_device *pdev) if (IS_ERR(phy->mmio)) return PTR_ERR(phy->mmio); + phy->reset = devm_reset_control_get_optional(dev, NULL); + if (IS_ERR(phy->reset)) + return dev_err_probe(dev, PTR_ERR(phy->reset), "Failed to get reset\n"); + phy->dev = dev; + if (phy->reset) { + ret = ufs_mtk_phy_ctrl(phy, UFS_MPHY_BACKUP); + if (ret) + return dev_err_probe(dev, ret, "Failed to back up MPHY\n"); + } + ret = ufs_mtk_phy_clk_init(phy); if (ret) return ret; -- 2.51.1.dirty