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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <rmk+kernel@armlinux.org.uk>,
	devicetree@vger.kernel.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	Daniel Scally <dan.scally@ideasonboard.com>,
	Kieran Bingham <kieran.bingham@ideasonboard.com>,
	Stefan Klug <stefan.klug@ideasonboard.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Fabio Estevam <festevam@gmail.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Rob Herring <robh@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Shawn Guo <shawnguo@kernel.org>
Subject: Re: [PATCH] arm64: dts: imx8mp-debix-model-a: Disable EEE for 1000T
Date: Mon, 27 Oct 2025 09:27:49 +0200	[thread overview]
Message-ID: <20251027072749.GA7811@pendragon.ideasonboard.com> (raw)
In-Reply-To: <e87ff7f2-d16f-41f2-b781-b175cfb84b21@lunn.ch>

Hi Andrew,

Thank you for your quick reply.

On Mon, Oct 27, 2025 at 04:08:42AM +0100, Andrew Lunn wrote:
> Adding Russell King
> 
> On Sun, Oct 26, 2025 at 02:29:04PM +0200, Laurent Pinchart wrote:
> > Energy Efficient Ethernet (EEE) is broken at least for 1000T on the EQOS
> > (DWMAC) interface. When connected to an EEE-enabled peer, the ethernet
> > devices produces an interrupts storm. Disable EEE support to fix it.
> > 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > The exact reason for the interrupt storm is unknown, and my attempts to
> > diagnose it was hindered by my lack of expertise with DWMAC. As far as I
> > understand, the DWMAC implements EEE support, and so does the RTL8211E
> > PHY according to its datasheet.
> 
> I believe for DWMAC it is a synthesis option. However, there is a bit
> indicating if the hardware supports it.
> 
> The PHY should not be able to trigger an interrupt storm in the
> MAC. So this is likely to be an DWMAC issue.
> 
> Which interrupt bit is causing the storm?

That's where I hit my first wall :-)

I've tried to diagnose the issue by adding interrupt counters to
dwmac4_irq_status(), counting interrupts for each bit of GMAC_INT_STATUS
(0x00b0). Bit RGSMIIIS (0) is the only one that seems linked to the
interrupts storm, increasing at around 10k per second. However, the
corresponding bit in GMAC_INT_EN (0x00b4) is *not* set.

The ENET_EQOS interrupt on the i.MX8MP is an OR'ed signal that combines
four interrupt sources:

- ENET QOS TSN LPI RX exit Interrupt
- ENET QOS TSN Host System Interrupt
- ENET QOS TSN Host System RX Channel Interrupts
- ENET QOS TSN Host System TX Channel Interrupts

The last two interrupt sources are themselves local OR of channels[4:0].

I ould suspect that the LPI RX exit interrupt is the one that fires
constantly given its name, but I'm not sure how to test that.

> > What each side does exactly is unknown
> > to me. One theory I've heard to explain the issue is that the two
> > implementations conflict. There is no register in the RTL8211E PHY to
> > disable EEE on the PHY side while still advertising its support to the
> > peer and relying on the implementation in the DWMAC (if this even makes
> > sense)
> 
> It does not make sense. EEE is split into two major parts. The two
> PHYs communicate with each other to negotiate the feature, if both
> ends support it and both ends want to use it. The result of this
> negotiation is then passed to the MACs.
> 
> It is then the MAC who decides when to send a Low Power Indication to
> the PHY to tell the PHY to enter low power mode. The MAC also wakes
> the PHY when it has packets to send.
> 
> A quick look at the data sheet for the RTL8211E suggests this is what
> is supports.
> 
> There are a few PHYs which implement SmartEEE, or some other similar
> name. They operate differently, the PHY does it all, and the MAC is
> not even aware EEE is happening. Such PHYs should really only be
> paired with MACs which do not support EEE. An EEE capable MAC paired
> with a SmartEEE PHY could have problems, but hopefully the EEE
> abilities and negotiation registers in the PHY would be sufficient to
> dissuade the MAC from doing EEE. But i would not expect a setup like
> this to trigger an interrupt storm.

Thanks for the explanation, I read documents to try and figure out how
it worked and didn't find such a clear and concise high-level summary.

I'm not very experienced with ethernet, but I can easily test patches or
even rough ideas on hardware.

-- 
Regards,

Laurent Pinchart


  reply	other threads:[~2025-10-27  7:28 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-26 12:29 [PATCH] arm64: dts: imx8mp-debix-model-a: Disable EEE for 1000T Laurent Pinchart
2025-10-27  1:31 ` Fabio Estevam
2025-10-27  3:08 ` Andrew Lunn
2025-10-27  7:27   ` Laurent Pinchart [this message]
2025-10-27  8:47     ` Emanuele Ghidoli
2025-10-27  9:00       ` Russell King (Oracle)
2025-10-27  9:18         ` Emanuele Ghidoli
2025-10-27  9:32     ` Russell King (Oracle)
2025-10-27 23:08       ` Laurent Pinchart
2025-10-27 11:22     ` Russell King (Oracle)
2025-10-27 23:15       ` Laurent Pinchart
2025-10-27  9:12   ` Oleksij Rempel
2025-10-27 10:02     ` Laurent Pinchart
2025-10-27 10:23       ` Oleksij Rempel
2025-10-27 10:31         ` Laurent Pinchart
2025-10-27 10:34           ` Russell King (Oracle)
2025-10-27 10:44             ` Oleksij Rempel
2025-10-27 10:48               ` Russell King (Oracle)
2025-10-27 12:50                 ` Andrew Lunn
2025-10-27 14:50                   ` Oleksij Rempel
2025-11-12 12:34     ` Russell King (Oracle)
2025-11-12 12:41       ` Kieran Bingham
2025-11-12 12:56         ` Russell King (Oracle)
2025-11-13  1:17           ` Laurent Pinchart
2025-11-12 21:32       ` Laurent Pinchart
2025-10-27  9:07 ` Russell King (Oracle)
2025-10-27  9:33   ` Laurent Pinchart
2025-10-27  9:45     ` Russell King (Oracle)
2025-10-27  9:55       ` Laurent Pinchart
2025-10-27 13:33   ` Russell King (Oracle)
2025-10-27 15:13 ` Russell King (Oracle)
2025-10-27 19:52   ` Andrew Lunn
2025-10-27 23:46   ` Laurent Pinchart
2025-10-28  0:57     ` Russell King (Oracle)
2025-10-28  7:18       ` Laurent Pinchart
2025-11-11 23:54         ` Laurent Pinchart
2025-11-12 12:03           ` Russell King (Oracle)
2025-11-12 22:25             ` Laurent Pinchart
2025-11-13  1:06               ` Laurent Pinchart
2025-11-13 10:59                 ` Russell King (Oracle)
2025-11-14 22:26                   ` Laurent Pinchart
2025-11-18  1:50                     ` Wei Fang
2025-11-22  7:22                       ` Laurent Pinchart
2025-11-22  9:57                         ` Russell King (Oracle)
2025-11-23  5:38                           ` Laurent Pinchart
2025-11-23  8:52                             ` Russell King (Oracle)
2025-11-23 15:23                               ` Laurent Pinchart
2025-11-23 17:11                                 ` Russell King (Oracle)
2025-11-24  0:12                                   ` Laurent Pinchart
2025-11-24  5:44                                     ` Oleksij Rempel
2025-11-24  8:43                                     ` Russell King (Oracle)

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