From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFB26CCF9EC for ; Mon, 27 Oct 2025 09:59:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Mx0wbcJusxdWDWeeR/W1dlzX+Zib8pRJ+o3I/Zf5n0Q=; b=GsZmO3AGRa2Y+jtKxFBcHl0z8y 17mNJ0XZw7KavoeaZokS4p6y+ZfQmZA/MA1Xierwn86HIqsAQg7Z9gTNjh/G3ycthITGyTrGMMY3d 4/7W/AOUAoKLasMy+TOc+95zSgwpUBirDyMaRx4OM8fBzhsQcLAy+WX1A87nfXBfhFNbnDckfJWlg AXEJTTWzVvt363z/9BH+EQjNp8UHbZ83wxhrgCOrzioF/UGdWBsobItXBKUvcAkGl2eKaks0dGOIT gxoNXeJUIlegVpxVYSNbxSSmLqvff68e4Todt68pP/BuY91dhp3Nx8po7XOzM0/MsmNAj/8AAUoMv IghmrKvQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vDK0E-0000000DbFC-1gfB; Mon, 27 Oct 2025 09:59:02 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vDJzw-0000000DaqR-2DG0; Mon, 27 Oct 2025 09:58:45 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 27 Oct 2025 17:58:26 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 27 Oct 2025 17:58:26 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 7/9] PCI: Add FMT, TYPE and CPL status definition for TLP header Date: Mon, 27 Oct 2025 17:58:23 +0800 Message-ID: <20251027095825.181161-8-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251027095825.181161-1-jacky_chou@aspeedtech.com> References: <20251027095825.181161-1-jacky_chou@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251027_025844_575303_961B5934 X-CRM114-Status: UNSURE ( 6.19 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to PCIe specification, add FMT, TYPE and CPL status definition for TLP header. Signed-off-by: Jacky Chou --- drivers/pci/pci.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 4492b809094b..9e5cf35409c8 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -88,6 +88,21 @@ struct pcie_tlp_log; #define PCI_BUS_BRIDGE_MEM_WINDOW 1 #define PCI_BUS_BRIDGE_PREF_MEM_WINDOW 2 +/* Format of TLP; PCIe r7.0, sec 2.2.1 */ +#define PCIE_TLP_FMT_3DW_NO_DATA 0x00 /* 3DW header, no data */ +#define PCIE_TLP_FMT_4DW_NO_DATA 0x01 /* 4DW header, no data */ +#define PCIE_TLP_FMT_3DW_DATA 0x02 /* 3DW header, with data */ +#define PCIE_TLP_FMT_4DW_DATA 0x03 /* 4DW header, with data */ + +/* Type of TLP; PCIe r7.0, sec 2.2.1 */ +#define PCIE_TLP_TYPE_CFG0_RD 0x04 /* Config Type 0 Read Request */ +#define PCIE_TLP_TYPE_CFG0_WR 0x04 /* Config Type 0 Write Request */ +#define PCIE_TLP_TYPE_CFG1_RD 0x05 /* Config Type 1 Read Request */ +#define PCIE_TLP_TYPE_CFG1_WR 0x05 /* Config Type 1 Write Request */ + +/* Cpl. status of Complete; PCIe r7.0, sec 2.2.9.1 */ +#define PCIE_CPL_STS_SUCCESS 0x00 /* Successful Completion */ + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump; -- 2.34.1