From: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org>
To: Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Chuan Liu <chuan.liu@amlogic.com>,
da@libre.computer
Subject: [PATCH v2 4/5] clk: amlogic: Optimize PLL enable timing
Date: Thu, 30 Oct 2025 13:24:14 +0800 [thread overview]
Message-ID: <20251030-optimize_pll_driver-v2-4-37273f5b25ab@amlogic.com> (raw)
In-Reply-To: <20251030-optimize_pll_driver-v2-0-37273f5b25ab@amlogic.com>
From: Chuan Liu <chuan.liu@amlogic.com>
l_detect controls the enablement of the PLL lock detection module.
It should remain disabled while the internal PLL circuits are
reaching a steady state; otherwise, the lock signal may be falsely
triggered high.
Before enabling the internal power supply of the PLL, l_detect should
be disabled. After the PLL’s internal circuits have stabilized,
l_detect should be enabled to prevent false lock signal triggers.
Currently, only A1 supports both l_detect and current_en, so this
patch will only affect A1.
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/clk/meson/clk-pll.c | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 6c794adb8ccd..c6eebde1f516 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -383,36 +383,38 @@ static int meson_clk_pll_enable(struct clk_hw *hw)
if (MESON_PARM_APPLICABLE(&pll->rst))
meson_parm_write(clk->map, &pll->rst, 1);
+ /* Disable the PLL lock-detect module */
+ if (MESON_PARM_APPLICABLE(&pll->l_detect))
+ meson_parm_write(clk->map, &pll->l_detect, 1);
+
/* Enable the pll */
meson_parm_write(clk->map, &pll->en, 1);
/* Wait for Bandgap and LDO to power up and stabilize */
udelay(20);
- /* Take the pll out reset */
- if (MESON_PARM_APPLICABLE(&pll->rst))
- meson_parm_write(clk->map, &pll->rst, 0);
-
- /* Wait for PLL loop stabilization */
- udelay(20);
-
/*
* Compared with the previous SoCs, self-adaption current module
* is newly added for A1, keep the new power-on sequence to enable the
* PLL. The sequence is:
- * 1. enable the pll, delay for 10us
+ * 1. enable the pll, delay for 20us
* 2. enable the pll self-adaption current module, delay for 40us
* 3. enable the lock detect module
*/
if (MESON_PARM_APPLICABLE(&pll->current_en)) {
- udelay(10);
meson_parm_write(clk->map, &pll->current_en, 1);
- udelay(40);
+ udelay(20);
}
- if (MESON_PARM_APPLICABLE(&pll->l_detect)) {
- meson_parm_write(clk->map, &pll->l_detect, 1);
+ /* Take the pll out reset */
+ if (MESON_PARM_APPLICABLE(&pll->rst))
+ meson_parm_write(clk->map, &pll->rst, 0);
+
+ /* Wait for PLL loop stabilization */
+ udelay(20);
+
+ /* Enable the lock-detect module */
+ if (MESON_PARM_APPLICABLE(&pll->l_detect))
meson_parm_write(clk->map, &pll->l_detect, 0);
- }
if (meson_clk_pll_wait_lock(hw)) {
/* disable PLL when PLL lock failed. */
--
2.42.0
next prev parent reply other threads:[~2025-10-30 5:24 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-30 5:24 [PATCH v2 0/5] clk: amlogic: optimize the PLL driver Chuan Liu via B4 Relay
2025-10-30 5:24 ` [PATCH v2 1/5] clk: amlogic: Fix out-of-range PLL frequency setting Chuan Liu via B4 Relay
2025-10-30 5:24 ` [PATCH v2 2/5] clk: amlogic: Improve the issue of PLL lock failures Chuan Liu via B4 Relay
2025-10-30 8:41 ` Jerome Brunet
2025-10-30 9:09 ` Chuan Liu
2025-10-30 5:24 ` [PATCH v2 3/5] clk: amlogic: Add handling for PLL lock failure Chuan Liu via B4 Relay
2025-10-30 8:32 ` Jerome Brunet
2025-10-30 9:15 ` Chuan Liu
2025-10-30 11:48 ` Chuan Liu
2025-10-30 5:24 ` Chuan Liu via B4 Relay [this message]
2025-10-30 8:38 ` [PATCH v2 4/5] clk: amlogic: Optimize PLL enable timing Jerome Brunet
2025-10-30 9:23 ` Chuan Liu
2025-10-30 5:24 ` [PATCH v2 5/5] clk: amlogic: Change the active level of l_detect Chuan Liu via B4 Relay
2025-10-30 8:40 ` Jerome Brunet
2025-10-30 9:27 ` Chuan Liu
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