Linux-ARM-Kernel Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ashish Mhetre <amhetre@nvidia.com>
Cc: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
	 robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	 thierry.reding@gmail.com, jonathanh@nvidia.com, jgg@ziepe.ca,
	nicolinc@nvidia.com,  linux-tegra@nvidia.com,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH 2/3] dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
Date: Fri, 31 Oct 2025 09:14:25 +0100	[thread overview]
Message-ID: <20251031-witty-sociable-chachalaca-b73dbc@kuoka> (raw)
In-Reply-To: <20251031062959.1521704-3-amhetre@nvidia.com>

On Fri, Oct 31, 2025 at 06:29:58AM +0000, Ashish Mhetre wrote:
> The Command Queue Virtualization (CMDQV) hardware is part of the
> SMMUv3 implementation on NVIDIA Tegra SoCs. It assists in
> virtualizing the command queue for the SMMU.

If this is specific to Nvidia, then I think you need specific front
compatible and disallow it for other vendors.

> 
> Add a new device tree binding document for nvidia,tegra264-cmdqv.
> 
> Also update the arm,smmu-v3 binding to include an optional nvidia,cmdqv
> property. This property is a phandle to the CMDQV device node, allowing
> the SMMU driver to associate with its corresponding CMDQV instance.
> 
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
> ---
>  .../bindings/iommu/arm,smmu-v3.yaml           | 10 ++++
>  .../bindings/iommu/nvidia,tegra264-cmdqv.yaml | 46 +++++++++++++++++++
>  2 files changed, 56 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> index 75fcf4cb52d9..edc0c20a0c80 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> @@ -58,6 +58,15 @@ properties:
>  
>    msi-parent: true
>  
> +  nvidia,cmdqv:
> +    description: |
> +      A phandle to its pairing CMDQV extension for an implementation on NVIDIA
> +      Tegra SoC.
> +
> +      If this property is absent, CMDQ-Virtualization won't be used and SMMU
> +      will only use its own CMDQ.
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +
>    hisilicon,broken-prefetch-cmd:
>      type: boolean
>      description: Avoid sending CMD_PREFETCH_* commands to the SMMU.
> @@ -92,4 +101,5 @@ examples:
>              dma-coherent;
>              #iommu-cells = <1>;
>              msi-parent = <&its 0xff0000>;
> +            nvidia,cmdqv = <&cmdqv>;
>      };
> diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml
> new file mode 100644
> index 000000000000..f22c370278a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra264 CMDQV

Missing blank line

> +description: |

Do not need '|' unless you need to preserve formatting.

> +  The CMDQ-Virtualization hardware block is part of the SMMUv3 implementation
> +  on Tegra264 SoCs. It assists in virtualizing the command queue for the SMMU.
> +
> +maintainers:
> +  - NVIDIA Corporation <linux-tegra@nvidia.com>

No. It should be a person. If entire Nvidia cannot find a person, I
don't think we are interested in having this in the kernel.

> +
> +properties:
> +  compatible:
> +    const: nvidia,tegra264-cmdqv
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interrupt-names:
> +    items:
> +      - const: cmdqv

Drop interript names, obvious.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - interrupt-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    cmdqv: cmdqv@8105200000 {

Drop unused label

Best regards,
Krzysztof



  reply	other threads:[~2025-10-31  8:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-31  6:29 [PATCH 0/3] Add device tree support for NVIDIA Tegra CMDQV Ashish Mhetre
2025-10-31  6:29 ` [PATCH 1/3] iommu/arm-smmu-v3: Add device-tree support for CMDQV driver Ashish Mhetre
2025-10-31 17:29   ` Nicolin Chen
2025-11-03 13:06     ` Ashish Mhetre
2025-10-31  6:29 ` [PATCH 2/3] dt-bindings: iommu: Add NVIDIA Tegra CMDQV support Ashish Mhetre
2025-10-31  8:14   ` Krzysztof Kozlowski [this message]
2025-10-31 21:00     ` Nicolin Chen
2025-11-03 13:54     ` Ashish Mhetre
2025-11-10  6:50       ` Ashish Mhetre
2025-11-20  6:07       ` Ashish Mhetre
2025-11-20 10:23         ` Robin Murphy
2025-11-21  5:46           ` Ashish Mhetre
2025-10-31  6:29 ` [PATCH 3/3] arm64: dts: nvidia: Add nodes for CMDQV Ashish Mhetre

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251031-witty-sociable-chachalaca-b73dbc@kuoka \
    --to=krzk@kernel.org \
    --cc=amhetre@nvidia.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=iommu@lists.linux.dev \
    --cc=jgg@ziepe.ca \
    --cc=jonathanh@nvidia.com \
    --cc=joro@8bytes.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@nvidia.com \
    --cc=linux-tegra@vger.kernel.org \
    --cc=nicolinc@nvidia.com \
    --cc=robh@kernel.org \
    --cc=robin.murphy@arm.com \
    --cc=thierry.reding@gmail.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox