From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: maz@kernel.org, oliver.upton@linux.dev, will@kernel.org,
joey.gouly@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, catalin.marinas@arm.com,
vladimir.murzin@arm.com, tabba@google.com
Subject: [PATCH v1 4/8] KVM: arm64: Refactor vcpu_set_hcrx() to reduce indentation
Date: Tue, 4 Nov 2025 12:59:02 +0000 [thread overview]
Message-ID: <20251104125906.1919426-5-tabba@google.com> (raw)
In-Reply-To: <20251104125906.1919426-1-tabba@google.com>
Invert the main conditional check in vcpu_set_hcrx() to return
immediately if the CPU does not support FEAT_HCX
(ARM64_HAS_HCX).
This refactoring pattern avoids wrapping the entire function body in
an 'if' block, reducing indentation and improving readability as the
function continues to grow.
No functional change intended.
Signed-off-by: Fuad Tabba <tabba@google.com>
---
arch/arm64/include/asm/kvm_emulate.h | 54 ++++++++++++++--------------
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 7880e8290a20..034e1b39de6c 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -674,40 +674,40 @@ static inline void vcpu_set_hcrx(struct kvm_vcpu *vcpu)
{
struct kvm *kvm = vcpu->kvm;
- if (cpus_have_final_cap(ARM64_HAS_HCX)) {
- /*
- * In general, all HCRX_EL2 bits are gated by a feature.
- * The only reason we can set SMPME without checking any
- * feature is that its effects are not directly observable
- * from the guest.
- */
- vcpu->arch.hcrx_el2 = HCRX_EL2_SMPME;
+ if (!cpus_have_final_cap(ARM64_HAS_HCX))
+ return;
- if (kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_MSCEn;
- else
- vcpu->arch.hcrx_el2 |= HCRX_EL2_MCE2;
+ /*
+ * In general, all HCRX_EL2 bits are gated by a feature.
+ * The only reason we can set SMPME without checking any feature is that
+ * its effects are not directly observable from the guest.
+ */
+ vcpu->arch.hcrx_el2 = HCRX_EL2_SMPME;
- if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, NMI, IMP))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_TALLINT;
+ if (kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_MSCEn;
+ else
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_MCE2;
- if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_EnASR;
+ if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, NMI, IMP))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_TALLINT;
- if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_EnALS;
+ if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_EnASR;
- if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_EnAS0;
+ if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_EnALS;
- if (kvm_has_tcr2(kvm))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_TCR2En;
+ if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_EnAS0;
- if (kvm_has_fpmr(kvm))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_EnFPM;
+ if (kvm_has_tcr2(kvm))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_TCR2En;
- if (kvm_has_sctlr2(kvm))
- vcpu->arch.hcrx_el2 |= HCRX_EL2_SCTLR2En;
- }
+ if (kvm_has_fpmr(kvm))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_EnFPM;
+
+ if (kvm_has_sctlr2(kvm))
+ vcpu->arch.hcrx_el2 |= HCRX_EL2_SCTLR2En;
}
#endif /* __ARM64_KVM_EMULATE_H__ */
--
2.51.2.997.g839fc31de9-goog
next prev parent reply other threads:[~2025-11-04 12:59 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 12:58 [PATCH v1 0/8] KVM: arm64: Fixes for guest CPU feature trapping and enabling Fuad Tabba
2025-11-04 12:58 ` [PATCH v1 1/8] KVM: arm64: Route MOPS exceptions to EL2 when guest lacks support Fuad Tabba
2025-11-04 13:44 ` Joey Gouly
2025-11-04 13:49 ` Fuad Tabba
2025-11-04 12:59 ` [PATCH v1 2/8] KVM: arm64: Trap access to ALLINT if FEAT_NMI not supported by the guest Fuad Tabba
2025-11-04 15:15 ` Marc Zyngier
2025-11-04 15:30 ` Fuad Tabba
2025-11-04 17:22 ` Marc Zyngier
2025-11-04 17:30 ` Fuad Tabba
2025-11-04 12:59 ` [PATCH v1 3/8] KVM: arm64: Enable LS64 instructions when supported by guest Fuad Tabba
2025-11-04 15:26 ` Marc Zyngier
2025-11-04 15:31 ` Fuad Tabba
2025-11-04 12:59 ` Fuad Tabba [this message]
2025-11-04 12:59 ` [PATCH v1 5/8] KVM: arm64: Fix Trace Buffer trap polarity for protected VMs Fuad Tabba
2025-11-04 17:50 ` Suzuki K Poulose
2025-11-04 17:56 ` Fuad Tabba
2025-11-04 18:03 ` Suzuki K Poulose
2025-11-04 19:04 ` Fuad Tabba
2025-11-04 12:59 ` [PATCH v1 6/8] KVM: arm64: Fix MTE flag initialization " Fuad Tabba
2025-11-04 12:59 ` [PATCH v1 7/8] KVM: arm64: Prevent host from managing timer offsets " Fuad Tabba
2025-11-04 12:59 ` [PATCH v1 8/8] KVM: arm64: Define FAR_MASK for faulting IPA offset Fuad Tabba
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251104125906.1919426-5-tabba@google.com \
--to=tabba@google.com \
--cc=catalin.marinas@arm.com \
--cc=joey.gouly@arm.com \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=oliver.upton@linux.dev \
--cc=suzuki.poulose@arm.com \
--cc=vladimir.murzin@arm.com \
--cc=will@kernel.org \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).