From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61CD4CCFA13 for ; Thu, 6 Nov 2025 12:43:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=UuE8WJ8FVhOmmwdUfgQkAB8Os9dplaQ1phAbB/AUpAE=; b=lHJQwyKUQTxJBGAJp7LP9cKSE+ URcWNGqUBvJvk4x8hMCIvIGPv4OJDgcV4QEyfxfHK/UnctE4B8L5hCiH8veuR4ROOUjM0fzHN2pV1 eyddgSpDg0k2TdyWnOsrNzt6AlSaXsQtTKAjAVxF33jBxeklGutH2x1fQlo/NK6jHAl9Sun3ARi2I mHwmZsW1DTr4gFjECvp+kGU2rujL9F+0p7YRy7bQcQ1V632BSGy4qPKqzPW2x6KJ8saU/OgcRWJLg XiFi773e30+c5cPaR6hi6RRg2SIvuPK2cnzhfDkTLWSiI5zm7Ihdq2ZaSnpqycPWLKekHXuHmjuPC cWkI91ww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vGzLC-0000000FTVR-3DOP; Thu, 06 Nov 2025 12:43:50 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vGzL9-0000000FTQX-28fx; Thu, 06 Nov 2025 12:43:48 +0000 X-UUID: 399c5d66bb0e11f0a52f393f94899d25-20251106 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UuE8WJ8FVhOmmwdUfgQkAB8Os9dplaQ1phAbB/AUpAE=; b=VeI9fAjHm8xcF21mKwAVIu1Nzb4LrBQDgdLxbwxm2nPB6uwXbgfj9eAexRvdo15yq0Dfbbi3lDWQExOO4S39ZVTqbfISoWzha6eXR3fKsufT+ShdLKgbtu9DHG/ul4VJHR5lUxQKAndEIGfxEDRqc5iRAHexlN6O38ciD+6ZBQs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:4c215f2e-4b8a-40e0-97df-c0fdf7b2ecc4,IP:0,UR L:0,TC:0,Content:0,EDM:-25,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-25 X-CID-META: VersionHash:a9d874c,CLOUDID:b669fe18-3399-4579-97ab-008f994989ea,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:2,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 399c5d66bb0e11f0a52f393f94899d25-20251106 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1590689341; Thu, 06 Nov 2025 05:43:41 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.26; Thu, 6 Nov 2025 20:43:40 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1748.26 via Frontend Transport; Thu, 6 Nov 2025 20:43:40 +0800 From: irving.ch.lin To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ulf Hansson , Richard Cochran CC: Qiqi Wang , , , , , , , , , , , , Subject: [PATCH v3 20/21] pmdomain: mediatek: Add bus protect control flow for MT8189 Date: Thu, 6 Nov 2025 20:42:05 +0800 Message-ID: <20251106124330.1145600-21-irving-ch.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20251106124330.1145600-1-irving-ch.lin@mediatek.com> References: <20251106124330.1145600-1-irving-ch.lin@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251106_044347_557719_FD7E3DB2 X-CRM114-Status: GOOD ( 16.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Irving-CH Lin In MT8189 mminfra power domain, the bus protect policy separates into two parts, one is set before subsys clocks enabled, and another need to enable after subsys clocks enable. Signed-off-by: Irving-CH Lin --- drivers/pmdomain/mediatek/mtk-pm-domains.c | 31 ++++++++++++++++++---- drivers/pmdomain/mediatek/mtk-pm-domains.h | 5 ++++ 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.c b/drivers/pmdomain/mediatek/mtk-pm-domains.c index 164c6b519af3..222846e52daf 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.c +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.c @@ -250,7 +250,7 @@ static int scpsys_bus_protect_set(struct scpsys_domain *pd, MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); } -static int scpsys_bus_protect_enable(struct scpsys_domain *pd) +static int scpsys_bus_protect_enable(struct scpsys_domain *pd, u8 flags) { for (int i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) { const struct scpsys_bus_prot_data *bpd = &pd->data->bp_cfg[i]; @@ -259,6 +259,10 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd) if (!bpd->bus_prot_set_clr_mask) break; + if ((bpd->flags & BUS_PROT_IGNORE_SUBCLK) != + (flags & BUS_PROT_IGNORE_SUBCLK)) + continue; + if (bpd->flags & BUS_PROT_INVERTED) ret = scpsys_bus_protect_clear(pd, bpd); else @@ -270,7 +274,7 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd) return 0; } -static int scpsys_bus_protect_disable(struct scpsys_domain *pd) +static int scpsys_bus_protect_disable(struct scpsys_domain *pd, u8 flags) { for (int i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) { const struct scpsys_bus_prot_data *bpd = &pd->data->bp_cfg[i]; @@ -279,6 +283,10 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd) if (!bpd->bus_prot_set_clr_mask) continue; + if ((bpd->flags & BUS_PROT_IGNORE_SUBCLK) != + (flags & BUS_PROT_IGNORE_SUBCLK)) + continue; + if (bpd->flags & BUS_PROT_INVERTED) ret = scpsys_bus_protect_set(pd, bpd); else @@ -632,6 +640,15 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) if (ret) goto err_pwr_ack; + /* + * In MT8189 mminfra power domain, the bus protect policy separates + * into two parts, one is set before subsys clocks enabled, and another + * need to enable after subsys clocks enable. + */ + ret = scpsys_bus_protect_disable(pd, BUS_PROT_IGNORE_SUBCLK); + if (ret < 0) + goto err_pwr_ack; + /* * In few Mediatek platforms(e.g. MT6779), the bus protect policy is * stricter, which leads to bus protect release must be prior to bus @@ -648,7 +665,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) if (ret < 0) goto err_disable_subsys_clks; - ret = scpsys_bus_protect_disable(pd); + ret = scpsys_bus_protect_disable(pd, 0); if (ret < 0) goto err_disable_sram; @@ -662,7 +679,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) return 0; err_enable_bus_protect: - scpsys_bus_protect_enable(pd); + scpsys_bus_protect_enable(pd, 0); err_disable_sram: scpsys_sram_disable(pd); err_disable_subsys_clks: @@ -683,7 +700,7 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) bool tmp; int ret; - ret = scpsys_bus_protect_enable(pd); + ret = scpsys_bus_protect_enable(pd, 0); if (ret < 0) return ret; @@ -697,6 +714,10 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); + ret = scpsys_bus_protect_enable(pd, BUS_PROT_IGNORE_SUBCLK); + if (ret < 0) + return ret; + if (MTK_SCPD_CAPS(pd, MTK_SCPD_MODEM_PWRSEQ)) scpsys_modem_pwrseq_off(pd); else diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.h b/drivers/pmdomain/mediatek/mtk-pm-domains.h index f608e6ec4744..a5dca24cbc2f 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.h +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.h @@ -56,6 +56,7 @@ enum scpsys_bus_prot_flags { BUS_PROT_REG_UPDATE = BIT(1), BUS_PROT_IGNORE_CLR_ACK = BIT(2), BUS_PROT_INVERTED = BIT(3), + BUS_PROT_IGNORE_SUBCLK = BIT(4), }; enum scpsys_bus_prot_block { @@ -95,6 +96,10 @@ enum scpsys_bus_prot_block { _BUS_PROT(_hwip, _mask, _set, _clr, _mask, _sta, \ BUS_PROT_REG_UPDATE) +#define BUS_PROT_WR_IGN_SUBCLK(_hwip, _mask, _set, _clr, _sta) \ + _BUS_PROT(_hwip, _mask, _set, _clr, _mask, _sta, \ + BUS_PROT_IGNORE_CLR_ACK | BUS_PROT_IGNORE_SUBCLK) + #define BUS_PROT_INFRA_UPDATE_TOPAXI(_mask) \ BUS_PROT_UPDATE(INFRA, _mask, \ INFRA_TOPAXI_PROTECTEN, \ -- 2.45.2