* [PATCH v2 RESEND 1/3] drm: atmel-hlcdc: add support for LVDS encoder type
2025-10-22 9:13 [PATCH v2 RESEND 0/3] Add LVDS display support and PLL handling Manikandan Muralidharan
@ 2025-10-22 9:13 ` Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 3/3] drm: atmel-hlcdc: set LVDS PLL clock rate for LVDS Displays Manikandan Muralidharan
2 siblings, 0 replies; 6+ messages in thread
From: Manikandan Muralidharan @ 2025-10-22 9:13 UTC (permalink / raw)
To: maarten.lankhorst, mripard, tzimmermann, airlied, simona,
nicolas.ferre, alexandre.belloni, claudiu.beznea, lee, dri-devel,
linux-arm-kernel, linux-kernel
Cc: manikandan.m, dharma.b
From: Dharma Balasubiramani <dharma.b@microchip.com>
Add support for encoder type "DRM_MODE_ENCODER_LVDS" with the following
bus formats:
- RGB888_1X7X4_SPWG
- RGB888_1X7X4_JEIDA
- RGB666_1X7X3_SPWG
- RGB666_1X18
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
[manikandan.m@microchip.com: move modifications inside the
atmel_xlcdc_connector_output_lvds fn]
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index e0efc7309b1b..beb825fc4d5d 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -357,6 +357,42 @@ static int atmel_xlcdc_connector_output_dsi(struct drm_encoder *encoder,
return supported_fmts;
}
+static int atmel_xlcdc_connector_output_lvds(struct drm_encoder *encoder,
+ struct drm_display_info *info)
+{
+ int j;
+ unsigned int supported_fmts = 0;
+
+ switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
+ case 0:
+ break;
+ case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+ case MEDIA_BUS_FMT_RGB666_1X18:
+ return ATMEL_HLCDC_RGB666_OUTPUT;
+ case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+ case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+ return ATMEL_HLCDC_RGB888_OUTPUT;
+ default:
+ return -EINVAL;
+ }
+
+ for (j = 0; j < info->num_bus_formats; j++) {
+ switch (info->bus_formats[j]) {
+ case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+ case MEDIA_BUS_FMT_RGB666_1X18:
+ supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
+ break;
+ case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+ case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+ supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
+ break;
+ default:
+ break;
+ }
+ }
+ return supported_fmts;
+}
+
static int atmel_hlcdc_connector_output_mode(struct drm_connector_state *state)
{
struct drm_connector *connector = state->connector;
@@ -375,6 +411,8 @@ static int atmel_hlcdc_connector_output_mode(struct drm_connector_state *state)
*/
if (encoder->encoder_type == DRM_MODE_ENCODER_DSI)
return atmel_xlcdc_connector_output_dsi(encoder, info);
+ else if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
+ return atmel_xlcdc_connector_output_lvds(encoder, info);
switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
case 0:
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display
2025-10-22 9:13 [PATCH v2 RESEND 0/3] Add LVDS display support and PLL handling Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 1/3] drm: atmel-hlcdc: add support for LVDS encoder type Manikandan Muralidharan
@ 2025-10-22 9:13 ` Manikandan Muralidharan
2025-11-06 13:02 ` Lee Jones
2025-10-22 9:13 ` [PATCH v2 RESEND 3/3] drm: atmel-hlcdc: set LVDS PLL clock rate for LVDS Displays Manikandan Muralidharan
2 siblings, 1 reply; 6+ messages in thread
From: Manikandan Muralidharan @ 2025-10-22 9:13 UTC (permalink / raw)
To: maarten.lankhorst, mripard, tzimmermann, airlied, simona,
nicolas.ferre, alexandre.belloni, claudiu.beznea, lee, dri-devel,
linux-arm-kernel, linux-kernel
Cc: manikandan.m, dharma.b
The XLCDC IP supports parallel RGB, MIPI DSI and LVDS Display.
The LCD Generic clock (sys_clk) is used for Parallel RGB and MIPI
displays, while the LVDS PLL clock (lvds_pll_clk) is used for LVDS
displays.Since both the clocks cannot co-exist together in the DT
for a given display, this patch first attempts to retrieve sys_clk
If that fails,it then tries to acquire lvds_pll_clk.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
---
changes in v2:
- Rephrase the comments, commit message and err logs
- Replace dev_err wwith dev_warn
- Remove Initializing sys_clk and lvds_pll_clk to NULL post
devm_kzalloc() call
---
drivers/mfd/atmel-hlcdc.c | 16 ++++++++++++++--
include/linux/mfd/atmel-hlcdc.h | 1 +
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
index 4c4e35d404f3..f680392b01ba 100644
--- a/drivers/mfd/atmel-hlcdc.c
+++ b/drivers/mfd/atmel-hlcdc.c
@@ -108,10 +108,22 @@ static int atmel_hlcdc_probe(struct platform_device *pdev)
return PTR_ERR(hlcdc->periph_clk);
}
+ /*
+ * Retrieve any one of the Main clk required by the LCD to operate:
+ *
+ * LCDC Generic Clock (sys_clk) - Parallel RGB and MIPI displays,
+ * LVDS PLL (lvds_pll_clk) - LVDS display
+ */
hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
if (IS_ERR(hlcdc->sys_clk)) {
- dev_err(dev, "failed to get system clock\n");
- return PTR_ERR(hlcdc->sys_clk);
+ dev_warn(dev,
+ "failed to get LCDC generic clock, trying for LVDS PLL clock instead\n");
+
+ hlcdc->lvds_pll_clk = devm_clk_get(dev, "lvds_pll_clk");
+ if (IS_ERR(hlcdc->lvds_pll_clk)) {
+ dev_err(dev, "failed to get LVDS PLL clock\n");
+ return PTR_ERR(hlcdc->lvds_pll_clk);
+ }
}
hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
index 80d675a03b39..07c2081867fd 100644
--- a/include/linux/mfd/atmel-hlcdc.h
+++ b/include/linux/mfd/atmel-hlcdc.h
@@ -75,6 +75,7 @@
*/
struct atmel_hlcdc {
struct regmap *regmap;
+ struct clk *lvds_pll_clk;
struct clk *periph_clk;
struct clk *sys_clk;
struct clk *slow_clk;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display
2025-10-22 9:13 ` [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display Manikandan Muralidharan
@ 2025-11-06 13:02 ` Lee Jones
2025-11-11 3:05 ` Manikandan.M
0 siblings, 1 reply; 6+ messages in thread
From: Lee Jones @ 2025-11-06 13:02 UTC (permalink / raw)
To: Manikandan Muralidharan
Cc: maarten.lankhorst, mripard, tzimmermann, airlied, simona,
nicolas.ferre, alexandre.belloni, claudiu.beznea, dri-devel,
linux-arm-kernel, linux-kernel, dharma.b
On Wed, 22 Oct 2025, Manikandan Muralidharan wrote:
> The XLCDC IP supports parallel RGB, MIPI DSI and LVDS Display.
> The LCD Generic clock (sys_clk) is used for Parallel RGB and MIPI
> displays, while the LVDS PLL clock (lvds_pll_clk) is used for LVDS
> displays.Since both the clocks cannot co-exist together in the DT
> for a given display, this patch first attempts to retrieve sys_clk
> If that fails,it then tries to acquire lvds_pll_clk.
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
> ---
> changes in v2:
> - Rephrase the comments, commit message and err logs
> - Replace dev_err wwith dev_warn
> - Remove Initializing sys_clk and lvds_pll_clk to NULL post
> devm_kzalloc() call
>
> ---
> drivers/mfd/atmel-hlcdc.c | 16 ++++++++++++++--
> include/linux/mfd/atmel-hlcdc.h | 1 +
> 2 files changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
> index 4c4e35d404f3..f680392b01ba 100644
> --- a/drivers/mfd/atmel-hlcdc.c
> +++ b/drivers/mfd/atmel-hlcdc.c
> @@ -108,10 +108,22 @@ static int atmel_hlcdc_probe(struct platform_device *pdev)
> return PTR_ERR(hlcdc->periph_clk);
> }
>
> + /*
> + * Retrieve any one of the Main clk required by the LCD to operate:
> + *
> + * LCDC Generic Clock (sys_clk) - Parallel RGB and MIPI displays,
> + * LVDS PLL (lvds_pll_clk) - LVDS display
> + */
> hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
> if (IS_ERR(hlcdc->sys_clk)) {
> - dev_err(dev, "failed to get system clock\n");
> - return PTR_ERR(hlcdc->sys_clk);
> + dev_warn(dev,
> + "failed to get LCDC generic clock, trying for LVDS PLL clock instead\n");
Does the user really care which clock they use?
Can this just happen silently instead?
> + hlcdc->lvds_pll_clk = devm_clk_get(dev, "lvds_pll_clk");
> + if (IS_ERR(hlcdc->lvds_pll_clk)) {
> + dev_err(dev, "failed to get LVDS PLL clock\n");
Failed to obtain both the LCDC (generic) and LVDS PLL clocks
> + return PTR_ERR(hlcdc->lvds_pll_clk);
> + }
> }
>
> hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
> diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
> index 80d675a03b39..07c2081867fd 100644
> --- a/include/linux/mfd/atmel-hlcdc.h
> +++ b/include/linux/mfd/atmel-hlcdc.h
> @@ -75,6 +75,7 @@
> */
> struct atmel_hlcdc {
> struct regmap *regmap;
> + struct clk *lvds_pll_clk;
> struct clk *periph_clk;
> struct clk *sys_clk;
> struct clk *slow_clk;
> --
> 2.25.1
>
--
Lee Jones [李琼斯]
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display
2025-11-06 13:02 ` Lee Jones
@ 2025-11-11 3:05 ` Manikandan.M
0 siblings, 0 replies; 6+ messages in thread
From: Manikandan.M @ 2025-11-11 3:05 UTC (permalink / raw)
To: lee
Cc: maarten.lankhorst, mripard, tzimmermann, airlied, simona,
Nicolas.Ferre, alexandre.belloni, claudiu.beznea, dri-devel,
linux-arm-kernel, linux-kernel, Dharma.B
Hi Lee,
On 06/11/25 6:32 pm, Lee Jones wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Wed, 22 Oct 2025, Manikandan Muralidharan wrote:
>
>> The XLCDC IP supports parallel RGB, MIPI DSI and LVDS Display.
>> The LCD Generic clock (sys_clk) is used for Parallel RGB and MIPI
>> displays, while the LVDS PLL clock (lvds_pll_clk) is used for LVDS
>> displays.Since both the clocks cannot co-exist together in the DT
>> for a given display, this patch first attempts to retrieve sys_clk
>> If that fails,it then tries to acquire lvds_pll_clk.
>>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
>> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
>> ---
>> changes in v2:
>> - Rephrase the comments, commit message and err logs
>> - Replace dev_err wwith dev_warn
>> - Remove Initializing sys_clk and lvds_pll_clk to NULL post
>> devm_kzalloc() call
>>
>> ---
>> drivers/mfd/atmel-hlcdc.c | 16 ++++++++++++++--
>> include/linux/mfd/atmel-hlcdc.h | 1 +
>> 2 files changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
>> index 4c4e35d404f3..f680392b01ba 100644
>> --- a/drivers/mfd/atmel-hlcdc.c
>> +++ b/drivers/mfd/atmel-hlcdc.c
>> @@ -108,10 +108,22 @@ static int atmel_hlcdc_probe(struct platform_device *pdev)
>> return PTR_ERR(hlcdc->periph_clk);
>> }
>>
>> + /*
>> + * Retrieve any one of the Main clk required by the LCD to operate:
>> + *
>> + * LCDC Generic Clock (sys_clk) - Parallel RGB and MIPI displays,
>> + * LVDS PLL (lvds_pll_clk) - LVDS display
>> + */
>> hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
>> if (IS_ERR(hlcdc->sys_clk)) {
>> - dev_err(dev, "failed to get system clock\n");
>> - return PTR_ERR(hlcdc->sys_clk);
>> + dev_warn(dev,
>> + "failed to get LCDC generic clock, trying for LVDS PLL clock instead\n");
>
> Does the user really care which clock they use?
>
> Can this just happen silently instead?
>
>> + hlcdc->lvds_pll_clk = devm_clk_get(dev, "lvds_pll_clk");
>> + if (IS_ERR(hlcdc->lvds_pll_clk)) {
>> + dev_err(dev, "failed to get LVDS PLL clock\n");
>
> Failed to obtain both the LCDC (generic) and LVDS PLL clocks
>
Thankyou, I will make sure v3 addresses these comments.
>> + return PTR_ERR(hlcdc->lvds_pll_clk);
>> + }
>> }
>>
>> hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
>> diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
>> index 80d675a03b39..07c2081867fd 100644
>> --- a/include/linux/mfd/atmel-hlcdc.h
>> +++ b/include/linux/mfd/atmel-hlcdc.h
>> @@ -75,6 +75,7 @@
>> */
>> struct atmel_hlcdc {
>> struct regmap *regmap;
>> + struct clk *lvds_pll_clk;
>> struct clk *periph_clk;
>> struct clk *sys_clk;
>> struct clk *slow_clk;
>> --
>> 2.25.1
>>
>
> --
> Lee Jones [李琼斯]
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 RESEND 3/3] drm: atmel-hlcdc: set LVDS PLL clock rate for LVDS Displays
2025-10-22 9:13 [PATCH v2 RESEND 0/3] Add LVDS display support and PLL handling Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 1/3] drm: atmel-hlcdc: add support for LVDS encoder type Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display Manikandan Muralidharan
@ 2025-10-22 9:13 ` Manikandan Muralidharan
2 siblings, 0 replies; 6+ messages in thread
From: Manikandan Muralidharan @ 2025-10-22 9:13 UTC (permalink / raw)
To: maarten.lankhorst, mripard, tzimmermann, airlied, simona,
nicolas.ferre, alexandre.belloni, claudiu.beznea, lee, dri-devel,
linux-arm-kernel, linux-kernel
Cc: manikandan.m, dharma.b
From: Dharma Balasubiramani <dharma.b@microchip.com>
The LVDS PLL clock runs at 7 times the panel pixel clock.
For LVDS displays, the PLL clock rate is set based on the
panel pixel clock, eliminating the need for the assigned-clock-rates
Device Tree property for lvds_pll_clk in the LCD node.
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
---
Changes in v2:
- Rephrase commit message and comment block
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 48 ++++++++++++++++---
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index beb825fc4d5d..67860947c466 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -100,9 +100,15 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
drm_connector_list_iter_end(&iter);
}
- ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
- if (ret)
- return;
+ if (crtc->dc->hlcdc->lvds_pll_clk) {
+ ret = clk_prepare_enable(crtc->dc->hlcdc->lvds_pll_clk);
+ if (ret)
+ return;
+ } else {
+ ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
+ if (ret)
+ return;
+ }
vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
@@ -187,7 +193,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
ATMEL_XLCDC_DPI : ATMEL_HLCDC_MODE_MASK),
cfg);
- clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
+ if (crtc->dc->hlcdc->lvds_pll_clk)
+ clk_disable_unprepare(crtc->dc->hlcdc->lvds_pll_clk);
+ else
+ clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
}
static enum drm_mode_status
@@ -243,7 +252,11 @@ static void atmel_hlcdc_crtc_atomic_disable(struct drm_crtc *c,
10, 1000))
drm_warn(dev, "Atmel LCDC status register CLKSTS timeout\n");
- clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
+ if (crtc->dc->hlcdc->lvds_pll_clk)
+ clk_disable_unprepare(crtc->dc->hlcdc->lvds_pll_clk);
+ else
+ clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
+
pinctrl_pm_select_sleep_state(dev->dev);
pm_runtime_allow(dev->dev);
@@ -256,15 +269,38 @@ static void atmel_hlcdc_crtc_atomic_enable(struct drm_crtc *c,
{
struct drm_device *dev = c->dev;
struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
+ struct drm_display_mode *adj = &c->state->adjusted_mode;
struct regmap *regmap = crtc->dc->hlcdc->regmap;
unsigned int status;
+ int ret;
pm_runtime_get_sync(dev->dev);
pm_runtime_forbid(dev->dev);
pinctrl_pm_select_default_state(dev->dev);
- clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
+
+ if (crtc->dc->hlcdc->lvds_pll_clk) {
+ /*
+ * For LVDS displays, retrieve the pixel clock from the panel
+ * and set the LVDS PLL clock rate accordingly.
+ * According to the datasheet,the LVDS PLL clock is 7 times the pixel clock.
+ */
+ ret = clk_set_rate(crtc->dc->hlcdc->lvds_pll_clk,
+ (adj->clock * 7 * 1000));
+ if (ret) {
+ dev_err(dev->dev, "Failed to set LVDS PLL clk rate: %d\n", ret);
+ return;
+ }
+
+ ret = clk_prepare_enable(crtc->dc->hlcdc->lvds_pll_clk);
+ if (ret)
+ return;
+ } else {
+ ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
+ if (ret)
+ return;
+ }
regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status,
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread