From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oupton@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
Yao Yuan <yaoyuan@linux.alibaba.com>
Subject: [PATCH v2 40/45] KVM: arm64: selftests: vgic_irq: Exclude timer-controlled interrupts
Date: Sun, 9 Nov 2025 17:16:14 +0000 [thread overview]
Message-ID: <20251109171619.1507205-41-maz@kernel.org> (raw)
In-Reply-To: <20251109171619.1507205-1-maz@kernel.org>
The PPI injection API is clear that you can't inject the timer PPIs
from userspace, since they are controlled by the timers themselves.
Add an exclusion list for this purpose.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
tools/testing/selftests/kvm/arm64/vgic_irq.c | 31 ++++++++++++++++----
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/tools/testing/selftests/kvm/arm64/vgic_irq.c b/tools/testing/selftests/kvm/arm64/vgic_irq.c
index a8919ef3cea2e..b0415bdb89524 100644
--- a/tools/testing/selftests/kvm/arm64/vgic_irq.c
+++ b/tools/testing/selftests/kvm/arm64/vgic_irq.c
@@ -359,8 +359,9 @@ static uint32_t wait_for_and_activate_irq(void)
* interrupts for the whole test.
*/
static void test_inject_preemption(struct test_args *args,
- uint32_t first_intid, int num,
- kvm_inject_cmd cmd)
+ uint32_t first_intid, int num,
+ const unsigned long *exclude,
+ kvm_inject_cmd cmd)
{
uint32_t intid, prio, step = KVM_PRIO_STEPS;
int i;
@@ -379,6 +380,10 @@ static void test_inject_preemption(struct test_args *args,
for (i = 0; i < num; i++) {
uint32_t tmp;
intid = i + first_intid;
+
+ if (exclude && test_bit(i, exclude))
+ continue;
+
KVM_INJECT(cmd, intid);
/* Each successive IRQ will preempt the previous one. */
tmp = wait_for_and_activate_irq();
@@ -390,6 +395,10 @@ static void test_inject_preemption(struct test_args *args,
/* finish handling the IRQs starting with the highest priority one. */
for (i = 0; i < num; i++) {
intid = num - i - 1 + first_intid;
+
+ if (exclude && test_bit(intid - first_intid, exclude))
+ continue;
+
gic_set_eoi(intid);
if (args->eoi_split)
gic_set_dir(intid);
@@ -397,8 +406,12 @@ static void test_inject_preemption(struct test_args *args,
local_irq_enable();
- for (i = 0; i < num; i++)
+ for (i = 0; i < num; i++) {
+ if (exclude && test_bit(i, exclude))
+ continue;
+
GUEST_ASSERT(!gic_irq_get_active(i + first_intid));
+ }
GUEST_ASSERT_EQ(gic_read_ap1r0(), 0);
GUEST_ASSERT_IAR_EMPTY();
@@ -442,14 +455,20 @@ static void test_preemption(struct test_args *args, struct kvm_inject_desc *f)
* number of concurrently active IRQs. The number of LRs implemented is
* IMPLEMENTATION DEFINED, however, it seems that most implement 4.
*/
+ /* Timer PPIs cannot be injected from userspace */
+ static const unsigned long ppi_exclude = (BIT(27 - MIN_PPI) |
+ BIT(30 - MIN_PPI) |
+ BIT(28 - MIN_PPI) |
+ BIT(26 - MIN_PPI));
+
if (f->sgi)
- test_inject_preemption(args, MIN_SGI, 4, f->cmd);
+ test_inject_preemption(args, MIN_SGI, 4, NULL, f->cmd);
if (f->ppi)
- test_inject_preemption(args, MIN_PPI, 4, f->cmd);
+ test_inject_preemption(args, MIN_PPI, 4, &ppi_exclude, f->cmd);
if (f->spi)
- test_inject_preemption(args, MIN_SPI, 4, f->cmd);
+ test_inject_preemption(args, MIN_SPI, 4, NULL, f->cmd);
}
static void test_restore_active(struct test_args *args, struct kvm_inject_desc *f)
--
2.47.3
next prev parent reply other threads:[~2025-11-09 17:17 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-09 17:15 [PATCH v2 00/45] KVM: arm64: Add LR overflow infrastructure Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 01/45] irqchip/gic: Add missing GICH_HCR control bits Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 02/45] irqchip/gic: Expose CPU interface VA to KVM Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 03/45] irqchip/apple-aic: Spit out ICH_MISR_EL2 value on spurious vGIC MI Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 04/45] KVM: arm64: Turn vgic-v3 errata traps into a patched-in constant Marc Zyngier
2025-11-10 10:40 ` Suzuki K Poulose
2025-11-10 11:47 ` Marc Zyngier
2025-11-11 23:53 ` Oliver Upton
2025-11-13 9:52 ` Marek Szyprowski
2025-11-13 10:56 ` Marc Zyngier
2025-11-13 11:04 ` Marek Szyprowski
2025-11-13 11:23 ` Joey Gouly
2025-11-13 11:42 ` Marc Zyngier
2025-11-13 10:59 ` Marc Zyngier
2025-11-13 11:20 ` Marek Szyprowski
2025-11-13 18:01 ` Mark Brown
2025-11-14 9:37 ` Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 05/45] KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping Marc Zyngier
2025-11-13 14:33 ` Mark Brown
2025-11-13 18:15 ` Marc Zyngier
2025-11-13 19:06 ` Mark Brown
2025-11-13 20:10 ` Marc Zyngier
2025-11-13 21:59 ` Oliver Upton
2025-11-09 17:15 ` [PATCH v2 06/45] KVM: arm64: Repack struct vgic_irq fields Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 07/45] KVM: arm64: Add tracking of vgic_irq being present in a LR Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 08/45] KVM: arm64: Add LR overflow handling documentation Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 09/45] KVM: arm64: GICv3: Drop LPI active state when folding LRs Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 10/45] KVM: arm64: GICv3: Preserve EOIcount on exit Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 11/45] KVM: arm64: GICv3: Decouple ICH_HCR_EL2 programming from LRs Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 12/45] KVM: arm64: GICv3: Extract LR folding primitive Marc Zyngier
2025-11-10 9:01 ` Yao Yuan
2025-11-10 9:18 ` Marc Zyngier
2025-11-10 9:48 ` Yao Yuan
2025-11-09 17:15 ` [PATCH v2 13/45] KVM: arm64: GICv3: Extract LR computing primitive Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 14/45] KVM: arm64: GICv2: Preserve EOIcount on exit Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 15/45] KVM: arm64: GICv2: Decouple GICH_HCR programming from LRs being loaded Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 16/45] KVM: arm64: GICv2: Extract LR folding primitive Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 17/45] KVM: arm64: GICv2: Extract LR computing primitive Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 18/45] KVM: arm64: Compute vgic state irrespective of the number of interrupts Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 19/45] KVM: arm64: Eagerly save VMCR on exit Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 20/45] KVM: arm64: Revamp vgic maintenance interrupt configuration Marc Zyngier
2025-11-12 0:08 ` Oliver Upton
2025-11-12 8:33 ` Marc Zyngier
2025-11-12 8:45 ` Oliver Upton
2025-11-12 9:56 ` Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 21/45] KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset() Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 22/45] KVM: arm64: Make vgic_target_oracle() globally available Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 23/45] KVM: arm64: Invert ap_list sorting to push active interrupts out Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 24/45] KVM: arm64: Move undeliverable interrupts to the end of ap_list Marc Zyngier
2025-11-09 17:15 ` [PATCH v2 25/45] KVM: arm64: Use MI to detect groups being enabled/disabled Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 26/45] KVM: arm64: GICv3: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 27/45] KVM: arm64: GICv3: Handle deactivation via ICV_DIR_EL1 traps Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 28/45] KVM: arm64: GICv3: Add GICv2 SGI handling to deactivation primitive Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 29/45] KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity Marc Zyngier
2025-11-14 14:20 ` Fuad Tabba
2025-11-14 15:02 ` Marc Zyngier
2025-11-14 15:53 ` Fuad Tabba
2025-11-14 17:41 ` Marc Zyngier
2025-11-17 8:22 ` Fuad Tabba
2025-11-17 11:56 ` Marc Zyngier
2025-11-24 11:52 ` Mark Brown
2025-11-24 13:06 ` Marc Zyngier
2025-11-24 13:23 ` Mark Brown
2025-11-24 13:40 ` Marc Zyngier
2025-11-24 14:12 ` Marc Zyngier
2025-11-24 15:06 ` Mark Brown
2025-11-09 17:16 ` [PATCH v2 30/45] KVM: arm64: GICv3: Add SPI tracking to handle asymmetric deactivation Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 31/45] KVM: arm64: GICv3: Handle in-LR deactivation when possible Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 32/45] KVM: arm64: GICv3: Avoid broadcast kick on CPUs lacking TDIR Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 33/45] KVM: arm64: GICv2: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 34/45] KVM: arm64: GICv2: Handle deactivation via GICV_DIR traps Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 35/45] KVM: arm64: GICv2: Always trap GICV_DIR register Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 36/45] KVM: arm64: selftests: gic_v3: Add irq group setting helper Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 37/45] KVM: arm64: selftests: gic_v3: Disable Group-0 interrupts by default Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 38/45] KVM: arm64: selftests: vgic_irq: Fix GUEST_ASSERT_IAR_EMPTY() helper Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 39/45] KVM: arm64: selftests: vgic_irq: Change configuration before enabling interrupt Marc Zyngier
2025-11-09 17:16 ` Marc Zyngier [this message]
2025-11-09 17:16 ` [PATCH v2 41/45] KVM: arm64: selftests: vgic_irq: Remove LR-bound limitation Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 42/45] KVM: arm64: selftests: vgic_irq: Perform EOImode==1 deactivation in ack order Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 43/45] KVM: arm64: selftests: vgic_irq: Add asymmetric SPI deaectivation test Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 44/45] KVM: arm64: selftests: vgic_irq: Add Group-0 enable test Marc Zyngier
2025-11-09 17:16 ` [PATCH v2 45/45] KVM: arm64: selftests: vgic_irq: Add timer deactivation test Marc Zyngier
2025-11-12 9:13 ` [PATCH v2 00/45] KVM: arm64: Add LR overflow infrastructure Oliver Upton
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