From: Leo Yan <leo.yan@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Yeoreum Yun <yeoreum.yun@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Yabin Cui <yabinc@google.com>, Keita Morisaki <keyz@google.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 09/11] coresight: etm4x: Add flag to control single-shot restart
Date: Tue, 11 Nov 2025 13:52:26 +0000 [thread overview]
Message-ID: <20251111135226.GF281971@e132581.arm.com> (raw)
In-Reply-To: <d17fc264-7f3d-4257-abec-078e665d7ecb@arm.com>
On Tue, Nov 11, 2025 at 11:37:08AM +0000, Suzuki Kuruppassery Poulose wrote:
> On 11/11/2025 10:18, Leo Yan wrote:
> > On Tue, Nov 11, 2025 at 09:43:13AM +0000, Suzuki Kuruppassery Poulose wrote:
> >
> > [...]
> >
> > > > if (!is_idle_task(current)) {
> > > > if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
> > > > config->ss_status[i] &= ~TRCSSCSRn_STATUS;
> > > > }
> > >
> > > What happens when we do a system wide session and a CPU is running an
> > > idle task ?
> >
> > For a system wide trace, the ETM device is enabled and disabled by
> > the perf when the session start and finish.
> >
> > During the session:
> >
> > - If CPU off states are not enabled, nothing will happen in idle
> > threads, as no CPU PM notifier will be invoked.
>
> What is a CPU is running the idle task, when the system wide session
> is activated ?
Just makes clear: if a CPU running in idle task, and it controls ETM,
it must be a CPU PM operation. Otherwise, it is no reason for idle
thread to enable/disable ETM, no matter what the session mode is.
An edge case is in per-thread mode when switch between the profiled
process and the idle thread, the ETM operations always occur in
profiled process rather than idle threads.
> Basing our decision to tune the ETM control on the
> "active task being idle" feels fragile to me. This is purely a
> decision under ETM driver, specific to the session you are dealing
> with. Thus having it in the "config" is preferred and is cleaner.
It is fine for me to use "config" method. Will spin in this way.
Thanks,
Leo
next prev parent reply other threads:[~2025-11-11 13:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 16:49 [PATCH v5 00/11] CoreSight: Refactor power management for ETMv3/4 Leo Yan
2025-11-03 16:49 ` [PATCH v5 01/11] coresight: Change device mode to atomic type Leo Yan
2025-11-03 16:49 ` [PATCH v5 02/11] coresight: etm4x: Always set tracer's device mode on target CPU Leo Yan
2025-11-03 16:49 ` [PATCH v5 03/11] coresight: etm3x: " Leo Yan
2025-11-03 16:49 ` [PATCH v5 04/11] coresight: etm4x: Correct polling IDLE bit Leo Yan
2025-11-03 16:49 ` [PATCH v5 05/11] coresight: etm4x: Add context synchronization before enabling trace Leo Yan
2025-11-03 16:49 ` [PATCH v5 06/11] coresight: etm4x: Properly control filter in CPU idle with FEAT_TRF Leo Yan
2025-11-03 16:49 ` [PATCH v5 07/11] coresight: etm4x: Remove the redundant DSB Leo Yan
2025-11-10 11:47 ` Yeoreum Yun
2025-11-03 16:49 ` [PATCH v5 08/11] coresight: etm4x: Remove the state_needs_restore flag Leo Yan
2025-11-03 16:49 ` [PATCH v5 09/11] coresight: etm4x: Add flag to control single-shot restart Leo Yan
2025-11-10 11:37 ` Suzuki K Poulose
2025-11-11 9:24 ` Leo Yan
2025-11-11 9:43 ` Suzuki K Poulose
2025-11-11 10:18 ` Leo Yan
2025-11-11 11:37 ` Suzuki K Poulose
2025-11-11 13:52 ` Leo Yan [this message]
2025-11-03 16:49 ` [PATCH v5 10/11] coresight: etm4x: Retain sequencer state Leo Yan
2025-11-03 16:49 ` [PATCH v5 11/11] coresight: etm4x: Reuse normal enable and disable logic in CPU idle Leo Yan
2025-11-10 11:44 ` Suzuki K Poulose
2025-11-11 9:25 ` Leo Yan
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