From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A897CD13D2 for ; Wed, 12 Nov 2025 08:57:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:To:From:Reply-To:Cc:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wdUr7TXN3jV1GAuoQq9sSmT6bDzMyG4Ds7HDvfPscSc=; b=1edY8vNS0T/OGrBmWCmdFB58UU GrrUN7DS8BivIuwJ0nDk2tKf1idSVM7guwhbLP+MfDbGs4DSs/4L1fGgGo8BKAMqV9tJULDkJ41/X mRlqFkzUTuIWEdBjSO40MAb0iJMwltvQdeq7Vxy5kh15epBNb+87meGa6TEsRXbVv6xMNROBlUo93 Ee1Lng6OunWkKX9R6kGByu54a+Wa2lVoUoxOipWTNbbGhs0v7d/eUpPL669OLkHk3/lHLbo69JAlX Ys2kWot9nCkd69YXFxxEFvoq333En027KFWx9jNLIM2Au3L6yq//oJCHF+QTPJD6jPlUaJf4X6rXl VsZF8SZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vJ6f7-00000008PPC-1xx6; Wed, 12 Nov 2025 08:57:09 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vJ6f3-00000008PK2-3MYg for linux-arm-kernel@lists.infradead.org; Wed, 12 Nov 2025 08:57:07 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 12 Nov 2025 16:56:49 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 12 Nov 2025 16:56:49 +0800 From: Ryan Chen To: , , , , , , , , , , , , , , , , , , Subject: [PATCH v22 1/4] dt-bindings: i2c: Split AST2600 binding into a new YAML Date: Wed, 12 Nov 2025 16:56:46 +0800 Message-ID: <20251112085649.1903631-2-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251112085649.1903631-1-ryan_chen@aspeedtech.com> References: <20251112085649.1903631-1-ryan_chen@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251112_005705_838366_8940A95E X-CRM114-Status: GOOD ( 16.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The AST2600 I2C controller introduces a completely new register map and Separate control/target register sets, unlike the mixed layout used in AST2400/AST2500. In addition, at new AST2600 configuration registers and transfer modes require new DT properties, which are incompatible with existing bindings. Therefore, this creates a dedicated binding file for AST2600 to properly describe these new hardware capabilities. A subsequent change will modify this new binding to properly describe the AST2600 hardware. The example section updated to reflect the actual AST2600 SoC register layout and interrupt configuration. Reference: aspeed-g6.dtsi (lines 885-897) -I2C bus and buffeset address offsets - AST2600 I2C controller register base starts from 0x80, and the buffer region is located at 0xc00, as defined in AST2600 SOC register map. -Interrupt configuration - AST2600 U2C controller are connected to ARM GIC interrupt controller rather than the legacy internal interrupt controller. Signed-off-by: Ryan Chen --- .../bindings/i2c/aspeed,ast2600-i2c.yaml | 67 +++++++++++++++++++ .../devicetree/bindings/i2c/aspeed,i2c.yaml | 3 +- 2 files changed, 68 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml diff --git a/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml new file mode 100644 index 000000000000..e6ed84c53639 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/aspeed,ast2600-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED I2C on the AST26XX SoCs + +maintainers: + - Ryan Chen + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2600-i2c-bus + + reg: + minItems: 1 + maxItems: 2 + description: + The first region covers the controller registers. + The optional second region covers the controller's buffer space. + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: + root clock of bus, should reference the APB + clock in the second cell + + clock-frequency: + description: Desired operating frequency of the I2C bus in Hz. + minimum: 500 + maximum: 4000000 + default: 100000 + + resets: + maxItems: 1 + +required: + - reg + - compatible + - clocks + - resets + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + i2c@80 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "aspeed,ast2600-i2c-bus"; + reg = <0x80 0x80>, <0xc00 0x20>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_I2C>; + clock-frequency = <100000>; + interrupts = ; + }; diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml index 5b9bd2feda3b..d4e4f412feba 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs +title: ASPEED I2C on the AST24XX, AST25XX SoCs maintainers: - Rayn Chen @@ -17,7 +17,6 @@ properties: enum: - aspeed,ast2400-i2c-bus - aspeed,ast2500-i2c-bus - - aspeed,ast2600-i2c-bus reg: minItems: 1 -- 2.34.1