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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="dsTS7ISgoTlpn0Pw" Content-Disposition: inline In-Reply-To: <20251113123009.26568-3-eleanor.lin@realtek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251113_113119_417520_3B98406D X-CRM114-Status: GOOD ( 15.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --dsTS7ISgoTlpn0Pw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Nov 13, 2025 at 08:30:08PM +0800, Yu-Chun Lin wrote: > Add DT binding schema for Realtek system controller. >=20 > Signed-off-by: Yu-Chun Lin > --- > .../devicetree/bindings/mfd/realtek,misc.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/realtek,misc.ya= ml >=20 > diff --git a/Documentation/devicetree/bindings/mfd/realtek,misc.yaml b/Do= cumentation/devicetree/bindings/mfd/realtek,misc.yaml > new file mode 100644 > index 000000000000..4f4a9ae250be > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/realtek,misc.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/realtek,misc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Realtek MISC System Controller > + > +description: > + The Realtek MISC System Controller is a register area that contains > + miscellaneous system registers for the SoC and serves as a parent node > + for other functions. > + > +maintainers: > + - James Tai > + - Yu-Chun Lin > + > +properties: > + compatible: > + items: > + - enum: > + - realtek,misc You need a soc-specific compatible. It's hard to believe that every realtek device will have the exact same miscellaneous register region ;) > + - const: syscon > + - const: simple-mfd > + > + reg: > + maxItems: 1 > + > + ranges: > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 1 > + > +patternProperties: > + "^serial@[0-9a-f]+$": > + type: object > + description: UART controllers inside MISC area How many of these actually are there? If they're always dw uarts, please add a reference to that schema. pw-bot: changes-requested > + > +required: > + - compatible > + - reg > + - ranges > + - '#address-cells' > + - '#size-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + syscon@7000 { > + compatible =3D "realtek,misc", "syscon", "simple-mfd"; > + reg =3D <0x7000 0x1000>; > + ranges =3D <0x0 0x7000 0x1000>; > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + > + uart0: serial@800 { > + compatible =3D "snps,dw-apb-uart"; > + reg =3D <0x800 0x100>; > + clock-frequency =3D <432000000>; > + interrupts =3D ; > + reg-io-width =3D <4>; > + reg-shift =3D <2>; > + status =3D "disabled"; > + }; > + }; > --=20 > 2.34.1 >=20 --dsTS7ISgoTlpn0Pw Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaRYyAQAKCRB4tDGHoIJi 0sgSAPkBwiptGwn86Ek/pm/Ba4xc+bKRJIdGKyrtJXrD9gKCAwEAiyjueLUkfRPc m+DBjvBVNZdVUzIQ5KSvtJblfGLUqAw= =75Qu -----END PGP SIGNATURE----- --dsTS7ISgoTlpn0Pw--