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Signed-off-by: Yu-Chun Lin --- .../devicetree/bindings/mfd/realtek,misc.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/realtek,misc.yaml diff --git a/Documentation/devicetree/bindings/mfd/realtek,misc.yaml b/Documentation/devicetree/bindings/mfd/realtek,misc.yaml new file mode 100644 index 000000000000..4f4a9ae250be --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/realtek,misc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/realtek,misc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek MISC System Controller + +description: + The Realtek MISC System Controller is a register area that contains + miscellaneous system registers for the SoC and serves as a parent node + for other functions. + +maintainers: + - James Tai + - Yu-Chun Lin + +properties: + compatible: + items: + - enum: + - realtek,misc + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "^serial@[0-9a-f]+$": + type: object + description: UART controllers inside MISC area + +required: + - compatible + - reg + - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include + + syscon@7000 { + compatible = "realtek,misc", "syscon", "simple-mfd"; + reg = <0x7000 0x1000>; + ranges = <0x0 0x7000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + uart0: serial@800 { + compatible = "snps,dw-apb-uart"; + reg = <0x800 0x100>; + clock-frequency = <432000000>; + interrupts = ; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + }; -- 2.34.1