From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09FBFCEB2DA for ; Sat, 15 Nov 2025 14:14:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SznPGrtr2XDooq13sk6Kgg+QMqAR2LlCpjlNsch42gA=; b=l9JpV+j9LStsw76qGzM3HFZ+2A ikIdEGCXcxMjgCt+C+4CHUSsWkYi2e9IRHegrFBu/MF2HFtkAW7n6AOV8J1911bYQ6PngKbSm2Qvg SlgKJDEamUUan562QwABby2ZbijxAy0AleQNXJkwynbaEsQIsF9L5xBQB98nbK8An0357RSuXI9BI s5hOGoPZ5UDaTr4zOoFt5aXiBZeDyqnuFOdmfklDK5RsZV2Lm4NuKDwNO7PictbW963/OQwUS8W1E BsfjO0uE5uQ2ovLgoTV9hA/l1j9H5IdpmetPYPzgRF9/Lu3QAwjV59geoucTn2MsbOzQRMnR9gWbE 79EQBtBQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vKH2y-0000000DprQ-0a2Q; Sat, 15 Nov 2025 14:14:36 +0000 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vKH2m-0000000Dpju-3rtz for linux-arm-kernel@lists.infradead.org; Sat, 15 Nov 2025 14:14:26 +0000 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-640b06fa959so5265337a12.3 for ; Sat, 15 Nov 2025 06:14:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1763216063; x=1763820863; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SznPGrtr2XDooq13sk6Kgg+QMqAR2LlCpjlNsch42gA=; b=Rn0IUgwZnd3j7YE96r7KJogg38vcDjKYLFAlci/De99qbzuMIk914EumytTaM77DfT UauoOdzd5AVdYMvESJ+/uTRtq5UervkaixrsW3ZTew+CI0dYNhrFx/udpZQGWpBw6V1o lGbwZ1k1HP/pajxlMoHY4SrcQkRHKHXF6SMyL3k8v4iuil0gLGseNRtI6LIdpPVnx2/x QJklNTInpNc7MpYKLJSWLIeqypsoAFoxDb4ej73bpEGULARQskdMtNzf9Zp4efblp96x 66xQkcRhbzpURnR9np8bIeuazr+6DQfirVixgAByLiDO9pKgT9pQd2j4e65UB0poY+xC 1phQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763216063; x=1763820863; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=SznPGrtr2XDooq13sk6Kgg+QMqAR2LlCpjlNsch42gA=; b=tUKku1mlhp7vmUyaBntdalI7fv9Kzz3TG+y7xL313oOSup5qahDD8z8WYHSFS4X0Yg CGVIDgeu1njcova+h5dMPOMlMsLeNm4Wt3dEtTp3TecIJF4n6ZTrgA0E3kajX63VN/eZ s+72DqXxmX3arLxfEGK0exb/uL2PSdkMuDXIQbThLLbIKR0D/X+EC/C7Ui34MSAjWvtO qXmOBMg+hcNeUu4LZ5FapgTMEf6vGDdtN0Pq2zpTQyX4wCFth9wdRf5rg9bb+CajtN7I 4pedpMFJF0y1vfmI1+20/536OvXPC/gtECAlcNI90CRUe2vih/MeHxZAXfjsXEh3y/Io DPgw== X-Forwarded-Encrypted: i=1; AJvYcCWXlLI93IANapN3w65OHMJt8WT73OMvebGfhAAiFB/cNdOx7nwvR4QuhVZ9r0VIN4Z9AlRxBjrpZQrXdOuDc8/K@lists.infradead.org X-Gm-Message-State: AOJu0Yyj6k5m/+gSjk1qsKqfZaxGKOj+p3+h4DGPir1rzjiLZFkwJC34 uK3rwK/QtjhErB+U4ee7IGWOrr3FNgJ2AQVuxzBOQ9qo579KZZoR1RWx X-Gm-Gg: ASbGncuf8FpWXredP/gskCUr/hhax4+hEZr7uJachfgl79gSMajl99Qg7AfMWd0piU6 /EtB0PBt3kMiQGczrtyOD+6dxy0zCedZQjYbt4oZ7Wd/j0zJdc/zBTZtv8+QyZzb3wAQ8K47Q5p 1RBNaGbtvKh8ZOGw+zWBg60AsLs8eLFlskYd27VFPO9AX/2lkVd89KotNFfg6yTPoPf4OJTbida t9PhhA5H4NfI1rK6/kQznYmKiIg+ZJF1J+95sLZWiXPsZYnnZ2ZZ6W8QssgDq3BTaSzpdtAyyvR ORK9NJ8vrvponIU2Osy0XqsCHvqE2uojbp6+UiL0CVNwJ6wLZakvMQlRdeSlKm0CkUuUhq1GlBu 3jHU5iFBDB6P7G3xaUW4ASVLuUW4eXewKsLLQQmH04BKAs9SMPUEzAsX+aKMpkkW+HkuZxk+d5r V+ojkIax8ynmUDZWGRn0Q0FWbZnfjTTyTWEUIxnLqII7KCTRow8vX4ZhhB X-Google-Smtp-Source: AGHT+IGNZo/U7zY8Q07lDbxVpkIabIMsA3romzMD93FNBaHxF7DsQi/nyue3LGz4eYZpXchvaLYh/g== X-Received: by 2002:a17:907:3d0b:b0:b39:57ab:ec18 with SMTP id a640c23a62f3a-b736794a6b3mr650833866b.45.1763216062968; Sat, 15 Nov 2025 06:14:22 -0800 (PST) Received: from jernej-laptop (178-79-73-218.dynamic.telemach.net. [178.79.73.218]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fda933fsm606189866b.56.2025.11.15.06.14.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Nov 2025 06:14:22 -0800 (PST) From: Jernej Skrabec To: wens@csie.org, samuel@sholland.org Cc: mripard@kernel.org, maarten.lankhorst@linux.intel.com, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Jernej Skrabec Subject: [PATCH 7/7] drm/sun4i: switch DE33 to new bindings Date: Sat, 15 Nov 2025 15:13:47 +0100 Message-ID: <20251115141347.13087-8-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251115141347.13087-1-jernej.skrabec@gmail.com> References: <20251115141347.13087-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251115_061425_046250_72895300 X-CRM114-Status: GOOD ( 22.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that everything is in place, switch DE33 to new bindings. Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 130 +++++++++++++++------------- drivers/gpu/drm/sun4i/sun8i_mixer.h | 10 +-- 2 files changed, 71 insertions(+), 69 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index fde3b677e925..da213e54e653 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -24,6 +25,7 @@ #include #include "sun4i_drv.h" +#include "sun50i_planes.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_vi_layer.h" @@ -256,7 +258,6 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine, { struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); u32 bld_base = sun8i_blender_base(mixer); - struct regmap *bld_regs = sun8i_blender_regmap(mixer); struct drm_plane_state *plane_state; struct drm_plane *plane; u32 route = 0, pipe_en = 0; @@ -293,16 +294,16 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine, route |= layer->index << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); pipe_en |= SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - regmap_write(bld_regs, + regmap_write(engine->regs, SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), SUN8I_MIXER_COORD(x, y)); - regmap_write(bld_regs, + regmap_write(engine->regs, SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), SUN8I_MIXER_SIZE(w, h)); } - regmap_write(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route); - regmap_write(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), + regmap_write(engine->regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route); + regmap_write(engine->regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), pipe_en | SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); if (mixer->cfg->de_type != SUN8I_MIXER_DE33) @@ -317,7 +318,6 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); int plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; enum drm_plane_type type; - unsigned int phy_index; int i; planes = devm_kcalloc(drm->dev, plane_cnt, sizeof(*planes), GFP_KERNEL); @@ -332,12 +332,8 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, else type = DRM_PLANE_TYPE_OVERLAY; - phy_index = i; - if (mixer->cfg->de_type == SUN8I_MIXER_DE33) - phy_index = mixer->cfg->map[i]; - layer = sun8i_vi_layer_init_one(drm, type, mixer->engine.regs, - i, phy_index, plane_cnt, + i, i, plane_cnt, &mixer->cfg->lay_cfg); if (IS_ERR(layer)) { dev_err(drm->dev, @@ -357,12 +353,8 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, else type = DRM_PLANE_TYPE_OVERLAY; - phy_index = index; - if (mixer->cfg->de_type == SUN8I_MIXER_DE33) - phy_index = mixer->cfg->map[index]; - layer = sun8i_ui_layer_init_one(drm, type, mixer->engine.regs, - index, phy_index, plane_cnt, + index, index, plane_cnt, &mixer->cfg->lay_cfg); if (IS_ERR(layer)) { dev_err(drm->dev, "Couldn't initialize %s plane\n", @@ -376,16 +368,25 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, return planes; } +static struct drm_plane **sun50i_layers_init(struct drm_device *drm, + struct sunxi_engine *engine) +{ + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + + if (IS_ENABLED(CONFIG_DRM_SUN50I_PLANES)) + return sun50i_planes_setup(mixer->planes_dev, drm, engine->id); + + return NULL; +} + static void sun8i_mixer_mode_set(struct sunxi_engine *engine, const struct drm_display_mode *mode) { struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); - struct regmap *bld_regs; u32 bld_base, size, val; bool interlaced; bld_base = sun8i_blender_base(mixer); - bld_regs = sun8i_blender_regmap(mixer); interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); size = SUN8I_MIXER_SIZE(mode->hdisplay, mode->vdisplay); @@ -397,14 +398,14 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, else regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_SIZE, size); - regmap_write(bld_regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); + regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); if (interlaced) val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; else val = 0; - regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), + regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, val); DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", @@ -417,8 +418,14 @@ static const struct sunxi_engine_ops sun8i_engine_ops = { .mode_set = sun8i_mixer_mode_set, }; +static const struct sunxi_engine_ops sun50i_engine_ops = { + .commit = sun8i_mixer_commit, + .layers_init = sun50i_layers_init, + .mode_set = sun8i_mixer_mode_set, +}; + static const struct regmap_config sun8i_mixer_regmap_config = { - .name = "layers", + .name = "display", .reg_bits = 32, .val_bits = 32, .reg_stride = 4, @@ -433,14 +440,6 @@ static const struct regmap_config sun8i_top_regmap_config = { .max_register = 0x3c, }; -static const struct regmap_config sun8i_disp_regmap_config = { - .name = "display", - .reg_bits = 32, - .val_bits = 32, - .reg_stride = 4, - .max_register = 0x20000, -}; - static int sun8i_mixer_of_get_id(struct device_node *node) { struct device_node *ep, *remote; @@ -463,17 +462,14 @@ static int sun8i_mixer_of_get_id(struct device_node *node) static void sun8i_mixer_init(struct sun8i_mixer *mixer) { - struct regmap *top_regs, *disp_regs; unsigned int base = sun8i_blender_base(mixer); + struct regmap *top_regs; int plane_cnt, i; - if (mixer->cfg->de_type == SUN8I_MIXER_DE33) { + if (mixer->cfg->de_type == SUN8I_MIXER_DE33) top_regs = mixer->top_regs; - disp_regs = mixer->disp_regs; - } else { + else top_regs = mixer->engine.regs; - disp_regs = mixer->engine.regs; - } /* Enable the mixer */ regmap_write(top_regs, SUN8I_MIXER_GLOBAL_CTL, @@ -483,25 +479,25 @@ static void sun8i_mixer_init(struct sun8i_mixer *mixer) regmap_write(top_regs, SUN50I_MIXER_GLOBAL_CLK, 1); /* Set background color to black */ - regmap_write(disp_regs, SUN8I_MIXER_BLEND_BKCOLOR(base), + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), SUN8I_MIXER_BLEND_COLOR_BLACK); /* * Set fill color of bottom plane to black. Generally not needed * except when VI plane is at bottom (zpos = 0) and enabled. */ - regmap_write(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(disp_regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), SUN8I_MIXER_BLEND_COLOR_BLACK); plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; for (i = 0; i < plane_cnt; i++) - regmap_write(disp_regs, + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(base, i), SUN8I_MIXER_BLEND_MODE_DEF); - regmap_update_bits(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); } @@ -532,7 +528,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, if (!mixer) return -ENOMEM; dev_set_drvdata(dev, mixer); - mixer->engine.ops = &sun8i_engine_ops; mixer->engine.node = dev->of_node; if (of_property_present(dev->of_node, "iommus")) { @@ -562,6 +557,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, if (!mixer->cfg) return -EINVAL; + if (mixer->cfg->de_type == SUN8I_MIXER_DE33) + mixer->engine.ops = &sun50i_engine_ops; + else + mixer->engine.ops = &sun8i_engine_ops; + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); @@ -584,17 +584,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, dev_err(dev, "Couldn't create the top regmap\n"); return PTR_ERR(mixer->top_regs); } - - regs = devm_platform_ioremap_resource_byname(pdev, "display"); - if (IS_ERR(regs)) - return PTR_ERR(regs); - - mixer->disp_regs = devm_regmap_init_mmio(dev, regs, - &sun8i_disp_regmap_config); - if (IS_ERR(mixer->disp_regs)) { - dev_err(dev, "Couldn't create the disp regmap\n"); - return PTR_ERR(mixer->disp_regs); - } } mixer->reset = devm_reset_control_get(dev, NULL); @@ -634,6 +623,33 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, clk_prepare_enable(mixer->mod_clk); + if (mixer->cfg->de_type == SUN8I_MIXER_DE33) { + struct platform_device *pdev; + struct device_node *np; + void *data; + + np = of_parse_phandle(dev->of_node, "allwinner,planes", 0); + if (!np) { + ret = -ENODEV; + goto err_disable_mod_clk; + } + + pdev = of_find_device_by_node(np); + of_node_put(np); + if (!pdev) { + ret = -EPROBE_DEFER; + goto err_disable_mod_clk; + } + + data = platform_get_drvdata(pdev); + if (!data) { + put_device(&pdev->dev); + return -EPROBE_DEFER; + } + + mixer->planes_dev = &pdev->dev; + } + list_add_tail(&mixer->engine.list, &drv->engine_list); /* Reset registers and disable unused sub-engines */ @@ -668,6 +684,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, return 0; +err_disable_mod_clk: + clk_disable_unprepare(mixer->mod_clk); err_disable_bus_clk: clk_disable_unprepare(mixer->bus_clk); err_assert_reset: @@ -863,16 +881,8 @@ static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { }; static const struct sun8i_mixer_cfg sun50i_h616_mixer0_cfg = { - .lay_cfg = { - .de_type = SUN8I_MIXER_DE33, - .scaler_mask = 0xf, - .scanline_yuv = 4096, - }, .de_type = SUN8I_MIXER_DE33, .mod_rate = 600000000, - .ui_num = 3, - .vi_num = 1, - .map = {0, 6, 7, 8}, }; static const struct of_device_id sun8i_mixer_of_table[] = { diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index e2f83301aae8..7abc88c898d9 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -202,7 +202,6 @@ struct sun8i_mixer_cfg { int ui_num; unsigned int de_type; unsigned long mod_rate; - unsigned int map[6]; }; struct sun8i_mixer { @@ -216,7 +215,7 @@ struct sun8i_mixer { struct clk *mod_clk; struct regmap *top_regs; - struct regmap *disp_regs; + struct device *planes_dev; }; enum { @@ -252,13 +251,6 @@ sun8i_blender_base(struct sun8i_mixer *mixer) return mixer->cfg->de_type == SUN8I_MIXER_DE3 ? DE3_BLD_BASE : DE2_BLD_BASE; } -static inline struct regmap * -sun8i_blender_regmap(struct sun8i_mixer *mixer) -{ - return mixer->cfg->de_type == SUN8I_MIXER_DE33 ? - mixer->disp_regs : mixer->engine.regs; -} - static inline u32 sun8i_channel_base(struct sun8i_layer *layer) { -- 2.51.2