linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Mostafa Saleh <smostafa@google.com>
To: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,  kvmarm@lists.linux.dev,
	iommu@lists.linux.dev
Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
	 oliver.upton@linux.dev, joey.gouly@arm.com,
	suzuki.poulose@arm.com,  yuzenghui@huawei.com, joro@8bytes.org,
	jean-philippe@linaro.org, jgg@ziepe.ca,  praan@google.com,
	danielmentz@google.com, mark.rutland@arm.com,
	 qperret@google.com, tabba@google.com,
	Mostafa Saleh <smostafa@google.com>
Subject: [PATCH v5 20/27] iommu/arm-smmu-v3-kvm: Add CMDQ functions
Date: Mon, 17 Nov 2025 18:48:07 +0000	[thread overview]
Message-ID: <20251117184815.1027271-21-smostafa@google.com> (raw)
In-Reply-To: <20251117184815.1027271-1-smostafa@google.com>

Add functions to access the command queue, there are 2 main usage:
- Hypervisor's own commands, as TLB invalidation, would use functions
  as smmu_send_cmd(), which creates and sends a command.
- Add host commands to the shadow command queue, after being filtered,
  these will be added with smmu_add_cmd_raw.

Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   |  14 +--
 .../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c  | 102 ++++++++++++++++++
 2 files changed, 110 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 1d552efdc4ae..d909014baad3 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -1015,19 +1015,21 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
 int arm_smmu_cmdq_build_cmd(u64 *cmd, struct arm_smmu_cmdq_ent *ent);
 
 /* Queue functions shared between kernel and hyp. */
-static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n)
+static inline u32 queue_space(struct arm_smmu_ll_queue *q)
 {
-	u32 space, prod, cons;
+	u32 prod, cons;
 
 	prod = Q_IDX(q, q->prod);
 	cons = Q_IDX(q, q->cons);
 
 	if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons))
-		space = (1 << q->max_n_shift) - (prod - cons);
-	else
-		space = cons - prod;
+		return (1 << q->max_n_shift) - (prod - cons);
+	return cons - prod;
+}
 
-	return space >= n;
+static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n)
+{
+	return queue_space(q) >= n;
 }
 
 static inline bool queue_full(struct arm_smmu_ll_queue *q)
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
index bcb3f99fdcd2..a970b43e6a7e 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
@@ -22,6 +22,26 @@ struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus;
 
 #define cmdq_size(cmdq)	((1 << ((cmdq)->llq.max_n_shift)) * CMDQ_ENT_DWORDS * 8)
 
+/*
+ * Wait until @cond is true.
+ * Return 0 on success, or -ETIMEDOUT
+ */
+#define smmu_wait(use_wfe, _cond)					\
+({								\
+	int __ret = 0;						\
+	u64 delay = pkvm_time_get() + ARM_SMMU_POLL_TIMEOUT_US;	\
+								\
+	while (!(_cond)) {					\
+		if (use_wfe)					\
+			wfe();					\
+		if (pkvm_time_get() >= delay) {			\
+			__ret = -ETIMEDOUT;			\
+			break;					\
+		}						\
+	}							\
+	__ret;							\
+})
+
 static bool is_cmdq_enabled(struct hyp_arm_smmu_v3_device *smmu)
 {
 	return FIELD_GET(CR0_CMDQEN, smmu->cr0);
@@ -69,6 +89,88 @@ static int smmu_unshare_pages(phys_addr_t addr, size_t size)
 	return 0;
 }
 
+__maybe_unused
+static bool smmu_cmdq_has_space(struct arm_smmu_queue *cmdq, u32 n)
+{
+	struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+	WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+	return queue_has_space(llq, n);
+}
+
+static bool smmu_cmdq_full(struct arm_smmu_queue *cmdq)
+{
+	struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+	WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+	return queue_full(llq);
+}
+
+static bool smmu_cmdq_empty(struct arm_smmu_queue *cmdq)
+{
+	struct arm_smmu_ll_queue *llq = &cmdq->llq;
+
+	WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg));
+	return queue_empty(llq);
+}
+
+static void smmu_add_cmd_raw(struct hyp_arm_smmu_v3_device *smmu,
+			     u64 *cmd)
+{
+	struct arm_smmu_queue *q = &smmu->cmdq;
+	struct arm_smmu_ll_queue *llq = &q->llq;
+
+	queue_write(Q_ENT(q, llq->prod), cmd,  CMDQ_ENT_DWORDS);
+	llq->prod = queue_inc_prod_n(llq, 1);
+}
+
+static int smmu_add_cmd(struct hyp_arm_smmu_v3_device *smmu,
+			struct arm_smmu_cmdq_ent *ent)
+{
+	int ret;
+	u64 cmd[CMDQ_ENT_DWORDS];
+
+	ret = smmu_wait(smmu->features & ARM_SMMU_FEAT_SEV,
+			!smmu_cmdq_full(&smmu->cmdq));
+	if (ret)
+		return ret;
+
+	ret = arm_smmu_cmdq_build_cmd(cmd, ent);
+	if (ret)
+		return ret;
+
+	smmu_add_cmd_raw(smmu, cmd);
+	writel_relaxed(smmu->cmdq.llq.prod, smmu->cmdq.prod_reg);
+	return 0;
+}
+
+static int smmu_sync_cmd(struct hyp_arm_smmu_v3_device *smmu)
+{
+	int ret;
+	struct arm_smmu_cmdq_ent cmd = {
+		.opcode = CMDQ_OP_CMD_SYNC,
+	};
+
+	ret = smmu_add_cmd(smmu, &cmd);
+	if (ret)
+		return ret;
+
+	return smmu_wait(smmu->features & ARM_SMMU_FEAT_SEV,
+			 smmu_cmdq_empty(&smmu->cmdq));
+}
+
+__maybe_unused
+static int smmu_send_cmd(struct hyp_arm_smmu_v3_device *smmu,
+			 struct arm_smmu_cmdq_ent *cmd)
+{
+	int ret = smmu_add_cmd(smmu, cmd);
+
+	if (ret)
+		return ret;
+
+	return smmu_sync_cmd(smmu);
+}
+
 /* Put the device in a state that can be probed by the host driver. */
 static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu)
 {
-- 
2.52.0.rc1.455.g30608eb744-goog



  parent reply	other threads:[~2025-11-17 18:49 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-17 18:47 [PATCH v5 00/27] KVM: arm64: SMMUv3 driver for pKVM (trap and emulate) Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 01/27] KVM: arm64: Add a new function to donate memory with prot Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 02/27] KVM: arm64: Donate MMIO to the hypervisor Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 03/27] KVM: arm64: pkvm: Add pkvm_time_get() Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 04/27] iommu/io-pgtable-arm: Factor kernel specific code out Mostafa Saleh
2025-11-28 16:45   ` Jason Gunthorpe
2025-12-12 15:37     ` Mostafa Saleh
2025-12-16  0:58       ` Jason Gunthorpe
2025-12-16 23:08         ` Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 05/27] iommu/arm-smmu-v3: Split code with hyp Mostafa Saleh
2025-11-28 16:46   ` Jason Gunthorpe
2025-12-12 15:41     ` Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 06/27] iommu/arm-smmu-v3: Move TLB range invalidation into common code Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 07/27] iommu/arm-smmu-v3: Move IDR parsing to common functions Mostafa Saleh
2025-11-28 16:48   ` Jason Gunthorpe
2025-12-12 15:42     ` Mostafa Saleh
2025-12-17 13:59       ` Jason Gunthorpe
2025-11-17 18:47 ` [PATCH v5 08/27] KVM: arm64: iommu: Introduce IOMMU driver infrastructure Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 09/27] KVM: arm64: iommu: Shadow host stage-2 page table Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 10/27] KVM: arm64: iommu: Add memory pool Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 11/27] KVM: arm64: iommu: Support DABT for IOMMU Mostafa Saleh
2025-11-17 18:47 ` [PATCH v5 12/27] iommu/arm-smmu-v3-kvm: Add SMMUv3 driver Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 13/27] iommu/arm-smmu-v3-kvm: Add the kernel driver Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 14/27] iommu/arm-smmu-v3: Support probing KVM emulated devices Mostafa Saleh
2025-11-28 16:56   ` Jason Gunthorpe
2025-12-12 15:53     ` Mostafa Saleh
2025-12-17 14:00       ` Jason Gunthorpe
2025-11-17 18:48 ` [PATCH v5 15/27] iommu/arm-smmu-v3-kvm: Create array for hyp SMMUv3 Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 16/27] iommu/arm-smmu-v3-kvm: Take over SMMUs Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 17/27] iommu/arm-smmu-v3-kvm: Probe SMMU HW Mostafa Saleh
2025-11-28 17:07   ` Jason Gunthorpe
2025-12-12 16:07     ` Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 18/27] iommu/arm-smmu-v3-kvm: Add MMIO emulation Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 19/27] iommu/arm-smmu-v3-kvm: Shadow the command queue Mostafa Saleh
2025-11-17 18:48 ` Mostafa Saleh [this message]
2025-11-17 18:48 ` [PATCH v5 21/27] iommu/arm-smmu-v3-kvm: Emulate CMDQ for host Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 22/27] iommu/arm-smmu-v3-kvm: Shadow stream table Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 23/27] iommu/arm-smmu-v3-kvm: Shadow STEs Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 24/27] iommu/arm-smmu-v3-kvm: Emulate GBPA Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 25/27] iommu/arm-smmu-v3-kvm: Support io-pgtable Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 26/27] iommu/arm-smmu-v3-kvm: Shadow the CPU stage-2 page table Mostafa Saleh
2025-11-17 18:48 ` [PATCH v5 27/27] iommu/arm-smmu-v3-kvm: Enable nesting Mostafa Saleh
2025-11-28 17:12   ` Jason Gunthorpe
2025-12-12 16:15     ` Mostafa Saleh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251117184815.1027271-21-smostafa@google.com \
    --to=smostafa@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=danielmentz@google.com \
    --cc=iommu@lists.linux.dev \
    --cc=jean-philippe@linaro.org \
    --cc=jgg@ziepe.ca \
    --cc=joey.gouly@arm.com \
    --cc=joro@8bytes.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=oliver.upton@linux.dev \
    --cc=praan@google.com \
    --cc=qperret@google.com \
    --cc=suzuki.poulose@arm.com \
    --cc=tabba@google.com \
    --cc=will@kernel.org \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).