From: "Clément Le Goffic" <legoffic.clement@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Julius Werner <jwerner@chromium.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
"Clément Le Goffic" <legoffic.clement@gmail.com>,
"Clément Le Goffic" <clement.legoffic@foss.st.com>
Subject: [PATCH v9 2/7] dt-bindings: memory: introduce DDR4
Date: Tue, 18 Nov 2025 16:07:58 +0100 [thread overview]
Message-ID: <20251118-b4-ddr-bindings-v9-2-a033ac5144da@gmail.com> (raw)
In-Reply-To: <20251118-b4-ddr-bindings-v9-0-a033ac5144da@gmail.com>
From: Clément Le Goffic <clement.legoffic@foss.st.com>
Introduce JEDEC compliant DDR bindings, that use new memory-props binding.
The DDR4 compatible can be made of explicit vendor names and part
numbers or be of the form "ddrX-YYYY,AAAA...-ZZ" when associated with an
SPD, where (according to JEDEC SPD4.1.2.L-6):
- YYYY is the manufacturer ID
- AAAA... is the part number
- ZZ is the revision ID
The former form is useful when the SDRAM vendor and part number are
known, for example, when memory is soldered on the board.
The latter form is useful when SDRAM nodes are created at runtime by
boot firmware that doesn't have access to static part number information.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com>
---
.../memory-controllers/ddr/jedec,ddr4.yaml | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
new file mode 100644
index 000000000000..928961c74026
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr4.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: DDR4 SDRAM compliant to JEDEC JESD79-4D
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+allOf:
+ - $ref: jedec,sdram-props.yaml#
+
+properties:
+ compatible:
+ items:
+ - pattern: "^ddr4-[0-9a-f]{4},[a-z]{1,20}-[0-9a-f]{2}$"
+ - const: jedec,ddr4
+
+required:
+ - compatible
+ - density
+ - io-width
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ddr {
+ compatible = "ddr4-00ff,azaz-ff", "jedec,ddr4";
+ density = <8192>;
+ io-width = <8>;
+ };
--
2.43.0
next prev parent reply other threads:[~2025-11-18 15:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-18 15:07 [PATCH v9 0/7] Add DDR4 memory-controller bindings and factorise LPDDR and DDR bindings Clément Le Goffic
2025-11-18 15:07 ` [PATCH v9 1/7] dt-bindings: memory: factorise LPDDR props into SDRAM props Clément Le Goffic
2025-11-18 15:07 ` Clément Le Goffic [this message]
2025-11-20 14:57 ` [PATCH v9 2/7] dt-bindings: memory: introduce DDR4 Rob Herring (Arm)
2025-11-18 15:07 ` [PATCH v9 3/7] dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel Clément Le Goffic
2025-11-18 15:08 ` [PATCH v9 4/7] dt-binding: memory: add DDR4 channel compatible Clément Le Goffic
2025-11-18 15:08 ` [PATCH v9 5/7] dt-bindings: memory: SDRAM channel: standardise node name Clément Le Goffic
2025-11-18 15:08 ` [PATCH v9 6/7] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-11-18 15:08 ` [PATCH v9 7/7] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
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