From: James Clark <james.clark@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jonathan Corbet <corbet@lwn.net>, Leo Yan <leo.yan@arm.com>,
Randy Dunlap <rdunlap@infradead.org>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
James Clark <james.clark@linaro.org>
Subject: [PATCH v5 05/13] coresight: Define format attributes with GEN_PMU_FORMAT_ATTR()
Date: Tue, 18 Nov 2025 16:27:55 +0000 [thread overview]
Message-ID: <20251118-james-cs-syncfreq-v5-5-82efd7b1a751@linaro.org> (raw)
In-Reply-To: <20251118-james-cs-syncfreq-v5-0-82efd7b1a751@linaro.org>
This allows us to define and consume them in a unified way in later
commits.
A lot of the existing code has open coded bit shifts or direct usage of
whole config values which is error prone and hides which bits are in use
and which are free.
Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 22 ++++++++---------
drivers/hwtracing/coresight/coresight-etm-perf.h | 31 ++++++++++++++++++++++++
2 files changed, 42 insertions(+), 11 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index faebd7822a77..28f1bfc4579f 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -13,6 +13,7 @@
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/perf_event.h>
+#include <linux/perf/arm_pmu.h>
#include <linux/percpu-defs.h>
#include <linux/slab.h>
#include <linux/stringhash.h>
@@ -54,22 +55,21 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
* The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
* now take them as general formats and apply on all ETMs.
*/
-PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
-PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
+GEN_PMU_FORMAT_ATTR(branch_broadcast);
+GEN_PMU_FORMAT_ATTR(cycacc);
/* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
-PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
+GEN_PMU_FORMAT_ATTR(contextid1);
/* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
-PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
-PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
-PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
+GEN_PMU_FORMAT_ATTR(contextid2);
+GEN_PMU_FORMAT_ATTR(timestamp);
+GEN_PMU_FORMAT_ATTR(retstack);
/* preset - if sink ID is used as a configuration selector */
-PMU_FORMAT_ATTR(preset, "config:0-3");
+GEN_PMU_FORMAT_ATTR(preset);
/* Sink ID - same for all ETMs */
-PMU_FORMAT_ATTR(sinkid, "config2:0-31");
+GEN_PMU_FORMAT_ATTR(sinkid);
/* config ID - set if a system configuration is selected */
-PMU_FORMAT_ATTR(configid, "config2:32-63");
-PMU_FORMAT_ATTR(cc_threshold, "config3:0-11");
-
+GEN_PMU_FORMAT_ATTR(configid);
+GEN_PMU_FORMAT_ATTR(cc_threshold);
/*
* contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h
index 5febbcdb8696..c794087a0e99 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.h
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.h
@@ -20,6 +20,37 @@ struct cscfg_config_desc;
*/
#define ETM_ADDR_CMP_MAX 8
+#define ATTR_CFG_FLD_preset_CFG config
+#define ATTR_CFG_FLD_preset_LO 0
+#define ATTR_CFG_FLD_preset_HI 3
+#define ATTR_CFG_FLD_branch_broadcast_CFG config
+#define ATTR_CFG_FLD_branch_broadcast_LO 8
+#define ATTR_CFG_FLD_branch_broadcast_HI 8
+#define ATTR_CFG_FLD_cycacc_CFG config
+#define ATTR_CFG_FLD_cycacc_LO 12
+#define ATTR_CFG_FLD_cycacc_HI 12
+#define ATTR_CFG_FLD_contextid1_CFG config
+#define ATTR_CFG_FLD_contextid1_LO 14
+#define ATTR_CFG_FLD_contextid1_HI 14
+#define ATTR_CFG_FLD_contextid2_CFG config
+#define ATTR_CFG_FLD_contextid2_LO 15
+#define ATTR_CFG_FLD_contextid2_HI 15
+#define ATTR_CFG_FLD_timestamp_CFG config
+#define ATTR_CFG_FLD_timestamp_LO 28
+#define ATTR_CFG_FLD_timestamp_HI 28
+#define ATTR_CFG_FLD_retstack_CFG config
+#define ATTR_CFG_FLD_retstack_LO 29
+#define ATTR_CFG_FLD_retstack_HI 29
+#define ATTR_CFG_FLD_sinkid_CFG config2
+#define ATTR_CFG_FLD_sinkid_LO 0
+#define ATTR_CFG_FLD_sinkid_HI 31
+#define ATTR_CFG_FLD_configid_CFG config2
+#define ATTR_CFG_FLD_configid_LO 32
+#define ATTR_CFG_FLD_configid_HI 63
+#define ATTR_CFG_FLD_cc_threshold_CFG config3
+#define ATTR_CFG_FLD_cc_threshold_LO 0
+#define ATTR_CFG_FLD_cc_threshold_HI 11
+
/**
* struct etm_filter - single instruction range or start/stop configuration.
* @start_addr: The address to start tracing on.
--
2.34.1
next prev parent reply other threads:[~2025-11-18 16:28 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-18 16:27 [PATCH v5 00/13] coresight: Update timestamp attribute to be an interval instead of bool James Clark
2025-11-18 16:27 ` [PATCH v5 01/13] coresight: Change syncfreq to be a u8 James Clark
2025-11-18 16:27 ` [PATCH v5 02/13] coresight: Repack struct etmv4_drvdata James Clark
2025-11-18 16:27 ` [PATCH v5 03/13] coresight: Refactor etm4_config_timestamp_event() James Clark
2025-11-20 13:04 ` Mike Leach
2025-11-20 13:52 ` James Clark
2025-11-20 14:18 ` Leo Yan
2025-11-20 14:25 ` Leo Yan
2025-11-20 14:39 ` Mike Leach
2025-11-20 14:26 ` Mike Leach
2025-11-20 14:42 ` James Clark
2025-11-18 16:27 ` [PATCH v5 04/13] coresight: Hide unused ETMv3 format attributes James Clark
2025-11-20 11:21 ` Mike Leach
2025-11-18 16:27 ` James Clark [this message]
2025-11-20 15:59 ` [PATCH v5 05/13] coresight: Define format attributes with GEN_PMU_FORMAT_ATTR() Mike Leach
2025-11-18 16:27 ` [PATCH v5 06/13] coresight: Interpret ETMv3 config with ATTR_CFG_GET_FLD() James Clark
2025-11-20 16:08 ` Mike Leach
2025-11-18 16:27 ` [PATCH v5 07/13] coresight: Don't reject unrecognized ETMv3 format attributes James Clark
2025-11-20 14:48 ` Mike Leach
2025-11-18 16:27 ` [PATCH v5 08/13] coresight: Interpret perf config with ATTR_CFG_GET_FLD() James Clark
2025-11-19 9:32 ` Mike Leach
2025-11-19 11:26 ` James Clark
2025-11-19 11:45 ` Mike Leach
2025-11-19 12:00 ` James Clark
2025-11-19 12:36 ` Leo Yan
2025-11-19 13:55 ` James Clark
2025-11-19 14:37 ` Leo Yan
2025-11-19 15:15 ` James Clark
2025-11-18 16:27 ` [PATCH v5 09/13] coresight: Interpret ETMv4 " James Clark
2025-11-20 16:10 ` Mike Leach
2025-11-18 16:28 ` [PATCH v5 10/13] coresight: Remove misleading definitions James Clark
2025-11-20 11:21 ` Mike Leach
2025-11-20 11:53 ` James Clark
2025-11-18 16:28 ` [PATCH v5 11/13] coresight: Extend width of timestamp format attribute James Clark
2025-11-18 16:28 ` [PATCH v5 12/13] coresight: Allow setting the timestamp interval James Clark
2025-11-18 16:28 ` [PATCH v5 13/13] coresight: docs: Document etm4x timestamp interval option James Clark
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