[PATCH 5/7] perf cs-etm: Don't use hard coded config bits when setting up TRCCONFIGR

James Clark
2025-12-01T16:42:00Z

Perf only looks at attr.config when determining what was programmed into
TRCCONFIGR. These bits could theoretically be in any of the config
fields. Use the evsel__get_config_val() helper so it's agnostic to
which config field they are in.

The kernel will also stop publishing the TRCCONFIGR register bits in a
header [1] so preempt that by defining them here.

[1]: https://lore.kernel.org/linux-arm-kernel/20251128-james-cs-syncfreq-v8-10-4d319764cc58@linaro.org/
Signed-off-by: James Clark <james.clark@linaro.org>
---
tools/perf/arch/arm/util/cs-etm.c | 79 +++++++++++++++++----------------------
1 file changed, 34 insertions(+), 45 deletions(-)

diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index 414cafb21c98..51ca8fa66ef8 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -68,6 +68,14 @@ static const char * const metadata_ete_ro[] = {

enum cs_etm_version { CS_NOT_PRESENT, CS_ETMV3, CS_ETMV4, CS_ETE };

+/* ETMv4 CONFIGR register bits */
+#define TRCCONFIGR_BB BIT(3)
+#define TRCCONFIGR_CCI BIT(4)
+#define TRCCONFIGR_CID BIT(6)
+#define TRCCONFIGR_VMID BIT(7)
+#define TRCCONFIGR_TS BIT(11)
+#define TRCCONFIGR_RS BIT(12)
+#define TRCCONFIGR_VMIDOPT BIT(15)

/* ETMv3 ETMCR register bits */
#define ETMCR_CYC_ACC BIT(12)
@@ -520,56 +528,37 @@ static u64 cs_etm_guess_etmcr(struct auxtrace_record *itr)
return etmcr;
}

-static u64 cs_etm_get_config(struct auxtrace_record *itr)
+static u64 cs_etmv4_guess_trcconfigr(struct auxtrace_record *itr)
{
+ u64 trcconfigr = 0;
struct cs_etm_recording *ptr =
- container_of(itr, struct cs_etm_recording, itr);
+ container_of(itr, struct cs_etm_recording, itr);
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
- struct evlist *evlist = ptr->evlist;
- struct evsel *evsel = cs_etm_get_evsel(evlist, cs_etm_pmu);
-
- /*
- * Variable perf_event_attr::config is assigned to
- * ETMv3/PTM. The bit fields have been made to match
- * the ETMv3.5 ETRMCR register specification. See the
- * PMU_FORMAT_ATTR() declarations in
- * drivers/hwtracing/coresight/coresight-perf.c for
- * details.
- */
- return evsel ? evsel->core.attr.config : 0;
-}
-
-#ifndef BIT
-#define BIT(N) (1UL << (N))
-#endif
+ struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, cs_etm_pmu);
+ u64 val;

-static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
-{
- u64 config = 0;
- u64 config_opts = 0;
+ if (!evsel)
+ return 0;

/*
- * The perf event variable config bits represent both
- * the command line options and register programming
- * bits in ETMv3/PTM. For ETMv4 we must remap options
- * to real bits
+ * Roughly guess what the kernel programmed into TRCCONFIGR based on
+ * what options the event was opened with. This doesn't have to be
+ * complete or 100% accurate, not all bits used by OpenCSD anyway.
*/
- config_opts = cs_etm_get_config(itr);
- if (config_opts & BIT(ETM_OPT_CYCACC))
- config |= BIT(ETM4_CFG_BIT_CYCACC);
- if (config_opts & BIT(ETM_OPT_CTXTID))
- config |= BIT(ETM4_CFG_BIT_CTXTID);
- if (config_opts & BIT(ETM_OPT_TS))
- config |= BIT(ETM4_CFG_BIT_TS);
- if (config_opts & BIT(ETM_OPT_RETSTK))
- config |= BIT(ETM4_CFG_BIT_RETSTK);
- if (config_opts & BIT(ETM_OPT_CTXTID2))
- config |= BIT(ETM4_CFG_BIT_VMID) |
- BIT(ETM4_CFG_BIT_VMID_OPT);
- if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST))
- config |= BIT(ETM4_CFG_BIT_BB);
-
- return config;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "cycacc", &val) && val)
+ trcconfigr |= TRCCONFIGR_CCI;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "contextid1", &val) && val)
+ trcconfigr |= TRCCONFIGR_CID;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "timestamp", &val) && val)
+ trcconfigr |= TRCCONFIGR_TS;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "retstack", &val) && val)
+ trcconfigr |= TRCCONFIGR_RS;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "contextid2", &val) && val)
+ trcconfigr |= TRCCONFIGR_VMID | TRCCONFIGR_VMIDOPT;
+ if (!evsel__get_config_val(cs_etm_pmu, evsel, "branch_broadcast", &val) && val)
+ trcconfigr |= TRCCONFIGR_BB;
+
+ return trcconfigr;
}

static size_t
@@ -691,7 +680,7 @@ static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr,
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;

/* Get trace configuration register */
- data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_get_config(itr);
+ data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_guess_trcconfigr(itr);
/* traceID set to legacy version, in case new perf running on older system */
data[CS_ETMV4_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu);

@@ -723,7 +712,7 @@ static void cs_etm_save_ete_header(__u64 data[], struct auxtrace_record *itr, st
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;

/* Get trace configuration register */
- data[CS_ETE_TRCCONFIGR] = cs_etmv4_get_config(itr);
+ data[CS_ETE_TRCCONFIGR] = cs_etmv4_guess_trcconfigr(itr);
/* traceID set to legacy version, in case new perf running on older system */
data[CS_ETE_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu);

--
2.34.1