From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D40BD2F7D7 for ; Fri, 5 Dec 2025 10:27:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Oe2ZVZ6VGjMJHE+isn21KsE1sXHgskVMk8FzETjMVEI=; b=vWWMdAnM73X14UGEhVJYopt3iE lnJBMAtJ6IQm29nS1ZDbd8gQu5xWTHBrhMrB44yjLZYd8hrnO1Pd7CWwCg+JWuFiq6O+UVXDdEZ/t xQX04Kj0cBMS5IGwgRv71Km//VExQgePlzDeIPRlBZJSxrIw4NdKk4Z7mGb3QYWvJqGJUrxNAuoiA xQYFBA+e+xUe4uBCSHZOOgFXIM09rNfAx5Xpkw2BLQIAlOmXFX3gyITEbSDP2N8s+M7A40fFI7vaW IjpkG3PvtwyhIHrDMzyShC043uUjO4IUYRuURhtnbYAA9UoxOjgGsSPDs+xGL6+ipVHLkeC/j70hr fSMJZgcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vRT25-00000009OIA-2e3V; Fri, 05 Dec 2025 10:27:25 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vRT23-00000009OHp-2DIB for linux-arm-kernel@lists.infradead.org; Fri, 05 Dec 2025 10:27:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 43C0F339; Fri, 5 Dec 2025 02:27:15 -0800 (PST) Received: from localhost (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 30DC73F86F; Fri, 5 Dec 2025 02:27:22 -0800 (PST) Date: Fri, 5 Dec 2025 10:27:20 +0000 From: Leo Yan To: Mike Leach Cc: Yingchao Deng , Suzuki K Poulose , James Clark , Alexander Shishkin , Tingwei Zhang , quic_yingdeng@quicinc.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Jinlong Mao , Mao Jinlong Subject: Re: [PATCH v6 2/2] coresight: cti: Add Qualcomm extended CTI support Message-ID: <20251205102720.GP724103@e132581.arm.com> References: <20251202-extended_cti-v6-0-ab68bb15c4f5@oss.qualcomm.com> <20251202-extended_cti-v6-2-ab68bb15c4f5@oss.qualcomm.com> <20251203182944.GG724103@e132581.arm.com> <20251204104713.GL724103@e132581.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251205_022723_722644_D937ED30 X-CRM114-Status: GOOD ( 29.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Dec 04, 2025 at 03:07:10PM +0000, Mike Leach wrote: [...] > > > > > + /* > > > > > + * QCOM CTI does not implement Claimtag functionality as > > > > > + * per CoreSight specification, but its CLAIMSET register > > > > > + * is incorrectly initialized to 0xF. This can mislead > > > > > + * tools or drivers into thinking the component is claimed. > > > > > + * > > > > > + * Reset CLAIMSET to 0 to reflect that no claims are active. > > > > > + */ > > > > > + writel_relaxed(0, drvdata->base + CORESIGHT_CLAIMSET); > > > > > > > > I am confused for this. If QCOM CTI does not implement claim tag, > > > > then what is the designed register at the offset CORESIGHT_CLAIMSET? > > > > > > > > Should you bypass all claim tag related operations for QCOM CTI case? > > > > (I don't see you touch anything for claim and declaim tags). > > > > > > > > > > The patch I have created to handle systems without correct claim tag > > > operation is a dependency for this patch set. Thus no need for > > > override here as the core code will handle this correctly. > > > > > > The only issue is ensuring the non-CTI spec implementation will result > > > in the correct detection of no claim tags present. > > > > Your patch works only when a module has implemented claim registers. > > > > Per the Coresight spec - unimplemented registers must be RAZ/WI- so > this still works for non implemented claim registers. QCOM CTI does not follow the spec in two aspects: - Given the patch's comment: "QCOM CTI does not implement Claim tag functionality as per CoreSight specification", I am suspect the CLAIM registers are not implemented at all in QCOM CTI. - It neither follows up the "unimplemented registers must be RAZ/WI" - the patch says its reset value is 0xF and then even can write 0 to it. > > This leads to two issues: we end up clearing an unknown register in the > > CTI driver, and then the coresight core layer assumes it is reading a > > claim register even though it is not. > > Again RAZ will simply read 0x0 - which is an indication that there are > no claim bits implemented. > > > > > For QCOM CTI, combined with your patch, I would suggest directly > > setting csdev->access.claim_tag_impl to false (perhaps using a helper). > > That would be a better solution, though as Qcom appear to have > implemented a pair of standard RW registers rather than the claim tag > functionality, the write solution works for this particular > implementation. If an IP violates both the rules for implemented claim registers and the rules for non-implemented claim registers, how can we rely on these registers to detect the claim feature? My feeling is we are building a house on sand - these registers are not used for claim tags purpose at all. Thanks, Leo