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[5.94.28.5]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-430f6a42c8csm7625568f8f.16.2025.12.14.13.53.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 13:53:03 -0800 (PST) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Stefano Radaelli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/6] arm64: dts: imx8mp-var-som: Move UART2 description to Symphony carrier Date: Sun, 14 Dec 2025 22:52:50 +0100 Message-ID: <20251214215256.5812-4-stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251214215256.5812-1-stefano.r@variscite.com> References: <20251214215256.5812-1-stefano.r@variscite.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251214_135306_776546_F25F2C25 X-CRM114-Status: GOOD ( 12.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The VAR-SOM-MX8MP module does not provide an onboard debug console. UART2 is routed and exposed only on the Symphony carrier board, while custom carrier designs may choose to expose a different UART. Move the UART2 node from the SOM device tree to the imx8mp-var-som-symphony.dts, keeping the SOM dtsi limited to hardware present on the module itself. Signed-off-by: Stefano Radaelli --- .../dts/freescale/imx8mp-var-som-symphony.dts | 18 ++++++++++++++++++ .../boot/dts/freescale/imx8mp-var-som.dtsi | 18 ------------------ 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts index 361e6122bdc3..291f65e36865 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts @@ -9,6 +9,10 @@ / { model = "Variscite VAR-SOM-MX8M-PLUS on Symphony-Board"; compatible = "variscite,var-som-mx8mp-symphony", "variscite,var-som-mx8mp", "fsl,imx8mp"; + chosen { + stdout-path = &uart2; + }; + gpio-leds { compatible = "gpio-leds"; @@ -68,6 +72,13 @@ usb3-sata-sel-hog { }; }; +/* Console */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + /* SD-card */ &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; @@ -95,6 +106,13 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0xc0 >; }; + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 + >; + }; + pinctrl_usdhc2_gpio: usdhc2-gpiogrp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x1c4 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi index 158a78ec9656..5bba91dcef17 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi @@ -15,10 +15,6 @@ / { model = "Variscite VAR-SOM-MX8M Plus module"; - chosen { - stdout-path = &uart2; - }; - memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0 0xc0000000>, @@ -206,13 +202,6 @@ ldo5: LDO5 { }; }; -/* Console */ -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - /* eMMC */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; @@ -267,13 +256,6 @@ MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1c0 >; }; - pinctrl_uart2: uart2grp { - fsl,pins = < - MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 - MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 - >; - }; - pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 -- 2.47.3