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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2b04e58d423sm2564824eec.6.2025.12.18.00.10.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Dec 2025 00:10:45 -0800 (PST) From: Yuanfang Zhang Date: Thu, 18 Dec 2025 00:09:46 -0800 Subject: [PATCH v2 06/12] coresight-replicator: Update management interface for CPU-bound devices MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251218-cpu_cluster_component_pm-v2-6-2335a6ae62a0@oss.qualcomm.com> References: <20251218-cpu_cluster_component_pm-v2-0-2335a6ae62a0@oss.qualcomm.com> In-Reply-To: <20251218-cpu_cluster_component_pm-v2-0-2335a6ae62a0@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Leo Yan , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio Cc: kernel@oss.qualcomm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Yuanfang Zhang , maulik.shah@oss.qualcomm.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1766045439; l=3386; i=yuanfang.zhang@oss.qualcomm.com; s=20250814; h=from:subject:message-id; bh=tRqkZYK4AglbLGklSYzp72IT+4oELHjCcHihOb5pY2E=; b=n9/JjWbuXWrmOZTTtygtYUn0byxKNWiKgxpoZO5xT5JsIF+Rk4mW38XCk/mXYP6jUZBV6KTf3 k/zADsYz0ZoAieyGH1MR1+vQyduL1eJwzebcOgQtew/FlnhwS46WQa6 X-Developer-Key: i=yuanfang.zhang@oss.qualcomm.com; a=ed25519; pk=9oS/FoPW5k0CsqSDDrPlnV+kVIOUaAe0O5pr4M1wHgY= X-Proofpoint-ORIG-GUID: GQmDIkQZBaJawbONiHUmSytZNNMH3uiB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE4MDA2NiBTYWx0ZWRfX0YXMcoVaBWir wkAEq78Y3UZfb0FEAXGU7Mxs2DHcB6cErEpeK31YIz2MpFpC0mzO+7NSeEg3unB2FeyEsplH4kl pjbwGYIMg1rPwKeb1SJelWhoUMiRi7zcujvotXlY8JQsr2KaQ67w4lWqVekREYI01O+kA+iuTTe Vnzk2MXHp0WDRQ562ems1hhZESXqwmaU8Vd3vEkbxcJ2NT+6VD7zFnAQD4G+kUxOmeFZUARUhtd PznW3al7UgGM2DSMA11x3V19E0TWyPs3jIE846Q5uSjAHdiwPq139+mRo2ioboiPlAUKkjMM36q ZY44IsBlPsOGFBRrxbll/RERac8LgOh3TMYvcWt7PrH/m4cVgDFM3N6Riyw3Bj716t8fCTh6LIN ncTbjkAXf0VJX8t+ewuOmjokBAIQuA== X-Authority-Analysis: v=2.4 cv=NPHYOk6g c=1 sm=1 tr=0 ts=6943b70a cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=5J7XQuhJkvlR0EEfeBgA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: GQmDIkQZBaJawbONiHUmSytZNNMH3uiB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-18_01,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180066 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251218_001051_253581_24DB3FB1 X-CRM114-Status: GOOD ( 18.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Standard system replicators allow direct register access from any CPU. However, replicators associated with specific CPU clusters share the cluster's power domain and require access via a CPU within that domain. Replace the standard `coresight_simple_reg*` accessors with custom handlers (`coresight_replicator_reg*`) to support these devices: - For cluster-bound replicators (indicated by `supported_cpus`), use `smp_call_function_single()` to read registers on an associated CPU. - For standard replicators, retain the direct access behavior. This ensures correct operation for per-cluster replicators while maintaining compatibility for existing system-level devices. Signed-off-by: Yuanfang Zhang --- drivers/hwtracing/coresight/coresight-replicator.c | 61 +++++++++++++++++++++- 1 file changed, 59 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index f8d13894098f1e414fb0da8d6eeb1da4f0d55a8c..a9f22d0e15de21aa06c8d1e193e5db06091efd75 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -58,6 +58,7 @@ struct replicator_drvdata { struct replicator_smp_arg { struct replicator_drvdata *drvdata; int outport; + u32 offset; int rc; }; @@ -286,9 +287,65 @@ static const struct coresight_ops replicator_cs_ops = { .link_ops = &replicator_link_ops, }; +static void replicator_read_register_smp_call(void *info) +{ + struct replicator_smp_arg *arg = info; + + arg->rc = readl_relaxed(arg->drvdata->base + arg->offset); +} + +static ssize_t coresight_replicator_reg32_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct cs_off_attribute *cs_attr = container_of(attr, struct cs_off_attribute, attr); + unsigned long flags; + struct replicator_smp_arg arg = { 0 }; + u32 val; + int ret, cpu; + + pm_runtime_get_sync(dev->parent); + + if (!drvdata->supported_cpus) { + raw_spin_lock_irqsave(&drvdata->spinlock, flags); + val = readl_relaxed(drvdata->base + cs_attr->off); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); + + } else { + arg.drvdata = drvdata; + arg.offset = cs_attr->off; + for_each_cpu(cpu, drvdata->supported_cpus) { + ret = smp_call_function_single(cpu, + replicator_read_register_smp_call, + &arg, 1); + if (!ret) + break; + } + if (!ret) { + val = arg.rc; + } else { + pm_runtime_put_sync(dev->parent); + return ret; + } + } + + pm_runtime_put_sync(dev->parent); + + return sysfs_emit(buf, "0x%x\n", val); +} + +#define coresight_replicator_reg32(name, offset) \ + (&((struct cs_off_attribute[]) { \ + { \ + __ATTR(name, 0444, coresight_replicator_reg32_show, NULL), \ + offset \ + } \ + })[0].attr.attr) + static struct attribute *replicator_mgmt_attrs[] = { - coresight_simple_reg32(idfilter0, REPLICATOR_IDFILTER0), - coresight_simple_reg32(idfilter1, REPLICATOR_IDFILTER1), + coresight_replicator_reg32(idfilter0, REPLICATOR_IDFILTER0), + coresight_replicator_reg32(idfilter1, REPLICATOR_IDFILTER1), NULL, }; -- 2.34.1