* [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media
@ 2025-12-15 8:53 Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 1/7] dt-bindings: vendor-prefixes: Add Verisilicon Benjamin Gaignard
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 4326 bytes --]
Hi all,
This patch series adds support for the Verisilicon IOMMU, which is found
in front
of hardware encoder and decoder blocks in several SoCs using Verisilicon
IP.
A first implementation of this IOMMU is available on the Rockchip RK3588
SoC.
Rockchip provides a driver for this hardware in their 6.1 kernel branch:
https://github.com/rockchip-linux/kernel/blob/develop-6.1/drivers/iommu/rockchip-iommu-av1d.c
This series includes:
- a new binding for the Verisilicon IOMMU
- a driver implementation
- DT updates for RK3588
The driver was forward-ported from Rockchip’s 6.1 implementation,
the prefix was renamed to vsi for generality, and several fixes were
applied.
AV1 decoding was tested using the stateless VPU driver and Fluster.
The test results show a score of 205/239, which confirms that no
regressions
were introduced by this series.
Feedback and testing welcome.
changes in version 10:
- Update vsi_iommu_identity_attach() and vsi_iommu_attach_device()
prototypes.
- Fix build as module issue when Verisilicon video decoder is built-in.
- Rebase on master branch.
changes in version 9:
- removing blanks lines.
changes in version 8:
- Add myself in MAINTAINERS file.
- Add API to restore VSI iommu context from decoder driver
- Fix reported checkpatch issues: add comment in pinlock_t declaration
and remove blank line.
- Include board name in defconfig patch commit message
changes in version 7:
- fix locking issues.
- add a patch in AV1 video decoder to manage per context iommu domain.
- fix compilation issues when build as module.
- remove useless "rockchip,rk3588-av1-iommu" compatible in driver code.
changes in version 6:
- rework lock schema in vsi_iommu_attach_device() so
it protected against concurrent invalidation.
- flush the cache after changing of domain.
changes in version 5:
- change locking schema to use 2 spin_locks: one to protect vsi_domain
data and one to protect vsi_iommu structure.
- make suspend/resume more robust by calling disable/enable function.
- rebased on top of v6.16-rc5
changes in version 4:
- rename and reorder compatibles fields.
- Kconfig dependencies
- Fix the remarks done by Jason and Robin: locking, clocks, macros
probing, pm_runtime, atomic allocation.
changes in version 3:
- Change compatible to "rockchip,rk3588-iommu-1.2"
- Fix compatible in .yaml
- Update DT and driver to use "rockchip,rk3588-iommu-1.2" compatible
- Set CONFIG_VSI_IOMMU as module in defconfig
- Create an identity domain for the driver
- Fix double flush issue
- Rework attach/detach logic
- Simplify xlate function
- Discover iommu device like done in ARM driver
- Remove ARM_DMA_USE_IOMMU from Kconfig
changes in version 2:
- Add a compatible "rockchip,rk3588-av1-iommu"
- Fix clock-names in binding
- Remove "vsi_mmu" label in binding example.
- Rework driver probe function
- Remove double flush
- Rework driver internal structures and avoid allocate
in xlate function.
- Do not touch to VPU driver anymore (path removed)
- Add a patch to enable the driver in arm64 defconfig
Benjamin Gaignard (7):
dt-bindings: vendor-prefixes: Add Verisilicon
dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU
iommu: Add verisilicon IOMMU driver
MAINTAINERS: Add entry for Verisilicon IOMMU driver
media: verisilicon: AV1: Restore IOMMU context before decoding a frame
arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588
arm64: defconfig: enable Verisilicon IOMMU for Rockchip RK3588
.../bindings/iommu/verisilicon,iommu.yaml | 71 ++
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
MAINTAINERS | 8 +
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 11 +
arch/arm64/configs/defconfig | 1 +
drivers/iommu/Kconfig | 11 +
drivers/iommu/Makefile | 1 +
drivers/iommu/vsi-iommu.c | 808 ++++++++++++++++++
drivers/media/platform/verisilicon/Kconfig | 1 +
.../verisilicon/rockchip_vpu981_hw_av1_dec.c | 15 +
include/linux/vsi-iommu.h | 21 +
11 files changed, 950 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
create mode 100644 drivers/iommu/vsi-iommu.c
create mode 100644 include/linux/vsi-iommu.h
--
2.43.0
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v10 1/7] dt-bindings: vendor-prefixes: Add Verisilicon
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 2/7] dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU Benjamin Gaignard
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard, Conor Dooley
Verisilicon Microelectronics is a company based in Shanghai, China,
developping hardware blocks for SoC.
https://verisilicon.com/
Add their name to the list of vendors.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index c7591b2aec2a..ce5c413948b1 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1745,6 +1745,8 @@ patternProperties:
description: Variscite Ltd.
"^vdl,.*":
description: Van der Laan b.v.
+ "^verisilicon,.*":
+ description: VeriSilicon Microelectronics
"^vertexcom,.*":
description: Vertexcom Technologies, Inc.
"^via,.*":
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 2/7] dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 1/7] dt-bindings: vendor-prefixes: Add Verisilicon Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 3/7] iommu: Add verisilicon IOMMU driver Benjamin Gaignard
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard, Conor Dooley
Add a device tree binding for the Verisilicon (VSI) IOMMU.
This IOMMU sits in front of hardware encoder and decoder
blocks on SoCs using Verisilicon IP, such as the Rockchip RK3588.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/iommu/verisilicon,iommu.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
diff --git a/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
new file mode 100644
index 000000000000..d3ce9e603b61
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Verisilicon IOMMU
+
+maintainers:
+ - Benjamin Gaignard <benjamin.gaignard@collabora.com>
+
+description: |+
+ A Versilicon iommu translates io virtual addresses to physical addresses for
+ its associated video decoder.
+
+properties:
+ compatible:
+ items:
+ - const: rockchip,rk3588-av1-iommu
+ - const: verisilicon,iommu-1.2
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Core clock
+ - description: Interface clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: iface
+
+ "#iommu-cells":
+ const: 0
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - "#iommu-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rockchip,rk3588-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ iommu@fdca0000 {
+ compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2";
+ reg = <0x0 0xfdca0000 0x0 0x600>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
+ clock-names = "core", "iface";
+ #iommu-cells = <0>;
+ };
+ };
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 3/7] iommu: Add verisilicon IOMMU driver
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 1/7] dt-bindings: vendor-prefixes: Add Verisilicon Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 2/7] dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 4/7] MAINTAINERS: Add entry for Verisilicon " Benjamin Gaignard
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
The Verisilicon IOMMU hardware block can be found in combination
with Verisilicon hardware video codecs (encoders or decoders) on
different SoCs.
Enable it will allow us to use non contiguous memory allocators
for Verisilicon video codecs.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
changes in version 10:
- Update vsi_iommu_identity_attach() and vsi_iommu_attach_device()
prototypes.
drivers/iommu/Kconfig | 11 +
drivers/iommu/Makefile | 1 +
drivers/iommu/vsi-iommu.c | 808 ++++++++++++++++++++++++++++++++++++++
include/linux/vsi-iommu.h | 21 +
4 files changed, 841 insertions(+)
create mode 100644 drivers/iommu/vsi-iommu.c
create mode 100644 include/linux/vsi-iommu.h
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 99095645134f..60468014f39f 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -384,6 +384,17 @@ config SPRD_IOMMU
Say Y here if you want to use the multimedia devices listed above.
+config VSI_IOMMU
+ tristate "Verisilicon IOMMU Support"
+ depends on (ARCH_ROCKCHIP && ARM64) || COMPILE_TEST
+ select IOMMU_API
+ help
+ Support for IOMMUs used by Verisilicon sub-systems like video
+ decoders or encoder hardware blocks.
+
+ Say Y here if you want to use this IOMMU in front of these
+ hardware blocks.
+
endif # IOMMU_SUPPORT
source "drivers/iommu/generic_pt/Kconfig"
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 8e8843316c4b..f4043350d023 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -36,3 +36,4 @@ obj-$(CONFIG_IOMMU_SVA) += iommu-sva.o
obj-$(CONFIG_IOMMU_IOPF) += io-pgfault.o
obj-$(CONFIG_SPRD_IOMMU) += sprd-iommu.o
obj-$(CONFIG_APPLE_DART) += apple-dart.o
+obj-$(CONFIG_VSI_IOMMU) += vsi-iommu.o
diff --git a/drivers/iommu/vsi-iommu.c b/drivers/iommu/vsi-iommu.c
new file mode 100644
index 000000000000..ea961adf5eb9
--- /dev/null
+++ b/drivers/iommu/vsi-iommu.c
@@ -0,0 +1,808 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (C) 2025 Collabora Ltd.
+ *
+ * IOMMU API for Verisilicon
+ *
+ * Module Authors: Yandong Lin <yandong.lin@rock-chips.com>
+ * Simon Xue <xxm@rock-chips.com>
+ * Benjamin Gaignard <benjamin.gaignard@collabora.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/iommu.h>
+#include <linux/list.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_iommu.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/vsi-iommu.h>
+
+#include "iommu-pages.h"
+
+struct vsi_iommu {
+ struct device *dev;
+ void __iomem *regs;
+ struct clk_bulk_data *clocks;
+ int num_clocks;
+ struct iommu_device iommu;
+ struct list_head node; /* entry in vsi_iommu_domain.iommus */
+ struct iommu_domain *domain; /* domain to which iommu is attached */
+ spinlock_t lock; /* lock to protect vsi_iommu fields */
+ int irq;
+};
+
+struct vsi_iommu_domain {
+ struct list_head iommus;
+ struct device *dev;
+ u32 *dt;
+ dma_addr_t dt_dma;
+ struct iommu_domain domain;
+ u64 *pta;
+ dma_addr_t pta_dma;
+ spinlock_t lock; /* lock to protect vsi_iommu_domain fields */
+};
+
+static struct iommu_domain vsi_identity_domain;
+
+#define NUM_DT_ENTRIES 1024
+#define NUM_PT_ENTRIES 1024
+#define PT_SIZE (NUM_PT_ENTRIES * sizeof(u32))
+
+#define SPAGE_SIZE BIT(12)
+
+/* vsi iommu regs address */
+#define VSI_MMU_CONFIG1_BASE 0x1ac
+#define VSI_MMU_AHB_EXCEPTION_BASE 0x380
+#define VSI_MMU_AHB_CONTROL_BASE 0x388
+#define VSI_MMU_AHB_TLB_ARRAY_BASE_L_BASE 0x38C
+
+/* MMU register offsets */
+#define VSI_MMU_FLUSH_BASE 0x184
+#define VSI_MMU_BIT_FLUSH BIT(4)
+
+#define VSI_MMU_PAGE_FAULT_ADDR 0x380
+#define VSI_MMU_STATUS_BASE 0x384 /* IRQ status */
+
+#define VSI_MMU_BIT_ENABLE BIT(0)
+
+#define VSI_MMU_OUT_OF_BOUND BIT(28)
+/* Irq mask */
+#define VSI_MMU_IRQ_MASK 0x7
+
+#define VSI_DTE_PT_ADDRESS_MASK 0xffffffc0
+#define VSI_DTE_PT_VALID BIT(0)
+
+#define VSI_PAGE_DESC_LO_MASK 0xfffff000
+#define VSI_PAGE_DESC_HI_MASK GENMASK_ULL(39, 32)
+#define VSI_PAGE_DESC_HI_SHIFT (32 - 4)
+
+static inline phys_addr_t vsi_dte_pt_address(u32 dte)
+{
+ return (phys_addr_t)dte & VSI_DTE_PT_ADDRESS_MASK;
+}
+
+static inline u32 vsi_mk_dte(u32 dte)
+{
+ return (phys_addr_t)dte | VSI_DTE_PT_VALID;
+}
+
+#define VSI_PTE_PAGE_WRITABLE BIT(2)
+#define VSI_PTE_PAGE_VALID BIT(0)
+
+static inline phys_addr_t vsi_pte_page_address(u64 pte)
+{
+ return ((pte << VSI_PAGE_DESC_HI_SHIFT) & VSI_PAGE_DESC_HI_MASK) |
+ (pte & VSI_PAGE_DESC_LO_MASK);
+}
+
+static u32 vsi_mk_pte(phys_addr_t page, int prot)
+{
+ u32 flags = 0;
+
+ flags |= (prot & IOMMU_WRITE) ? VSI_PTE_PAGE_WRITABLE : 0;
+
+ page = (page & VSI_PAGE_DESC_LO_MASK) |
+ ((page & VSI_PAGE_DESC_HI_MASK) >> VSI_PAGE_DESC_HI_SHIFT);
+
+ return page | flags | VSI_PTE_PAGE_VALID;
+}
+
+#define VSI_DTE_PT_VALID BIT(0)
+
+static inline bool vsi_dte_is_pt_valid(u32 dte)
+{
+ return dte & VSI_DTE_PT_VALID;
+}
+
+static inline bool vsi_pte_is_page_valid(u32 pte)
+{
+ return pte & VSI_PTE_PAGE_VALID;
+}
+
+static u32 vsi_mk_pte_invalid(u32 pte)
+{
+ return pte & ~VSI_PTE_PAGE_VALID;
+}
+
+#define VSI_MASTER_TLB_MASK GENMASK_ULL(31, 10)
+/* mode 0 : 4k */
+#define VSI_PTA_4K_MODE 0
+
+static u64 vsi_mk_pta(dma_addr_t dt_dma)
+{
+ u64 val = (dt_dma & VSI_MASTER_TLB_MASK) | VSI_PTA_4K_MODE;
+
+ return val;
+}
+
+static struct vsi_iommu_domain *to_vsi_domain(struct iommu_domain *dom)
+{
+ return container_of(dom, struct vsi_iommu_domain, domain);
+}
+
+static inline void vsi_table_flush(struct vsi_iommu_domain *vsi_domain, dma_addr_t dma,
+ unsigned int count)
+{
+ size_t size = count * sizeof(u32); /* count of u32 entry */
+
+ dma_sync_single_for_device(vsi_domain->dev, dma, size, DMA_TO_DEVICE);
+}
+
+#define VSI_IOVA_DTE_MASK 0xffc00000
+#define VSI_IOVA_DTE_SHIFT 22
+#define VSI_IOVA_PTE_MASK 0x003ff000
+#define VSI_IOVA_PTE_SHIFT 12
+#define VSI_IOVA_PAGE_MASK 0x00000fff
+#define VSI_IOVA_PAGE_SHIFT 0
+
+static u32 vsi_iova_dte_index(u32 iova)
+{
+ return (iova & VSI_IOVA_DTE_MASK) >> VSI_IOVA_DTE_SHIFT;
+}
+
+static u32 vsi_iova_pte_index(u32 iova)
+{
+ return (iova & VSI_IOVA_PTE_MASK) >> VSI_IOVA_PTE_SHIFT;
+}
+
+static u32 vsi_iova_page_offset(u32 iova)
+{
+ return (iova & VSI_IOVA_PAGE_MASK) >> VSI_IOVA_PAGE_SHIFT;
+}
+
+static void vsi_iommu_flush_tlb_all(struct iommu_domain *domain)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ struct list_head *pos;
+ unsigned long flags;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+
+ list_for_each(pos, &vsi_domain->iommus) {
+ struct vsi_iommu *iommu;
+ int ret;
+
+ iommu = list_entry(pos, struct vsi_iommu, node);
+ ret = pm_runtime_resume_and_get(iommu->dev);
+ if (ret < 0)
+ continue;
+
+ spin_lock(&iommu->lock);
+
+ writel(VSI_MMU_BIT_FLUSH, iommu->regs + VSI_MMU_FLUSH_BASE);
+ writel(0, iommu->regs + VSI_MMU_FLUSH_BASE);
+
+ spin_unlock(&iommu->lock);
+ pm_runtime_put_autosuspend(iommu->dev);
+ }
+
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+}
+
+static irqreturn_t vsi_iommu_irq(int irq, void *dev_id)
+{
+ struct vsi_iommu *iommu = dev_id;
+ unsigned long flags;
+ dma_addr_t iova;
+ u32 status;
+
+ if (pm_runtime_resume_and_get(iommu->dev) < 0)
+ return IRQ_NONE;
+
+ spin_lock_irqsave(&iommu->lock, flags);
+
+ status = readl(iommu->regs + VSI_MMU_STATUS_BASE);
+ if (status & VSI_MMU_IRQ_MASK) {
+ dev_err(iommu->dev, "unexpected int_status=%08x\n", status);
+ iova = readl(iommu->regs + VSI_MMU_PAGE_FAULT_ADDR);
+ report_iommu_fault(iommu->domain, iommu->dev, iova, status);
+ }
+ writel(0, iommu->regs + VSI_MMU_STATUS_BASE);
+
+ spin_unlock_irqrestore(&iommu->lock, flags);
+ pm_runtime_put_autosuspend(iommu->dev);
+
+ return IRQ_HANDLED;
+}
+
+static struct vsi_iommu *vsi_iommu_get_from_dev(struct device *dev)
+{
+ struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+ struct device *iommu_dev = bus_find_device_by_fwnode(&platform_bus_type,
+ fwspec->iommu_fwnode);
+
+ put_device(iommu_dev);
+
+ return iommu_dev ? dev_get_drvdata(iommu_dev) : NULL;
+}
+
+static struct iommu_domain *vsi_iommu_domain_alloc_paging(struct device *dev)
+{
+ struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
+ struct vsi_iommu_domain *vsi_domain;
+
+ vsi_domain = kzalloc(sizeof(*vsi_domain), GFP_KERNEL);
+ if (!vsi_domain)
+ return NULL;
+
+ vsi_domain->dev = iommu->dev;
+ spin_lock_init(&vsi_domain->lock);
+
+ /*
+ * iommu use a 2 level pagetable.
+ * Each level1 (dt) and level2 (pt) table has 1024 4-byte entries.
+ * Allocate one 4 KiB page for each table.
+ */
+ vsi_domain->dt = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
+ SPAGE_SIZE);
+ if (!vsi_domain->dt)
+ goto err_free_domain;
+
+ vsi_domain->dt_dma = dma_map_single(vsi_domain->dev, vsi_domain->dt,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(vsi_domain->dev, vsi_domain->dt_dma)) {
+ dev_err(dev, "DMA map error for DT\n");
+ goto err_free_dt;
+ }
+
+ vsi_domain->pta = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
+ SPAGE_SIZE);
+ if (!vsi_domain->pta)
+ goto err_unmap_dt;
+
+ vsi_domain->pta[0] = vsi_mk_pta(vsi_domain->dt_dma);
+ vsi_domain->pta_dma = dma_map_single(vsi_domain->dev, vsi_domain->pta,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(vsi_domain->dev, vsi_domain->pta_dma)) {
+ dev_err(dev, "DMA map error for PTA\n");
+ goto err_free_pta;
+ }
+
+ INIT_LIST_HEAD(&vsi_domain->iommus);
+
+ vsi_domain->domain.geometry.aperture_start = 0;
+ vsi_domain->domain.geometry.aperture_end = DMA_BIT_MASK(32);
+ vsi_domain->domain.geometry.force_aperture = true;
+ vsi_domain->domain.pgsize_bitmap = SZ_4K;
+
+ return &vsi_domain->domain;
+
+err_free_pta:
+ iommu_free_pages(vsi_domain->pta);
+err_unmap_dt:
+ dma_unmap_single(vsi_domain->dev, vsi_domain->dt_dma,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+err_free_dt:
+ iommu_free_pages(vsi_domain->dt);
+err_free_domain:
+ kfree(vsi_domain);
+
+ return NULL;
+}
+
+static phys_addr_t vsi_iommu_iova_to_phys(struct iommu_domain *domain,
+ dma_addr_t iova)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ phys_addr_t pt_phys, phys = 0;
+ unsigned long flags;
+ u32 dte, pte;
+ u32 *page_table;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+ dte = vsi_domain->dt[vsi_iova_dte_index(iova)];
+ if (!vsi_dte_is_pt_valid(dte))
+ goto unlock;
+
+ pt_phys = vsi_dte_pt_address(dte);
+ page_table = (u32 *)phys_to_virt(pt_phys);
+ pte = page_table[vsi_iova_pte_index(iova)];
+ if (!vsi_pte_is_page_valid(pte))
+ goto unlock;
+
+ phys = vsi_pte_page_address(pte) + vsi_iova_page_offset(iova);
+
+unlock:
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+ return phys;
+}
+
+static size_t vsi_iommu_unmap_iova(struct vsi_iommu_domain *vsi_domain,
+ u32 *pte_addr, dma_addr_t pte_dma,
+ size_t size)
+{
+ unsigned int pte_count;
+ unsigned int pte_total = size / SPAGE_SIZE;
+
+ for (pte_count = 0;
+ pte_count < pte_total && pte_count < NUM_PT_ENTRIES; pte_count++) {
+ u32 pte = pte_addr[pte_count];
+
+ if (!vsi_pte_is_page_valid(pte))
+ break;
+
+ pte_addr[pte_count] = vsi_mk_pte_invalid(pte);
+ }
+
+ vsi_table_flush(vsi_domain, pte_dma, pte_total);
+
+ return pte_count * SPAGE_SIZE;
+}
+
+static int vsi_iommu_map_iova(struct vsi_iommu_domain *vsi_domain, u32 *pte_addr,
+ dma_addr_t pte_dma, dma_addr_t iova,
+ phys_addr_t paddr, size_t size, int prot)
+{
+ unsigned int pte_count;
+ unsigned int pte_total = size / SPAGE_SIZE;
+
+ for (pte_count = 0;
+ pte_count < pte_total && pte_count < NUM_PT_ENTRIES; pte_count++) {
+ u32 pte = pte_addr[pte_count];
+
+ if (vsi_pte_is_page_valid(pte))
+ return (pte_count - 1) * SPAGE_SIZE;
+
+ pte_addr[pte_count] = vsi_mk_pte(paddr, prot);
+
+ paddr += SPAGE_SIZE;
+ }
+
+ vsi_table_flush(vsi_domain, pte_dma, pte_total);
+
+ return 0;
+}
+
+static size_t vsi_iommu_unmap(struct iommu_domain *domain, unsigned long _iova,
+ size_t size, size_t count, struct iommu_iotlb_gather *gather)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ dma_addr_t pte_dma, iova = (dma_addr_t)_iova;
+ unsigned long flags;
+ phys_addr_t pt_phys;
+ u32 dte;
+ u32 *pte_addr;
+ size_t unmap_size = 0;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+
+ dte = vsi_domain->dt[vsi_iova_dte_index(iova)];
+ /* Just return 0 if iova is unmapped */
+ if (!vsi_dte_is_pt_valid(dte))
+ goto unlock;
+
+ pt_phys = vsi_dte_pt_address(dte);
+ pte_addr = (u32 *)phys_to_virt(pt_phys) + vsi_iova_pte_index(iova);
+ pte_dma = pt_phys + vsi_iova_pte_index(iova) * sizeof(u32);
+ unmap_size = vsi_iommu_unmap_iova(vsi_domain, pte_addr, pte_dma, size);
+
+unlock:
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+
+ return unmap_size;
+}
+
+static u32 *vsi_dte_get_page_table(struct vsi_iommu_domain *vsi_domain,
+ dma_addr_t iova, gfp_t gfp)
+{
+ u32 *page_table, *dte_addr;
+ u32 dte_index, dte;
+ phys_addr_t pt_phys;
+ dma_addr_t pt_dma;
+ gfp_t flags;
+
+ dte_index = vsi_iova_dte_index(iova);
+ dte_addr = &vsi_domain->dt[dte_index];
+ dte = *dte_addr;
+ if (vsi_dte_is_pt_valid(dte))
+ goto done;
+
+ /* Do not allow to sleep while allocating the buffer */
+ flags = (gfp & ~GFP_KERNEL) | GFP_ATOMIC | GFP_DMA32;
+ page_table = iommu_alloc_pages_sz(flags, PAGE_SIZE);
+ if (!page_table)
+ return ERR_PTR(-ENOMEM);
+
+ pt_dma = dma_map_single(vsi_domain->dev, page_table, PAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(vsi_domain->dev, pt_dma)) {
+ dev_err(vsi_domain->dev, "DMA mapping error while allocating page table\n");
+ iommu_free_pages(page_table);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ dte = vsi_mk_dte(pt_dma);
+ *dte_addr = dte;
+
+ vsi_table_flush(vsi_domain,
+ vsi_domain->dt_dma + dte_index * sizeof(u32), 1);
+done:
+ pt_phys = vsi_dte_pt_address(dte);
+ return (u32 *)phys_to_virt(pt_phys);
+}
+
+static int vsi_iommu_map(struct iommu_domain *domain, unsigned long _iova,
+ phys_addr_t paddr, size_t size, size_t count,
+ int prot, gfp_t gfp, size_t *mapped)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ dma_addr_t pte_dma, iova = (dma_addr_t)_iova;
+ u32 *page_table, *pte_addr;
+ u32 dte, pte_index;
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+
+ page_table = vsi_dte_get_page_table(vsi_domain, iova, gfp);
+ if (IS_ERR(page_table)) {
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+ return PTR_ERR(page_table);
+ }
+
+ dte = vsi_domain->dt[vsi_iova_dte_index(iova)];
+ pte_index = vsi_iova_pte_index(iova);
+ pte_addr = &page_table[pte_index];
+ pte_dma = vsi_dte_pt_address(dte) + pte_index * sizeof(u32);
+ ret = vsi_iommu_map_iova(vsi_domain, pte_addr, pte_dma, iova,
+ paddr, size, prot);
+ if (!ret)
+ *mapped = size;
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+
+ return ret;
+}
+
+static void vsi_iommu_disable(struct vsi_iommu *iommu)
+{
+ writel(0, iommu->regs + VSI_MMU_AHB_CONTROL_BASE);
+}
+
+static int vsi_iommu_identity_attach(struct iommu_domain *domain,
+ struct device *dev, struct iommu_domain *old)
+{
+ struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
+ unsigned long flags;
+ int ret;
+
+ ret = pm_runtime_resume_and_get(iommu->dev);
+ if (ret < 0)
+ return ret;
+
+ spin_lock_irqsave(&iommu->lock, flags);
+ if (iommu->domain == domain)
+ goto unlock;
+
+ vsi_iommu_disable(iommu);
+ list_del_init(&iommu->node);
+
+ iommu->domain = domain;
+
+unlock:
+ spin_unlock_irqrestore(&iommu->lock, flags);
+ pm_runtime_put_autosuspend(iommu->dev);
+ return 0;
+}
+
+static const struct iommu_domain_ops vsi_identity_ops = {
+ .attach_dev = vsi_iommu_identity_attach,
+};
+
+static struct iommu_domain vsi_identity_domain = {
+ .type = IOMMU_DOMAIN_IDENTITY,
+ .ops = &vsi_identity_ops,
+};
+
+static void vsi_iommu_enable(struct vsi_iommu *iommu, struct iommu_domain *domain)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+
+ if (domain == &vsi_identity_domain)
+ return;
+
+ writel(vsi_domain->pta_dma, iommu->regs + VSI_MMU_AHB_TLB_ARRAY_BASE_L_BASE);
+ writel(VSI_MMU_OUT_OF_BOUND, iommu->regs + VSI_MMU_CONFIG1_BASE);
+ writel(VSI_MMU_BIT_ENABLE, iommu->regs + VSI_MMU_AHB_EXCEPTION_BASE);
+ writel(VSI_MMU_BIT_ENABLE, iommu->regs + VSI_MMU_AHB_CONTROL_BASE);
+}
+
+void vsi_iommu_restore_ctx(struct iommu_domain *domain)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ struct list_head *pos;
+ unsigned long flags;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+
+ list_for_each(pos, &vsi_domain->iommus) {
+ struct vsi_iommu *iommu;
+
+ iommu = list_entry(pos, struct vsi_iommu, node);
+ if (!iommu)
+ continue;
+
+ spin_lock(&iommu->lock);
+
+ writel(VSI_MMU_BIT_FLUSH, iommu->regs + VSI_MMU_FLUSH_BASE);
+ writel(0, iommu->regs + VSI_MMU_FLUSH_BASE);
+
+ spin_unlock(&iommu->lock);
+ }
+
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+}
+EXPORT_SYMBOL_GPL(vsi_iommu_restore_ctx);
+
+static int vsi_iommu_attach_device(struct iommu_domain *domain,
+ struct device *dev, struct iommu_domain *old)
+{
+ struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ unsigned long flags, flags2;
+ int ret = 0;
+
+ ret = pm_runtime_resume_and_get(iommu->dev);
+ if (ret < 0)
+ return ret;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+ spin_lock_irqsave(&iommu->lock, flags2);
+
+ vsi_iommu_enable(iommu, domain);
+ writel(VSI_MMU_BIT_FLUSH, iommu->regs + VSI_MMU_FLUSH_BASE);
+ writel(0, iommu->regs + VSI_MMU_FLUSH_BASE);
+
+ list_del_init(&iommu->node);
+ list_add_tail(&iommu->node, &vsi_domain->iommus);
+
+ iommu->domain = domain;
+
+ spin_unlock_irqrestore(&iommu->lock, flags2);
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+ pm_runtime_put_autosuspend(iommu->dev);
+ return ret;
+}
+
+static void vsi_iommu_domain_free(struct iommu_domain *domain)
+{
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(domain);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+
+ WARN_ON(!list_empty(&vsi_domain->iommus));
+
+ for (i = 0; i < NUM_DT_ENTRIES; i++) {
+ u32 dte = vsi_domain->dt[i];
+
+ if (vsi_dte_is_pt_valid(dte)) {
+ phys_addr_t pt_phys = vsi_dte_pt_address(dte);
+ u32 *page_table = phys_to_virt(pt_phys);
+
+ dma_unmap_single(vsi_domain->dev, pt_phys,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ iommu_free_pages(page_table);
+ }
+ }
+
+ dma_unmap_single(vsi_domain->dev, vsi_domain->dt_dma,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ iommu_free_pages(vsi_domain->dt);
+
+ dma_unmap_single(vsi_domain->dev, vsi_domain->pta_dma,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ iommu_free_pages(vsi_domain->pta);
+
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+
+ kfree(vsi_domain);
+}
+
+static struct iommu_device *vsi_iommu_probe_device(struct device *dev)
+{
+ struct vsi_iommu *iommu = vsi_iommu_get_from_dev(dev);
+ struct device_link *link;
+
+ link = device_link_add(dev, iommu->dev,
+ DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME);
+ if (!link)
+ dev_err(dev, "Unable to link %s\n", dev_name(iommu->dev));
+
+ dev_iommu_priv_set(dev, iommu);
+ return &iommu->iommu;
+}
+
+static void vsi_iommu_release_device(struct device *dev)
+{
+ struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
+
+ device_link_remove(dev, iommu->dev);
+}
+
+static int vsi_iommu_of_xlate(struct device *dev, const struct of_phandle_args *args)
+{
+ return iommu_fwspec_add_ids(dev, args->args, 1);
+}
+
+static const struct iommu_ops vsi_iommu_ops = {
+ .identity_domain = &vsi_identity_domain,
+ .release_domain = &vsi_identity_domain,
+ .domain_alloc_paging = vsi_iommu_domain_alloc_paging,
+ .of_xlate = vsi_iommu_of_xlate,
+ .probe_device = vsi_iommu_probe_device,
+ .release_device = vsi_iommu_release_device,
+ .device_group = generic_single_device_group,
+ .owner = THIS_MODULE,
+ .default_domain_ops = &(const struct iommu_domain_ops) {
+ .attach_dev = vsi_iommu_attach_device,
+ .map_pages = vsi_iommu_map,
+ .unmap_pages = vsi_iommu_unmap,
+ .flush_iotlb_all = vsi_iommu_flush_tlb_all,
+ .iova_to_phys = vsi_iommu_iova_to_phys,
+ .free = vsi_iommu_domain_free,
+ }
+};
+
+static const struct of_device_id vsi_iommu_dt_ids[] = {
+ {
+ .compatible = "verisilicon,iommu-1.2",
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, vsi_iommu_dt_ids);
+
+static int vsi_iommu_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct vsi_iommu *iommu;
+ int err;
+
+ iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL);
+ if (!iommu)
+ return -ENOMEM;
+
+ iommu->dev = dev;
+ spin_lock_init(&iommu->lock);
+ INIT_LIST_HEAD(&iommu->node);
+
+ iommu->regs = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(iommu->regs))
+ return -ENOMEM;
+
+ iommu->num_clocks = devm_clk_bulk_get_all(dev, &iommu->clocks);
+ if (iommu->num_clocks < 0)
+ return iommu->num_clocks;
+
+ err = clk_bulk_prepare(iommu->num_clocks, iommu->clocks);
+ if (err)
+ return err;
+
+ iommu->irq = platform_get_irq(pdev, 0);
+ if (iommu->irq < 0)
+ return iommu->irq;
+
+ err = devm_request_irq(iommu->dev, iommu->irq, vsi_iommu_irq,
+ IRQF_SHARED, dev_name(dev), iommu);
+ if (err)
+ goto err_unprepare_clocks;
+
+ dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+ platform_set_drvdata(pdev, iommu);
+
+ pm_runtime_set_autosuspend_delay(dev, 100);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_enable(dev);
+
+ err = iommu_device_sysfs_add(&iommu->iommu, dev, NULL, dev_name(dev));
+ if (err)
+ goto err_runtime_disable;
+
+ err = iommu_device_register(&iommu->iommu, &vsi_iommu_ops, dev);
+ if (err)
+ goto err_remove_sysfs;
+
+ return 0;
+
+err_remove_sysfs:
+ iommu_device_sysfs_remove(&iommu->iommu);
+err_runtime_disable:
+ pm_runtime_disable(dev);
+err_unprepare_clocks:
+ clk_bulk_unprepare(iommu->num_clocks, iommu->clocks);
+ return err;
+}
+
+static void vsi_iommu_shutdown(struct platform_device *pdev)
+{
+ struct vsi_iommu *iommu = platform_get_drvdata(pdev);
+
+ disable_irq(iommu->irq);
+ pm_runtime_force_suspend(&pdev->dev);
+}
+
+static int __maybe_unused vsi_iommu_suspend(struct device *dev)
+{
+ struct vsi_iommu *iommu = dev_get_drvdata(dev);
+
+ vsi_iommu_disable(iommu);
+
+ clk_bulk_disable(iommu->num_clocks, iommu->clocks);
+
+ return 0;
+}
+
+static int __maybe_unused vsi_iommu_resume(struct device *dev)
+{
+ struct vsi_iommu *iommu = dev_get_drvdata(dev);
+ unsigned long flags, flags2;
+ int ret;
+
+ ret = clk_bulk_enable(iommu->num_clocks, iommu->clocks);
+ if (ret)
+ return ret;
+
+ if (iommu->domain) {
+ struct vsi_iommu_domain *vsi_domain = to_vsi_domain(iommu->domain);
+
+ spin_lock_irqsave(&vsi_domain->lock, flags);
+ spin_lock_irqsave(&iommu->lock, flags2);
+ vsi_iommu_enable(iommu, iommu->domain);
+ spin_unlock_irqrestore(&iommu->lock, flags2);
+ spin_unlock_irqrestore(&vsi_domain->lock, flags);
+ }
+
+ return 0;
+}
+
+static DEFINE_RUNTIME_DEV_PM_OPS(vsi_iommu_pm_ops,
+ vsi_iommu_suspend, vsi_iommu_resume,
+ NULL);
+
+static struct platform_driver rockchip_vsi_iommu_driver = {
+ .probe = vsi_iommu_probe,
+ .shutdown = vsi_iommu_shutdown,
+ .driver = {
+ .name = "vsi_iommu",
+ .of_match_table = vsi_iommu_dt_ids,
+ .pm = pm_sleep_ptr(&vsi_iommu_pm_ops),
+ .suppress_bind_attrs = true,
+ },
+};
+module_platform_driver(rockchip_vsi_iommu_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@collabora.com>");
+MODULE_DESCRIPTION("Verisilicon IOMMU driver");
diff --git a/include/linux/vsi-iommu.h b/include/linux/vsi-iommu.h
new file mode 100644
index 000000000000..81a80f9219f4
--- /dev/null
+++ b/include/linux/vsi-iommu.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * verisilicon iommu: simple virtual address space management
+ *
+ * Copyright (c) 2025, Collabora
+ *
+ * Written by Benjamin Gaignard <benjamin.gaignard@collabora.com>
+ */
+
+#ifndef _VSI_IOMMU_H_
+#define _VSI_IOMMU_H_
+
+struct iommu_domain;
+
+#if IS_ENABLED(CONFIG_VSI_IOMMU)
+void vsi_iommu_restore_ctx(struct iommu_domain *domain);
+#else
+static inline void vsi_iommu_restore_ctx(struct iommu_domain *domain) {}
+#endif
+
+#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 4/7] MAINTAINERS: Add entry for Verisilicon IOMMU driver
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
` (2 preceding siblings ...)
2025-12-15 8:53 ` [PATCH v10 3/7] iommu: Add verisilicon IOMMU driver Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Benjamin Gaignard
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
Add maintainer for Verisilicon iommu driver.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
MAINTAINERS | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c9e416ba74c6..ca67e5333134 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -27296,6 +27296,14 @@ F: drivers/media/v4l2-core/v4l2-isp.c
F: include/media/v4l2-isp.h
F: include/uapi/linux/media/v4l2-isp.h
+VERISILICON IOMMU DRIVER
+M: Benjamin Gaignard <benjamin.gaignard@collabora.com>
+L: iommu@lists.linux.dev
+S: Maintained
+F: Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
+F: drivers/iommu/vsi-iommu.c
+F: include/linux/vsi-iommu.h
+
VF610 NAND DRIVER
M: Stefan Agner <stefan@agner.ch>
L: linux-mtd@lists.infradead.org
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
` (3 preceding siblings ...)
2025-12-15 8:53 ` [PATCH v10 4/7] MAINTAINERS: Add entry for Verisilicon " Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-16 15:27 ` kernel test robot
2025-12-22 15:32 ` kernel test robot
2025-12-15 8:53 ` [PATCH v10 6/7] arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588 Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 7/7] arm64: defconfig: enable Verisilicon IOMMU for Rockchip RK3588 Benjamin Gaignard
6 siblings, 2 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
AV1 is a stateless decoder which means multiple AV1 bitstreams could be
decoded at the same time using the same hardware block. Before decoding
a frame it is needed to restore the iommu tables to avoid mixing decode
contexts.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
changes in version 10:
- Fix build as module issue when Verisilicon video decoder is built-in.
drivers/media/platform/verisilicon/Kconfig | 1 +
.../verisilicon/rockchip_vpu981_hw_av1_dec.c | 15 +++++++++++++++
2 files changed, 16 insertions(+)
diff --git a/drivers/media/platform/verisilicon/Kconfig b/drivers/media/platform/verisilicon/Kconfig
index 3272a24db71d..e64bc8b55235 100644
--- a/drivers/media/platform/verisilicon/Kconfig
+++ b/drivers/media/platform/verisilicon/Kconfig
@@ -49,6 +49,7 @@ config VIDEO_HANTRO_ROCKCHIP
bool "Hantro VPU Rockchip support"
depends on VIDEO_HANTRO
depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select VSI_IOMMU
default y
help
Enable support for RK3288, RK3328, and RK3399 SoCs.
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
index e4703bb6be7c..d9e68e0ded68 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
@@ -5,6 +5,9 @@
* Author: Benjamin Gaignard <benjamin.gaignard@collabora.com>
*/
+#include <linux/iommu.h>
+#include <linux/vsi-iommu.h>
+
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_v4l2.h"
@@ -2095,12 +2098,24 @@ rockchip_vpu981_av1_dec_set_output_buffer(struct hantro_ctx *ctx)
hantro_write_addr(vpu, AV1_TILE_OUT_MV, mv_addr);
}
+static void rockchip_vpu981_av1_restore_iommu(struct hantro_ctx *ctx)
+{
+ struct iommu_domain *domain;
+
+ /* Before decoding any frame iommu context need to be restored */
+ domain = iommu_get_domain_for_dev(ctx->dev->v4l2_dev.dev);
+ if (domain)
+ vsi_iommu_restore_ctx(domain);
+}
+
int rockchip_vpu981_av1_dec_run(struct hantro_ctx *ctx)
{
struct hantro_dev *vpu = ctx->dev;
struct vb2_v4l2_buffer *vb2_src;
int ret;
+ rockchip_vpu981_av1_restore_iommu(ctx);
+
hantro_start_prepare_run(ctx);
ret = rockchip_vpu981_av1_dec_prepare_run(ctx);
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 6/7] arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
` (4 preceding siblings ...)
2025-12-15 8:53 ` [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 7/7] arm64: defconfig: enable Verisilicon IOMMU for Rockchip RK3588 Benjamin Gaignard
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
Add the device tree node for the Verisilicon IOMMU present
in the RK3588 SoC.
This IOMMU handles address translation for the VPU hardware blocks.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 2a7921793020..acff8bb3a612 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1364,6 +1364,17 @@ av1d: video-codec@fdc70000 {
clock-names = "aclk", "hclk";
power-domains = <&power RK3588_PD_AV1>;
resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
+ iommus = <&av1d_mmu>;
+ };
+
+ av1d_mmu: iommu@fdca0000 {
+ compatible = "rockchip,rk3588-av1-iommu", "verisilicon,iommu-1.2";
+ reg = <0x0 0xfdca0000 0x0 0x600>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
+ clock-names = "core", "iface";
+ #iommu-cells = <0>;
+ power-domains = <&power RK3588_PD_AV1>;
};
vop: vop@fdd90000 {
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v10 7/7] arm64: defconfig: enable Verisilicon IOMMU for Rockchip RK3588
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
` (5 preceding siblings ...)
2025-12-15 8:53 ` [PATCH v10 6/7] arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588 Benjamin Gaignard
@ 2025-12-15 8:53 ` Benjamin Gaignard
6 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-15 8:53 UTC (permalink / raw)
To: joro, will, robin.murphy, robh, krzk+dt, conor+dt, heiko,
nicolas.dufresne, p.zabel, mchehab
Cc: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
Enable Verisilicon IOMMU used by Rockchip RK3588 AV1 hardware codec.
This hardware block could be found in Radxa Rock 5B board.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 45288ec9eaf7..0106bf1935f8 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1525,6 +1525,7 @@ CONFIG_ARM_SMMU=y
CONFIG_ARM_SMMU_V3=y
CONFIG_MTK_IOMMU=y
CONFIG_QCOM_IOMMU=y
+CONFIG_VSI_IOMMU=m
CONFIG_REMOTEPROC=y
CONFIG_IMX_REMOTEPROC=y
CONFIG_MTK_SCP=m
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
2025-12-15 8:53 ` [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Benjamin Gaignard
@ 2025-12-16 15:27 ` kernel test robot
2025-12-17 9:01 ` Benjamin Gaignard
2025-12-22 15:32 ` kernel test robot
1 sibling, 1 reply; 11+ messages in thread
From: kernel test robot @ 2025-12-16 15:27 UTC (permalink / raw)
To: Benjamin Gaignard, joro, will, robin.murphy, robh, krzk+dt,
conor+dt, heiko, nicolas.dufresne, p.zabel, mchehab
Cc: oe-kbuild-all, iommu, devicetree, linux-kernel, linux-arm-kernel,
linux-rockchip, linux-media, kernel, Benjamin Gaignard
Hi Benjamin,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on v6.19-rc1 next-20251216]
[cannot apply to robh/for-next rockchip/for-next arm64/for-next/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Benjamin-Gaignard/dt-bindings-vendor-prefixes-Add-Verisilicon/20251215-165740
base: linus/master
patch link: https://lore.kernel.org/r/20251215085349.10155-6-benjamin.gaignard%40collabora.com
patch subject: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
config: arm-randconfig-r063-20251216 (https://download.01.org/0day-ci/archive/20251216/202512162315.lcRwm6Mr-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 1335a05ab8bc8339ce24be3a9da89d8c3f4e0571)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251216/202512162315.lcRwm6Mr-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512162315.lcRwm6Mr-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/iommu/vsi-iommu.c:231:3: error: call to undeclared function 'report_iommu_fault'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
231 | report_iommu_fault(iommu->domain, iommu->dev, iova, status);
| ^
>> drivers/iommu/vsi-iommu.c:245:21: error: no member named 'iommu_fwnode' in 'struct iommu_fwspec'
245 | fwspec->iommu_fwnode);
| ~~~~~~ ^
>> drivers/iommu/vsi-iommu.c:254:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
254 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^
drivers/iommu/vsi-iommu.c:254:28: note: did you mean 'dev_iommu_fwspec_get'?
include/linux/iommu.h:1457:36: note: 'dev_iommu_fwspec_get' declared here
1457 | static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
| ^
>> drivers/iommu/vsi-iommu.c:254:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
254 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~
drivers/iommu/vsi-iommu.c:496:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
496 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^
drivers/iommu/vsi-iommu.c:496:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
496 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/iommu/vsi-iommu.c:519:38: error: variable has incomplete type 'const struct iommu_domain_ops'
519 | static const struct iommu_domain_ops vsi_identity_ops = {
| ^
include/linux/iommu.h:40:8: note: forward declaration of 'struct iommu_domain_ops'
40 | struct iommu_domain_ops;
| ^
drivers/iommu/vsi-iommu.c:571:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
571 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^
drivers/iommu/vsi-iommu.c:571:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
571 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/iommu/vsi-iommu.c:644:2: error: call to undeclared function 'dev_iommu_priv_set'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
644 | dev_iommu_priv_set(dev, iommu);
| ^
drivers/iommu/vsi-iommu.c:650:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
650 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^
drivers/iommu/vsi-iommu.c:650:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
650 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
| ^ ~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/iommu/vsi-iommu.c:657:35: error: passing 'const uint32_t[16]' (aka 'const unsigned int[16]') to parameter of type 'u32 *' (aka 'unsigned int *') discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
657 | return iommu_fwspec_add_ids(dev, args->args, 1);
| ^~~~~~~~~~
include/linux/iommu.h:1451:65: note: passing argument to parameter 'ids' here
1451 | static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
| ^
>> drivers/iommu/vsi-iommu.c:667:18: error: use of undeclared identifier 'generic_single_device_group'
667 | .device_group = generic_single_device_group,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/iommu/vsi-iommu.c:669:25: error: variable has incomplete type 'const struct iommu_domain_ops'
669 | .default_domain_ops = &(const struct iommu_domain_ops) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
670 | .attach_dev = vsi_iommu_attach_device,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
671 | .map_pages = vsi_iommu_map,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
672 | .unmap_pages = vsi_iommu_unmap,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
673 | .flush_iotlb_all = vsi_iommu_flush_tlb_all,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
674 | .iova_to_phys = vsi_iommu_iova_to_phys,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
675 | .free = vsi_iommu_domain_free,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
676 | }
| ~
include/linux/iommu.h:40:8: note: forward declaration of 'struct iommu_domain_ops'
40 | struct iommu_domain_ops;
| ^
15 errors generated.
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for VSI_IOMMU
Depends on [n]: IOMMU_SUPPORT [=n] && (ARCH_ROCKCHIP [=n] && ARM64 || COMPILE_TEST [=y])
Selected by [m]:
- VIDEO_HANTRO_ROCKCHIP [=y] && MEDIA_SUPPORT [=y] && MEDIA_PLATFORM_SUPPORT [=y] && MEDIA_PLATFORM_DRIVERS [=y] && VIDEO_HANTRO [=m] && (ARCH_ROCKCHIP [=n] || COMPILE_TEST [=y])
vim +/report_iommu_fault +231 drivers/iommu/vsi-iommu.c
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 214
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 215 static irqreturn_t vsi_iommu_irq(int irq, void *dev_id)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 216 {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 217 struct vsi_iommu *iommu = dev_id;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 218 unsigned long flags;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 219 dma_addr_t iova;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 220 u32 status;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 221
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 222 if (pm_runtime_resume_and_get(iommu->dev) < 0)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 223 return IRQ_NONE;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 224
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 225 spin_lock_irqsave(&iommu->lock, flags);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 226
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 227 status = readl(iommu->regs + VSI_MMU_STATUS_BASE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 228 if (status & VSI_MMU_IRQ_MASK) {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 229 dev_err(iommu->dev, "unexpected int_status=%08x\n", status);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 230 iova = readl(iommu->regs + VSI_MMU_PAGE_FAULT_ADDR);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @231 report_iommu_fault(iommu->domain, iommu->dev, iova, status);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 232 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 233 writel(0, iommu->regs + VSI_MMU_STATUS_BASE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 234
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 235 spin_unlock_irqrestore(&iommu->lock, flags);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 236 pm_runtime_put_autosuspend(iommu->dev);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 237
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 238 return IRQ_HANDLED;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 239 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 240
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 241 static struct vsi_iommu *vsi_iommu_get_from_dev(struct device *dev)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 242 {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 243 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 244 struct device *iommu_dev = bus_find_device_by_fwnode(&platform_bus_type,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @245 fwspec->iommu_fwnode);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 246
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 247 put_device(iommu_dev);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 248
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 249 return iommu_dev ? dev_get_drvdata(iommu_dev) : NULL;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 250 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 251
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 252 static struct iommu_domain *vsi_iommu_domain_alloc_paging(struct device *dev)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 253 {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @254 struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 255 struct vsi_iommu_domain *vsi_domain;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 256
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 257 vsi_domain = kzalloc(sizeof(*vsi_domain), GFP_KERNEL);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 258 if (!vsi_domain)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 259 return NULL;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 260
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 261 vsi_domain->dev = iommu->dev;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 262 spin_lock_init(&vsi_domain->lock);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 263
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 264 /*
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 265 * iommu use a 2 level pagetable.
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 266 * Each level1 (dt) and level2 (pt) table has 1024 4-byte entries.
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 267 * Allocate one 4 KiB page for each table.
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 268 */
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 269 vsi_domain->dt = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 270 SPAGE_SIZE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 271 if (!vsi_domain->dt)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 272 goto err_free_domain;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 273
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 274 vsi_domain->dt_dma = dma_map_single(vsi_domain->dev, vsi_domain->dt,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 275 SPAGE_SIZE, DMA_TO_DEVICE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 276 if (dma_mapping_error(vsi_domain->dev, vsi_domain->dt_dma)) {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 277 dev_err(dev, "DMA map error for DT\n");
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 278 goto err_free_dt;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 279 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 280
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 281 vsi_domain->pta = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 282 SPAGE_SIZE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 283 if (!vsi_domain->pta)
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 284 goto err_unmap_dt;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 285
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 286 vsi_domain->pta[0] = vsi_mk_pta(vsi_domain->dt_dma);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 287 vsi_domain->pta_dma = dma_map_single(vsi_domain->dev, vsi_domain->pta,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 288 SPAGE_SIZE, DMA_TO_DEVICE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 289 if (dma_mapping_error(vsi_domain->dev, vsi_domain->pta_dma)) {
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 290 dev_err(dev, "DMA map error for PTA\n");
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 291 goto err_free_pta;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 292 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 293
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 294 INIT_LIST_HEAD(&vsi_domain->iommus);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 295
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 296 vsi_domain->domain.geometry.aperture_start = 0;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 297 vsi_domain->domain.geometry.aperture_end = DMA_BIT_MASK(32);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 298 vsi_domain->domain.geometry.force_aperture = true;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 299 vsi_domain->domain.pgsize_bitmap = SZ_4K;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 300
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 301 return &vsi_domain->domain;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 302
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 303 err_free_pta:
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 304 iommu_free_pages(vsi_domain->pta);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 305 err_unmap_dt:
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 306 dma_unmap_single(vsi_domain->dev, vsi_domain->dt_dma,
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 307 SPAGE_SIZE, DMA_TO_DEVICE);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 308 err_free_dt:
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 309 iommu_free_pages(vsi_domain->dt);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 310 err_free_domain:
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 311 kfree(vsi_domain);
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 312
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 313 return NULL;
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 314 }
b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 315
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
2025-12-16 15:27 ` kernel test robot
@ 2025-12-17 9:01 ` Benjamin Gaignard
0 siblings, 0 replies; 11+ messages in thread
From: Benjamin Gaignard @ 2025-12-17 9:01 UTC (permalink / raw)
To: kernel test robot, joro, will, robin.murphy, robh, krzk+dt,
conor+dt, heiko, nicolas.dufresne, p.zabel, mchehab
Cc: oe-kbuild-all, iommu, devicetree, linux-kernel, linux-arm-kernel,
linux-rockchip, linux-media, kernel
Le 16/12/2025 à 16:27, kernel test robot a écrit :
> Hi Benjamin,
>
> kernel test robot noticed the following build errors:
>
> [auto build test ERROR on linus/master]
> [also build test ERROR on v6.19-rc1 next-20251216]
> [cannot apply to robh/for-next rockchip/for-next arm64/for-next/core]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Benjamin-Gaignard/dt-bindings-vendor-prefixes-Add-Verisilicon/20251215-165740
> base: linus/master
> patch link: https://lore.kernel.org/r/20251215085349.10155-6-benjamin.gaignard%40collabora.com
> patch subject: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
> config: arm-randconfig-r063-20251216 (https://download.01.org/0day-ci/archive/20251216/202512162315.lcRwm6Mr-lkp@intel.com/config)
> compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 1335a05ab8bc8339ce24be3a9da89d8c3f4e0571)
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251216/202512162315.lcRwm6Mr-lkp@intel.com/reproduce)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202512162315.lcRwm6Mr-lkp@intel.com/
>
> All errors (new ones prefixed by >>):
>
>>> drivers/iommu/vsi-iommu.c:231:3: error: call to undeclared function 'report_iommu_fault'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 231 | report_iommu_fault(iommu->domain, iommu->dev, iova, status);
> | ^
>>> drivers/iommu/vsi-iommu.c:245:21: error: no member named 'iommu_fwnode' in 'struct iommu_fwspec'
> 245 | fwspec->iommu_fwnode);
> | ~~~~~~ ^
>>> drivers/iommu/vsi-iommu.c:254:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 254 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^
> drivers/iommu/vsi-iommu.c:254:28: note: did you mean 'dev_iommu_fwspec_get'?
> include/linux/iommu.h:1457:36: note: 'dev_iommu_fwspec_get' declared here
> 1457 | static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
> | ^
>>> drivers/iommu/vsi-iommu.c:254:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
> 254 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^ ~~~~~~~~~~~~~~~~~~~~~~~
> drivers/iommu/vsi-iommu.c:496:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 496 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^
> drivers/iommu/vsi-iommu.c:496:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
> 496 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^ ~~~~~~~~~~~~~~~~~~~~~~~
>>> drivers/iommu/vsi-iommu.c:519:38: error: variable has incomplete type 'const struct iommu_domain_ops'
> 519 | static const struct iommu_domain_ops vsi_identity_ops = {
> | ^
> include/linux/iommu.h:40:8: note: forward declaration of 'struct iommu_domain_ops'
> 40 | struct iommu_domain_ops;
> | ^
> drivers/iommu/vsi-iommu.c:571:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 571 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^
> drivers/iommu/vsi-iommu.c:571:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
> 571 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^ ~~~~~~~~~~~~~~~~~~~~~~~
>>> drivers/iommu/vsi-iommu.c:644:2: error: call to undeclared function 'dev_iommu_priv_set'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 644 | dev_iommu_priv_set(dev, iommu);
> | ^
> drivers/iommu/vsi-iommu.c:650:28: error: call to undeclared function 'dev_iommu_priv_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
> 650 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^
> drivers/iommu/vsi-iommu.c:650:20: error: incompatible integer to pointer conversion initializing 'struct vsi_iommu *' with an expression of type 'int' [-Wint-conversion]
> 650 | struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> | ^ ~~~~~~~~~~~~~~~~~~~~~~~
>>> drivers/iommu/vsi-iommu.c:657:35: error: passing 'const uint32_t[16]' (aka 'const unsigned int[16]') to parameter of type 'u32 *' (aka 'unsigned int *') discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
> 657 | return iommu_fwspec_add_ids(dev, args->args, 1);
> | ^~~~~~~~~~
> include/linux/iommu.h:1451:65: note: passing argument to parameter 'ids' here
> 1451 | static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
> | ^
>>> drivers/iommu/vsi-iommu.c:667:18: error: use of undeclared identifier 'generic_single_device_group'
> 667 | .device_group = generic_single_device_group,
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/iommu/vsi-iommu.c:669:25: error: variable has incomplete type 'const struct iommu_domain_ops'
> 669 | .default_domain_ops = &(const struct iommu_domain_ops) {
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 670 | .attach_dev = vsi_iommu_attach_device,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 671 | .map_pages = vsi_iommu_map,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 672 | .unmap_pages = vsi_iommu_unmap,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 673 | .flush_iotlb_all = vsi_iommu_flush_tlb_all,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 674 | .iova_to_phys = vsi_iommu_iova_to_phys,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 675 | .free = vsi_iommu_domain_free,
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 676 | }
> | ~
> include/linux/iommu.h:40:8: note: forward declaration of 'struct iommu_domain_ops'
> 40 | struct iommu_domain_ops;
> | ^
> 15 errors generated.
>
> Kconfig warnings: (for reference only)
> WARNING: unmet direct dependencies detected for VSI_IOMMU
> Depends on [n]: IOMMU_SUPPORT [=n] && (ARCH_ROCKCHIP [=n] && ARM64 || COMPILE_TEST [=y])
> Selected by [m]:
> - VIDEO_HANTRO_ROCKCHIP [=y] && MEDIA_SUPPORT [=y] && MEDIA_PLATFORM_SUPPORT [=y] && MEDIA_PLATFORM_DRIVERS [=y] && VIDEO_HANTRO [=m] && (ARCH_ROCKCHIP [=n] || COMPILE_TEST [=y])VSI_IOMMU
I will make VIDEO_HANTRO_ROCKCHIP depends on VSI_IOMMU instead of select it on the next version.
Regards,
Benjamin
>
>
> vim +/report_iommu_fault +231 drivers/iommu/vsi-iommu.c
>
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 214
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 215 static irqreturn_t vsi_iommu_irq(int irq, void *dev_id)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 216 {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 217 struct vsi_iommu *iommu = dev_id;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 218 unsigned long flags;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 219 dma_addr_t iova;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 220 u32 status;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 221
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 222 if (pm_runtime_resume_and_get(iommu->dev) < 0)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 223 return IRQ_NONE;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 224
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 225 spin_lock_irqsave(&iommu->lock, flags);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 226
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 227 status = readl(iommu->regs + VSI_MMU_STATUS_BASE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 228 if (status & VSI_MMU_IRQ_MASK) {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 229 dev_err(iommu->dev, "unexpected int_status=%08x\n", status);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 230 iova = readl(iommu->regs + VSI_MMU_PAGE_FAULT_ADDR);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @231 report_iommu_fault(iommu->domain, iommu->dev, iova, status);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 232 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 233 writel(0, iommu->regs + VSI_MMU_STATUS_BASE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 234
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 235 spin_unlock_irqrestore(&iommu->lock, flags);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 236 pm_runtime_put_autosuspend(iommu->dev);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 237
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 238 return IRQ_HANDLED;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 239 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 240
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 241 static struct vsi_iommu *vsi_iommu_get_from_dev(struct device *dev)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 242 {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 243 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 244 struct device *iommu_dev = bus_find_device_by_fwnode(&platform_bus_type,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @245 fwspec->iommu_fwnode);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 246
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 247 put_device(iommu_dev);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 248
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 249 return iommu_dev ? dev_get_drvdata(iommu_dev) : NULL;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 250 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 251
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 252 static struct iommu_domain *vsi_iommu_domain_alloc_paging(struct device *dev)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 253 {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 @254 struct vsi_iommu *iommu = dev_iommu_priv_get(dev);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 255 struct vsi_iommu_domain *vsi_domain;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 256
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 257 vsi_domain = kzalloc(sizeof(*vsi_domain), GFP_KERNEL);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 258 if (!vsi_domain)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 259 return NULL;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 260
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 261 vsi_domain->dev = iommu->dev;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 262 spin_lock_init(&vsi_domain->lock);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 263
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 264 /*
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 265 * iommu use a 2 level pagetable.
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 266 * Each level1 (dt) and level2 (pt) table has 1024 4-byte entries.
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 267 * Allocate one 4 KiB page for each table.
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 268 */
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 269 vsi_domain->dt = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 270 SPAGE_SIZE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 271 if (!vsi_domain->dt)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 272 goto err_free_domain;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 273
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 274 vsi_domain->dt_dma = dma_map_single(vsi_domain->dev, vsi_domain->dt,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 275 SPAGE_SIZE, DMA_TO_DEVICE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 276 if (dma_mapping_error(vsi_domain->dev, vsi_domain->dt_dma)) {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 277 dev_err(dev, "DMA map error for DT\n");
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 278 goto err_free_dt;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 279 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 280
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 281 vsi_domain->pta = iommu_alloc_pages_sz(GFP_KERNEL | GFP_DMA32,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 282 SPAGE_SIZE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 283 if (!vsi_domain->pta)
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 284 goto err_unmap_dt;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 285
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 286 vsi_domain->pta[0] = vsi_mk_pta(vsi_domain->dt_dma);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 287 vsi_domain->pta_dma = dma_map_single(vsi_domain->dev, vsi_domain->pta,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 288 SPAGE_SIZE, DMA_TO_DEVICE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 289 if (dma_mapping_error(vsi_domain->dev, vsi_domain->pta_dma)) {
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 290 dev_err(dev, "DMA map error for PTA\n");
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 291 goto err_free_pta;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 292 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 293
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 294 INIT_LIST_HEAD(&vsi_domain->iommus);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 295
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 296 vsi_domain->domain.geometry.aperture_start = 0;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 297 vsi_domain->domain.geometry.aperture_end = DMA_BIT_MASK(32);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 298 vsi_domain->domain.geometry.force_aperture = true;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 299 vsi_domain->domain.pgsize_bitmap = SZ_4K;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 300
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 301 return &vsi_domain->domain;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 302
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 303 err_free_pta:
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 304 iommu_free_pages(vsi_domain->pta);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 305 err_unmap_dt:
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 306 dma_unmap_single(vsi_domain->dev, vsi_domain->dt_dma,
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 307 SPAGE_SIZE, DMA_TO_DEVICE);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 308 err_free_dt:
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 309 iommu_free_pages(vsi_domain->dt);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 310 err_free_domain:
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 311 kfree(vsi_domain);
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 312
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 313 return NULL;
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 314 }
> b9e3cd4bea55cd Benjamin Gaignard 2025-12-15 315
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
2025-12-15 8:53 ` [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Benjamin Gaignard
2025-12-16 15:27 ` kernel test robot
@ 2025-12-22 15:32 ` kernel test robot
1 sibling, 0 replies; 11+ messages in thread
From: kernel test robot @ 2025-12-22 15:32 UTC (permalink / raw)
To: Benjamin Gaignard, joro, will, robin.murphy, robh, krzk+dt,
conor+dt, heiko, nicolas.dufresne, p.zabel, mchehab
Cc: Paul Gazzillo, Necip Fazil Yildiran, oe-kbuild-all, iommu,
devicetree, linux-kernel, linux-arm-kernel, linux-rockchip,
linux-media, kernel, Benjamin Gaignard
Hi Benjamin,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.19-rc2 next-20251219]
[cannot apply to robh/for-next rockchip/for-next arm64/for-next/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Benjamin-Gaignard/dt-bindings-vendor-prefixes-Add-Verisilicon/20251215-165740
base: linus/master
patch link: https://lore.kernel.org/r/20251215085349.10155-6-benjamin.gaignard%40collabora.com
patch subject: [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame
config: openrisc-kismet-CONFIG_VSI_IOMMU-CONFIG_VIDEO_HANTRO_ROCKCHIP-0-0 (https://download.01.org/0day-ci/archive/20251222/202512221600.vlUX9PF6-lkp@intel.com/config)
reproduce: (https://download.01.org/0day-ci/archive/20251222/202512221600.vlUX9PF6-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512221600.vlUX9PF6-lkp@intel.com/
kismet warnings: (new ones prefixed by >>)
>> kismet: WARNING: unmet direct dependencies detected for VSI_IOMMU when selected by VIDEO_HANTRO_ROCKCHIP
WARNING: unmet direct dependencies detected for VSI_IOMMU
Depends on [n]: IOMMU_SUPPORT [=n] && (ARCH_ROCKCHIP && ARM64 || COMPILE_TEST [=y])
Selected by [y]:
- VIDEO_HANTRO_ROCKCHIP [=y] && MEDIA_SUPPORT [=y] && MEDIA_PLATFORM_SUPPORT [=y] && MEDIA_PLATFORM_DRIVERS [=y] && VIDEO_HANTRO [=y] && (ARCH_ROCKCHIP || COMPILE_TEST [=y])
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-12-22 15:33 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-15 8:53 [PATCH v10 0/7] Add support for Verisilicon IOMMU used by media Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 1/7] dt-bindings: vendor-prefixes: Add Verisilicon Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 2/7] dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 3/7] iommu: Add verisilicon IOMMU driver Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 4/7] MAINTAINERS: Add entry for Verisilicon " Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 5/7] media: verisilicon: AV1: Restore IOMMU context before decoding a frame Benjamin Gaignard
2025-12-16 15:27 ` kernel test robot
2025-12-17 9:01 ` Benjamin Gaignard
2025-12-22 15:32 ` kernel test robot
2025-12-15 8:53 ` [PATCH v10 6/7] arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588 Benjamin Gaignard
2025-12-15 8:53 ` [PATCH v10 7/7] arm64: defconfig: enable Verisilicon IOMMU for Rockchip RK3588 Benjamin Gaignard
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