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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4ffa8d64563sm48461021cf.13.2026.01.08.06.45.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jan 2026 06:45:21 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vdrGK-00000002MBP-1mPB; Thu, 08 Jan 2026 10:45:20 -0400 Date: Thu, 8 Jan 2026 10:45:20 -0400 From: Jason Gunthorpe To: Mostafa Saleh Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robin.murphy@arm.com, will@kernel.org, joro@8bytes.org Subject: Re: [PATCH] iommu/io-pgtable-arm: Drop DMA API usage for CMOs Message-ID: <20260108144520.GE545276@ziepe.ca> References: <20260108113846.56179-1-smostafa@google.com> <20260108125934.GB545276@ziepe.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260108_064523_284126_C2574FE7 X-CRM114-Status: GOOD ( 25.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jan 08, 2026 at 01:44:51PM +0000, Mostafa Saleh wrote: > On Thu, Jan 8, 2026 at 1:27 PM Mostafa Saleh wrote: > > > > On Thu, Jan 8, 2026 at 12:59 PM Jason Gunthorpe wrote: > > > > > > On Thu, Jan 08, 2026 at 11:38:46AM +0000, Mostafa Saleh wrote: > > > > Jason pointed out that the DMA-API calls are not really needed [2]. > > > > > > > > Looking more into this. Initially, the io-pgtable API let drivers > > > > do the CMOs using tlb::flush_pgtable() where drivers were using the > > > > DMA API (map/unmap_single) only to do CMOs as the low-level cache > > > > functions won’t be available for modules. > > > > > > This isn't what I ment at all, the iommu-pages.h could do the flush > > > inside itself using the already existing > > > iommu_pages_flush_incoherent() instead of open coding the dma api > > > calls everwhere, and maybe that could directly call the arch function > > > on arm (as x86 does) which would be easier to implement in pkvm's > > > hypervisor. > > > > > > > I see, so basically, we add the check for IOMMU_PAGES_USE_DMA_API in > > iommu_pages_flush_incoherent() with the DMA-API stuff and call it from > > the io-pgtable-arm instead. > > > > iommu_pages_flush_incoherent() is also used to flush non-cacheable > pages in generic_pt from flush_writes_*(), so it might not be that > simple; We might need to add a new variant. There are no non-cachable pages in the iommu-pages system??? All memory comes from folios and is mapped to the CPU cachable. The general API requires the user of iommu-pages to know if the underlying HW is going to do non-coherent DMA, in this case it must call iommu_pages_flush_incoherent() before the HW does DMA. Effectively what I'm saying here is to convert the arm page table to use iommu-pages and then put your pkvm abstraction at the iommu-pages level instead of trying to hack up all these users. You can also do the same conversion to the smmu driver to use iommu-pages instead of DMA API, AMD and Intel are doing this already. Jason