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From: "Rafał Miłecki" <zajec5@gmail.com>
To: Florian Fainelli <florian.fainelli@broadcom.com>,
	Hauke Mehrtens <hauke@hauke-m.de>
Cc: bcm-kernel-feedback-list@broadcom.com,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	"Rafał Miłecki" <rafal@milecki.pl>
Subject: [PATCH V2] ARM: dts: BCM5301X: Describe PCIe controllers fully
Date: Thu,  8 Jan 2026 23:40:26 +0100	[thread overview]
Message-ID: <20260108224026.3550-1-zajec5@gmail.com> (raw)

From: Rafał Miłecki <rafal@milecki.pl>

Tested successfully on BCM47094 SoC using Linux's pcie-iproc-platform
driver.

This fixes:
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@12000: 'device_type' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@12000: 'ranges' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@13000: 'device_type' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@13000: 'ranges' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@14000: 'device_type' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@14000: 'ranges' is a required property
        from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Adjust "ranges" in bus node - thank you Rob!!!

 arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
index d0d5f7e52a91..cee08c8a9d72 100644
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -95,7 +95,10 @@ L2: cache-controller@22000 {
 	axi@18000000 {
 		compatible = "brcm,bus-axi";
 		reg = <0x18000000 0x1000>;
-		ranges = <0x00000000 0x18000000 0x00100000>;
+		ranges = <0x00000000 0x18000000 0x00100000>,
+			 <0x08000000 0x08000000 0x08000000>,
+			 <0x20000000 0x20000000 0x08000000>,
+			 <0x28000000 0x28000000 0x08000000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 
@@ -182,22 +185,43 @@ chipcommon: chipcommon@0 {
 		};
 
 		pcie0: pcie@12000 {
+			compatible = "brcm,iproc-pcie";
 			reg = <0x00012000 0x1000>;
+			ranges = <0x82000000 0 0x08000000  0x08000000  0 0x08000000>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			device_type = "pci";
 
+			#interrupt-cells = <1>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 		};
 
 		pcie1: pcie@13000 {
+			compatible = "brcm,iproc-pcie";
 			reg = <0x00013000 0x1000>;
+			ranges = <0x82000000 0 0x20000000  0x20000000  0 0x08000000>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			device_type = "pci";
 
+			#interrupt-cells = <1>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 		};
 
 		pcie2: pcie@14000 {
+			compatible = "brcm,iproc-pcie";
 			reg = <0x00014000 0x1000>;
+			ranges = <0x82000000 0 0x28000000  0x28000000  0 0x08000000>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			device_type = "pci";
 
+			#interrupt-cells = <1>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 		};
-- 
2.51.0



             reply	other threads:[~2026-01-08 22:41 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-08 22:40 Rafał Miłecki [this message]
2026-02-04 18:25 ` [PATCH V2] ARM: dts: BCM5301X: Describe PCIe controllers fully Florian Fainelli

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