* [PATCH v4 0/2] Add OrangePi 6 Plus board
@ 2026-01-10 9:34 Gary Yang
2026-01-10 9:34 ` [PATCH v4 1/2] dt-bindings: arm: cix: add " Gary Yang
2026-01-10 9:34 ` [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support Gary Yang
0 siblings, 2 replies; 6+ messages in thread
From: Gary Yang @ 2026-01-10 9:34 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt
Cc: cix-kernel-upstream, linux-arm-kernel, devicetree, linux-kernel,
Gary Yang
Patch 1: add compatible strings for OrangePi 6 Plus board
Patch 2: add dts file for OrangePi 6 Plus board
OrangePi 6 Plus board is powered by Cix Sky1. You could find brief
introduction for SoC and related boards at:
http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-6-Plus.html
Currently, to run upstream kernel at OrangePi 6 Plus board, you need to
use BIOS released by OrangePi, and add "clk_ignore_unused=1" at bootargs.
http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-6-Plus.html
v4 changes:
-Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=arm/cix.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-xcp.dtb
- Fix the description of board
v3 changes:
-Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=arm/cix.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-xcp.dtb
- Fix the description of board
- Fix the commit message length within 75 words
v2 changes:
-Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=arm/cix.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-xcp.dtb
- Fix the description of board
Gary Yang (2):
dt-bindings: arm: cix: add OrangePi 6 Plus board
arm64: dts: cix: Add OrangePi 6 Plus board support
.../devicetree/bindings/arm/cix.yaml | 6 +-
arch/arm64/boot/dts/cix/Makefile | 1 +
arch/arm64/boot/dts/cix/sky1-xcp.dts | 83 +++++++++++++++++++
3 files changed, 88 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/cix/sky1-xcp.dts
--
2.49.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 1/2] dt-bindings: arm: cix: add OrangePi 6 Plus board
2026-01-10 9:34 [PATCH v4 0/2] Add OrangePi 6 Plus board Gary Yang
@ 2026-01-10 9:34 ` Gary Yang
2026-01-11 10:06 ` Krzysztof Kozlowski
2026-01-12 1:15 ` Peter Chen
2026-01-10 9:34 ` [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support Gary Yang
1 sibling, 2 replies; 6+ messages in thread
From: Gary Yang @ 2026-01-10 9:34 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt
Cc: cix-kernel-upstream, linux-arm-kernel, devicetree, linux-kernel,
Gary Yang
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
---
Documentation/devicetree/bindings/arm/cix.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/cix.yaml b/Documentation/devicetree/bindings/arm/cix.yaml
index 114dab4bc4d2..21e66df7f696 100644
--- a/Documentation/devicetree/bindings/arm/cix.yaml
+++ b/Documentation/devicetree/bindings/arm/cix.yaml
@@ -16,9 +16,11 @@ properties:
compatible:
oneOf:
- - description: Radxa Orion O6
+ - description: Sky1 based boards
items:
- - const: radxa,orion-o6
+ - enum:
+ - radxa,orion-o6 # Radxa Orion O6 board
+ - xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board
- const: cix,sky1
additionalProperties: true
--
2.49.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support
2026-01-10 9:34 [PATCH v4 0/2] Add OrangePi 6 Plus board Gary Yang
2026-01-10 9:34 ` [PATCH v4 1/2] dt-bindings: arm: cix: add " Gary Yang
@ 2026-01-10 9:34 ` Gary Yang
2026-01-12 1:15 ` Peter Chen
1 sibling, 1 reply; 6+ messages in thread
From: Gary Yang @ 2026-01-10 9:34 UTC (permalink / raw)
To: peter.chen, fugang.duan, robh, krzk+dt, conor+dt
Cc: cix-kernel-upstream, linux-arm-kernel, devicetree, linux-kernel,
Gary Yang
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
---
arch/arm64/boot/dts/cix/Makefile | 1 +
arch/arm64/boot/dts/cix/sky1-xcp.dts | 83 ++++++++++++++++++++++++++++
2 files changed, 84 insertions(+)
create mode 100644 arch/arm64/boot/dts/cix/sky1-xcp.dts
diff --git a/arch/arm64/boot/dts/cix/Makefile b/arch/arm64/boot/dts/cix/Makefile
index ed3713982012..8a6c6fdc4ec0 100644
--- a/arch/arm64/boot/dts/cix/Makefile
+++ b/arch/arm64/boot/dts/cix/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_CIX) += sky1-orion-o6.dtb
+dtb-$(CONFIG_ARCH_CIX) += sky1-xcp.dtb
diff --git a/arch/arm64/boot/dts/cix/sky1-xcp.dts b/arch/arm64/boot/dts/cix/sky1-xcp.dts
new file mode 100644
index 000000000000..1fae52dc9bb0
--- /dev/null
+++ b/arch/arm64/boot/dts/cix/sky1-xcp.dts
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright 2025 Cix Technology Group Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sky1.dtsi"
+#include "sky1-pinfunc.h"
+
+/ {
+ model = "Xunlong,OrangePi 6 Plus";
+ compatible = "xunlong,orangepi-6-plus", "cix,sky1";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x28000000>;
+ linux,cma-default;
+ };
+ };
+
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ pinctrl_hog: hog-cfg {
+ pins {
+ pinmux = <CIX_PAD_GPIO144_FUNC_GPIO144>,
+ <CIX_PAD_GPIO145_FUNC_GPIO145>,
+ <CIX_PAD_GPIO146_FUNC_GPIO146>,
+ <CIX_PAD_GPIO147_FUNC_GPIO147>;
+ bias-pull-down;
+ drive-strength = <8>;
+ };
+ };
+};
+
+&iomuxc_s5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_s5>;
+
+ pinctrl_hog_s5: hog-s5-cfg {
+ pins {
+ pinmux = <CIX_PAD_GPIO014_FUNC_GPIO014>;
+ bias-pull-up;
+ drive-strength = <8>;
+
+ };
+ };
+};
+
+&pcie_x8_rc {
+ status = "okay";
+};
+
+&pcie_x2_rc {
+ status = "okay";
+};
+
+&pcie_x1_1_rc {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
--
2.49.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: arm: cix: add OrangePi 6 Plus board
2026-01-10 9:34 ` [PATCH v4 1/2] dt-bindings: arm: cix: add " Gary Yang
@ 2026-01-11 10:06 ` Krzysztof Kozlowski
2026-01-12 1:15 ` Peter Chen
1 sibling, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-11 10:06 UTC (permalink / raw)
To: Gary Yang
Cc: peter.chen, fugang.duan, robh, krzk+dt, conor+dt,
cix-kernel-upstream, linux-arm-kernel, devicetree, linux-kernel
On Sat, Jan 10, 2026 at 05:34:05PM +0800, Gary Yang wrote:
> OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
> processor + NPU processor,integrated graphics processor, equipped with
> 16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
> SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
> and high-capacity storage
>
> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> ---
> Documentation/devicetree/bindings/arm/cix.yaml | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: arm: cix: add OrangePi 6 Plus board
2026-01-10 9:34 ` [PATCH v4 1/2] dt-bindings: arm: cix: add " Gary Yang
2026-01-11 10:06 ` Krzysztof Kozlowski
@ 2026-01-12 1:15 ` Peter Chen
1 sibling, 0 replies; 6+ messages in thread
From: Peter Chen @ 2026-01-12 1:15 UTC (permalink / raw)
To: Gary Yang
Cc: fugang.duan, robh, krzk+dt, conor+dt, cix-kernel-upstream,
linux-arm-kernel, devicetree, linux-kernel
On 26-01-10 17:34:05, Gary Yang wrote:
> OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
> processor + NPU processor,integrated graphics processor, equipped with
> 16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
> SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
> and high-capacity storage
>
> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> ---
> Documentation/devicetree/bindings/arm/cix.yaml | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/cix.yaml b/Documentation/devicetree/bindings/arm/cix.yaml
> index 114dab4bc4d2..21e66df7f696 100644
> --- a/Documentation/devicetree/bindings/arm/cix.yaml
> +++ b/Documentation/devicetree/bindings/arm/cix.yaml
> @@ -16,9 +16,11 @@ properties:
> compatible:
> oneOf:
>
> - - description: Radxa Orion O6
> + - description: Sky1 based boards
> items:
> - - const: radxa,orion-o6
> + - enum:
> + - radxa,orion-o6 # Radxa Orion O6 board
> + - xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board
> - const: cix,sky1
>
> additionalProperties: true
> --
> 2.49.0
>
Applied, Thanks.
--
Best regards,
Peter
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support
2026-01-10 9:34 ` [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support Gary Yang
@ 2026-01-12 1:15 ` Peter Chen
0 siblings, 0 replies; 6+ messages in thread
From: Peter Chen @ 2026-01-12 1:15 UTC (permalink / raw)
To: Gary Yang
Cc: fugang.duan, robh, krzk+dt, conor+dt, cix-kernel-upstream,
linux-arm-kernel, devicetree, linux-kernel
On 26-01-10 17:34:06, Gary Yang wrote:
> OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
> processor + NPU processor,integrated graphics processor, equipped with
> 16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
> SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
> and high-capacity storage
>
> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Applied, Thanks.
Peter
> ---
> arch/arm64/boot/dts/cix/Makefile | 1 +
> arch/arm64/boot/dts/cix/sky1-xcp.dts | 83 ++++++++++++++++++++++++++++
> 2 files changed, 84 insertions(+)
> create mode 100644 arch/arm64/boot/dts/cix/sky1-xcp.dts
>
> diff --git a/arch/arm64/boot/dts/cix/Makefile b/arch/arm64/boot/dts/cix/Makefile
> index ed3713982012..8a6c6fdc4ec0 100644
> --- a/arch/arm64/boot/dts/cix/Makefile
> +++ b/arch/arm64/boot/dts/cix/Makefile
> @@ -1,2 +1,3 @@
> # SPDX-License-Identifier: GPL-2.0
> dtb-$(CONFIG_ARCH_CIX) += sky1-orion-o6.dtb
> +dtb-$(CONFIG_ARCH_CIX) += sky1-xcp.dtb
> diff --git a/arch/arm64/boot/dts/cix/sky1-xcp.dts b/arch/arm64/boot/dts/cix/sky1-xcp.dts
> new file mode 100644
> index 000000000000..1fae52dc9bb0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/cix/sky1-xcp.dts
> @@ -0,0 +1,83 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright 2025 Cix Technology Group Co., Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "sky1.dtsi"
> +#include "sky1-pinfunc.h"
> +
> +/ {
> + model = "Xunlong,OrangePi 6 Plus";
> + compatible = "xunlong,orangepi-6-plus", "cix,sky1";
> +
> + aliases {
> + serial2 = &uart2;
> + };
> +
> + chosen {
> + stdout-path = &uart2;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + linux,cma {
> + compatible = "shared-dma-pool";
> + reusable;
> + size = <0x0 0x28000000>;
> + linux,cma-default;
> + };
> + };
> +
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hog-cfg {
> + pins {
> + pinmux = <CIX_PAD_GPIO144_FUNC_GPIO144>,
> + <CIX_PAD_GPIO145_FUNC_GPIO145>,
> + <CIX_PAD_GPIO146_FUNC_GPIO146>,
> + <CIX_PAD_GPIO147_FUNC_GPIO147>;
> + bias-pull-down;
> + drive-strength = <8>;
> + };
> + };
> +};
> +
> +&iomuxc_s5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog_s5>;
> +
> + pinctrl_hog_s5: hog-s5-cfg {
> + pins {
> + pinmux = <CIX_PAD_GPIO014_FUNC_GPIO014>;
> + bias-pull-up;
> + drive-strength = <8>;
> +
> + };
> + };
> +};
> +
> +&pcie_x8_rc {
> + status = "okay";
> +};
> +
> +&pcie_x2_rc {
> + status = "okay";
> +};
> +
> +&pcie_x1_1_rc {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> --
> 2.49.0
>
--
Best regards,
Peter
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-01-12 1:16 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2026-01-10 9:34 [PATCH v4 0/2] Add OrangePi 6 Plus board Gary Yang
2026-01-10 9:34 ` [PATCH v4 1/2] dt-bindings: arm: cix: add " Gary Yang
2026-01-11 10:06 ` Krzysztof Kozlowski
2026-01-12 1:15 ` Peter Chen
2026-01-10 9:34 ` [PATCH v4 2/2] arm64: dts: cix: Add OrangePi 6 Plus board support Gary Yang
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