[PATCH v3 00/19] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device

[PATCH v3 00/19] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device

[Alexander Dahl]

Hei hei,

on a custom sam9x60 based board we want to access a unique ID of the
SoC.  Microchip sam-ba has a command 'readuniqueid' which returns the
content of the OTPC Product UID x Registers in that case.

(On different boards with a SAMA5D2 sam-ba and we use the Serial Number
x Register for that purpose.  In the linux kernel those are exposed
through nvmem by the atmel soc driver.  Those registers are not present
in the SAM9X60 series, but only for SAMA5D2/SAMA5D4 AFAIK.  Neither of
those uses /sys/devices/socX for exposing the serial number.)

There is a driver for the OTPC of the SAMA7G5 and after comparing
register layouts it seems that one is almost identical to the one used
by SAM9X60.  Currently that driver has no support for the UIDx
registers, but I suppose it would be the right place to implement it,
because the registers are within the OTPC register address offsets.

When developing and testing it became clear the OTPC needs explicit
enabling of certain clocks in the otpc driver.  So the patch series
starts with some rework of clock bindings and clock drivers, along with
referencing that in SoC dtsi files.

The five patches for the otpc driver start with two patches with some
unrelated fixups for that driver. Following are more patches dealing
with sam9x60 support for the driver and the necessary clock enablement.
The last patch for the otpc driver adds an additional nvmem device for
the UIDx registers, fullfilling the initial goal of mine.

Output of sam-ba:

    adahl@ada-pc /opt/sam-ba_v3.9.1 % ./sam-ba -p serial -d sam9x60:0:1 -t 5 -a readuniqueid
    SAM-BA Command Line Interface Tool v3.9.1 (linux - x86_64-little_endian-lp64)
    Copyright 2025 Microchip Technology
    Opening serial port 'ttyACM0' (USB)
    Connection opened.
    Launch readuniqueid
    Executing Applet at @0x300000
    UID[0] = 0x36465356
    UID[1] = 0x10340637
    UID[2] = 0x6036f6f0
    UID[3] = 0x27b483c8
    Execution time: 150 ms
    Connection closed.

New Linux nvmem device content (little-endian):

    root@DistroKit:~ hexdump -C /sys/bus/nvmem/devices/mchp-uid0/nvmem
    00000000  56 53 46 36 37 06 34 10  f0 f6 36 60 c8 83 b4 27  |VSF67.4...6`...'|
    00000010

I tested the series at runtime only on SAM9X60, not on SAMA7G5 or the
other SoCs affected, because I only have sam9x60 hardware for testing.
If someone could test on SAM9X7, SAMA7G5, and SAMA7D65, that would be
highly appreciated.

Series is build time tested for sam9, sama5, and sama7.

Last question: Should the UID be added to the device entropy pool with
add_device_randomness() as done in the SAMA5D2 sfr driver?

For detailed patch changelog see each patch, general changelog below.

Greets
Alex

(series based on v6.19-rc6)

v3:
- Reordered patch series (thanks Claudiu)
- Collected review tags plus minor commit message fixes (e.g. tag order)
- Removed clock-names from dt bindings, led to confusion on review,
  and not used by the driver anyways (always enables all clocks)
- Removed redundant example from dt bindings docs
- Extended the per SoC splitup of the PMC definitions to the whole at91 family
- Add patch for a small after splitup fixup of the sama7d65 clock driver
- Add patch for removing old preprocessor definitions

v2:
- Removed patch adding bad OPTC conditions warnings on probe
- Removed patch adding more register definitions (the one register
  definition required was moved to the last patch adding the nvmem for
  UID registers)
- Added multiple new patches handling the dt-bindings issues
- Extend the possibility to enable the main rc oscillator to all at91
  SoCs with an OTPC
- Added patches to reference and enable the OTPC peripheral clock on all
  capable SoCs
- Reordered patches
- Reworded commit messages
- Squashed patches with dts changes for sam9x60
- Fixed bot warnings
- Link: https://lore.kernel.org/all/20250210164506.495747-1-ada@thorsis.com/T/#u

v1:
- Link: https://lore.kernel.org/all/20240821105943.230281-1-ada@thorsis.com/T/#u

(I sent an RFC patch on this topic earlier in 2024, you'll find the
link below as a reference to the discussion.  The patch itself was
trivial and not meant for applying as is anyways, so I decided to not
write a full changelog from RFC to v1.)

RFC:
- Link: https://lore.kernel.org/all/20240412140802.1571935-1-ada@thorsis.com/T/#u

Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-clk@vger.kernel.org

Alexander Dahl (19):
  MAINTAINERS: Add sam9/sama to (AT91) SoC support
  dt-bindings: clock: at91: Split up per SoC partially
  dt-bindings: clock: at91: Allow referencing main rc oscillator in DT
  clk: at91: Use new PMC bindings
  clk: at91: sama7d65: Use highest PMC definition as max index
  clk: at91: Allow enabling main_rc_osc through DT
  clk: at91: Add peripheral id for OTPC
  dt-bindings: nvmem: microchip-otpc: Add compatible for SAM9X60
  dt-bindings: nvmem: microchip-otpc: Add required clocks
  nvmem: microchip-otpc: Avoid reading a write-only register
  nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters
  nvmem: microchip-otpc: Add SAM9X60 support
  nvmem: microchip-otpc: Enable necessary clocks
  nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device
  ARM: dts: microchip: Use new PMC bindings
  ARM: dts: microchip: sama7g5: Add OTPC clocks
  ARM: dts: microchip: sam9x60: Add OTPC node
  ARM: dts: microchip: sam9x60_curiosity: Enable OTP Controller
  dt-bindings: clock: at91: Remove old PMC definitions

 .../nvmem/microchip,sama7g5-otpc.yaml         | 12 ++++-
 .../reset/atmel,at91sam9260-reset.yaml        |  3 +-
 MAINTAINERS                                   |  1 +
 .../dts/microchip/at91-sam9x60_curiosity.dts  |  4 ++
 arch/arm/boot/dts/microchip/at91rm9200.dtsi   |  3 +-
 arch/arm/boot/dts/microchip/at91sam9260.dtsi  | 19 +++----
 arch/arm/boot/dts/microchip/at91sam9261.dtsi  |  7 +--
 arch/arm/boot/dts/microchip/at91sam9263.dtsi  |  9 ++--
 arch/arm/boot/dts/microchip/at91sam9g45.dtsi  | 11 ++--
 arch/arm/boot/dts/microchip/at91sam9n12.dtsi  |  7 +--
 arch/arm/boot/dts/microchip/at91sam9rl.dtsi   |  9 ++--
 arch/arm/boot/dts/microchip/at91sam9x5.dtsi   | 11 ++--
 arch/arm/boot/dts/microchip/sam9x60.dtsi      | 23 +++++---
 arch/arm/boot/dts/microchip/sam9x7.dtsi       | 13 ++---
 arch/arm/boot/dts/microchip/sama5d2.dtsi      | 25 ++++-----
 arch/arm/boot/dts/microchip/sama5d3.dtsi      |  9 ++--
 arch/arm/boot/dts/microchip/sama5d4.dtsi      |  9 ++--
 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 15 +++---
 arch/arm/boot/dts/microchip/sama7g5.dtsi      | 24 +++++----
 drivers/clk/at91/at91rm9200.c                 | 12 ++---
 drivers/clk/at91/at91sam9260.c                | 14 ++---
 drivers/clk/at91/at91sam9g45.c                | 12 ++---
 drivers/clk/at91/at91sam9n12.c                | 12 ++---
 drivers/clk/at91/at91sam9rl.c                 | 12 ++---
 drivers/clk/at91/at91sam9x5.c                 | 12 ++---
 drivers/clk/at91/sam9x60.c                    | 16 +++---
 drivers/clk/at91/sam9x7.c                     | 24 +++++----
 drivers/clk/at91/sama5d2.c                    | 22 ++++----
 drivers/clk/at91/sama5d3.c                    | 10 ++--
 drivers/clk/at91/sama5d4.c                    | 12 ++---
 drivers/clk/at91/sama7d65.c                   | 44 +++++++--------
 drivers/clk/at91/sama7g5.c                    | 30 ++++++-----
 drivers/nvmem/microchip-otpc.c                | 53 ++++++++++++++++---
 include/dt-bindings/clock/at91.h              | 32 -----------
 .../dt-bindings/clock/atmel,at91rm9200-pmc.h  | 15 ++++++
 .../dt-bindings/clock/atmel,at91sam9260-pmc.h | 16 ++++++
 .../dt-bindings/clock/atmel,at91sam9g45-pmc.h | 15 ++++++
 .../dt-bindings/clock/atmel,at91sam9n12-pmc.h | 15 ++++++
 .../dt-bindings/clock/atmel,at91sam9rl-pmc.h  | 15 ++++++
 .../dt-bindings/clock/atmel,at91sam9x5-pmc.h  | 15 ++++++
 include/dt-bindings/clock/atmel,sama5d2-pmc.h | 20 +++++++
 include/dt-bindings/clock/atmel,sama5d3-pmc.h | 14 +++++
 include/dt-bindings/clock/atmel,sama5d4-pmc.h | 15 ++++++
 .../dt-bindings/clock/microchip,sam9x60-pmc.h | 16 ++++++
 .../dt-bindings/clock/microchip,sam9x7-pmc.h  | 20 +++++++
 .../clock/microchip,sama7d65-pmc.h            | 25 +++++++++
 .../dt-bindings/clock/microchip,sama7g5-pmc.h | 20 +++++++
 47 files changed, 514 insertions(+), 238 deletions(-)
 create mode 100644 include/dt-bindings/clock/atmel,at91rm9200-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9260-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d2-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d3-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d4-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sam9x60-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sam9x7-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7d65-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7g5-pmc.h


base-commit: 24d479d26b25bce5faea3ddd9fa8f3a6c3129ea7
-- 
2.47.3

[PATCH v3 01/19] MAINTAINERS: Add sam9/sama to (AT91) SoC support

[Alexander Dahl]

Will catch previously unmatched files in include/dt-bindings/*

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - new patch, not present in v2

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index da9dbc1a40194..c882399c5e4b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3033,6 +3033,7 @@ F:	include/soc/at91/
 X:	drivers/input/touchscreen/atmel_mxt_ts.c
 N:	at91
 N:	atmel
+N:	sam[9a]
 
 ARM/Microchip Sparx5 SoC support
 M:	Steen Hegelund <Steen.Hegelund@microchip.com>
-- 
2.47.3

[PATCH v3 02/19] dt-bindings: clock: at91: Split up per SoC partially

[Alexander Dahl]

Before adding even more new indexes creating more holes in the
clk at91 drivers pmc_data->chws arrays, split this up.

This is a partial split up only for some of the old PMC definitions.

Binding splitup was proposed for several reasons:

1) keep the driver code simple, readable, and efficient
2) avoid accidental array index duplication
3) avoid memory waste by creating more and more unused array members.

Old values are kept to not break dts, and to maintain dt ABI.

Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - full splitup for all at91 family SoCs instead of just a few
    
    v2:
    - new patch, not present in v1

 .../reset/atmel,at91sam9260-reset.yaml        |  3 ++-
 .../dt-bindings/clock/atmel,at91rm9200-pmc.h  | 15 ++++++++++++
 .../dt-bindings/clock/atmel,at91sam9260-pmc.h | 16 +++++++++++++
 .../dt-bindings/clock/atmel,at91sam9g45-pmc.h | 15 ++++++++++++
 .../dt-bindings/clock/atmel,at91sam9n12-pmc.h | 15 ++++++++++++
 .../dt-bindings/clock/atmel,at91sam9rl-pmc.h  | 15 ++++++++++++
 .../dt-bindings/clock/atmel,at91sam9x5-pmc.h  | 15 ++++++++++++
 include/dt-bindings/clock/atmel,sama5d2-pmc.h | 20 ++++++++++++++++
 include/dt-bindings/clock/atmel,sama5d3-pmc.h | 14 +++++++++++
 include/dt-bindings/clock/atmel,sama5d4-pmc.h | 15 ++++++++++++
 .../dt-bindings/clock/microchip,sam9x60-pmc.h | 15 ++++++++++++
 .../dt-bindings/clock/microchip,sam9x7-pmc.h  | 19 +++++++++++++++
 .../clock/microchip,sama7d65-pmc.h            | 24 +++++++++++++++++++
 .../dt-bindings/clock/microchip,sama7g5-pmc.h | 19 +++++++++++++++
 14 files changed, 219 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/atmel,at91rm9200-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9260-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d2-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d3-pmc.h
 create mode 100644 include/dt-bindings/clock/atmel,sama5d4-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sam9x60-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sam9x7-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7d65-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7g5-pmc.h

diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
index 84c4801df8d9a..8c89ccc3d6393 100644
--- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
@@ -67,9 +67,10 @@ additionalProperties: false
 examples:
   - |
     #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
 
     reset-controller@fffffd00 {
         compatible = "atmel,at91sam9260-rstc";
         reg = <0xfffffd00 0x10>;
-        clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+        clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
     };
diff --git a/include/dt-bindings/clock/atmel,at91rm9200-pmc.h b/include/dt-bindings/clock/atmel,at91rm9200-pmc.h
new file mode 100644
index 0000000000000..ab0d0d7a3b655
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91rm9200-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91rm9200 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91RM9200_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91RM9200_PMC_H
+
+#define AT91RM9200_PMC_MCK	1
+#define AT91RM9200_PMC_MAIN	3
+#define AT91RM9200_PMC_PLLACK	7
+#define AT91RM9200_PMC_PLLBCK	8
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,at91sam9260-pmc.h b/include/dt-bindings/clock/atmel,at91sam9260-pmc.h
new file mode 100644
index 0000000000000..6a5453cf70954
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91sam9260-pmc.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91sam9260 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9260_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9260_PMC_H
+
+#define AT91SAM9260_PMC_SLOW	0
+#define AT91SAM9260_PMC_MCK	1
+#define AT91SAM9260_PMC_MAIN	3
+#define AT91SAM9260_PMC_PLLACK	7
+#define AT91SAM9260_PMC_PLLBCK	8
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h b/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
new file mode 100644
index 0000000000000..63134ecafa50c
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91sam9g45 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9G45_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9G45_PMC_H
+
+#define AT91SAM9G45_PMC_MCK	1
+#define AT91SAM9G45_PMC_UTMI	2
+#define AT91SAM9G45_PMC_MAIN	3
+#define AT91SAM9G45_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h b/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
new file mode 100644
index 0000000000000..e41ad6d68108a
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91sam9n12 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9N12_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9N12_PMC_H
+
+#define AT91SAM9N12_PMC_MCK	1
+#define AT91SAM9N12_PMC_MAIN	3
+#define AT91SAM9N12_PMC_PLLACK	7
+#define AT91SAM9N12_PMC_PLLBCK	8
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h b/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
new file mode 100644
index 0000000000000..4306d457f8d2b
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91sam9rl clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9RL_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9RL_PMC_H
+
+#define AT91SAM9RL_PMC_MCK	1
+#define AT91SAM9RL_PMC_UTMI	2
+#define AT91SAM9RL_PMC_MAIN	3
+#define AT91SAM9RL_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h b/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
new file mode 100644
index 0000000000000..d3e612f063a00
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91sam9x5 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9X5_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9X5_PMC_H
+
+#define AT91SAM9X5_PMC_MCK	1
+#define AT91SAM9X5_PMC_UTMI	2
+#define AT91SAM9X5_PMC_MAIN	3
+#define AT91SAM9X5_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,sama5d2-pmc.h b/include/dt-bindings/clock/atmel,sama5d2-pmc.h
new file mode 100644
index 0000000000000..1690a69087522
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,sama5d2-pmc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sama5d2 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D2_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D2_PMC_H
+
+#define SAMA5D2_PMC_MCK		1
+#define SAMA5D2_PMC_UTMI	2
+#define SAMA5D2_PMC_MAIN	3
+#define SAMA5D2_PMC_MCK2	4
+#define SAMA5D2_PMC_I2S0_MUX	5
+#define SAMA5D2_PMC_I2S1_MUX	6
+#define SAMA5D2_PMC_PLLACK	7
+#define SAMA5D2_PMC_AUDIOPLLCK	9
+#define SAMA5D2_PMC_AUDIOPINCK	10
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,sama5d3-pmc.h b/include/dt-bindings/clock/atmel,sama5d3-pmc.h
new file mode 100644
index 0000000000000..85b772ccd996a
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,sama5d3-pmc.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sama5d3 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D3_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D3_PMC_H
+
+#define SAMA5D3_PMC_MCK		1
+#define SAMA5D3_PMC_UTMI	2
+#define SAMA5D3_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/atmel,sama5d4-pmc.h b/include/dt-bindings/clock/atmel,sama5d4-pmc.h
new file mode 100644
index 0000000000000..15b812e1b9259
--- /dev/null
+++ b/include/dt-bindings/clock/atmel,sama5d4-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sama5d4 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D4_PMC_H
+#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D4_PMC_H
+
+#define SAMA5D4_PMC_MCK		1
+#define SAMA5D4_PMC_UTMI	2
+#define SAMA5D4_PMC_MCK2	4
+#define SAMA5D4_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
new file mode 100644
index 0000000000000..91f8f863ea076
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sam9x60 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X60_PMC_H
+#define _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X60_PMC_H
+
+#define SAM9X60_PMC_MCK		1
+#define SAM9X60_PMC_UTMI	2
+#define SAM9X60_PMC_MAIN	3
+#define SAM9X60_PMC_PLLACK	7
+
+#endif
diff --git a/include/dt-bindings/clock/microchip,sam9x7-pmc.h b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
new file mode 100644
index 0000000000000..e1dd41fe75046
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sam9x7 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X7_PMC_H
+#define _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X7_PMC_H
+
+#define SAM9X7_PMC_MCK		1
+#define SAM9X7_PMC_UTMI		2
+#define SAM9X7_PMC_MAIN		3
+#define SAM9X7_PMC_PLLACK	7
+#define SAM9X7_PMC_AUDIOPMCPLL	9
+#define SAM9X7_PMC_AUDIOIOPLL	10
+#define SAM9X7_PMC_PLLADIV2	14
+#define SAM9X7_PMC_LVDSPLL	15
+
+#endif
diff --git a/include/dt-bindings/clock/microchip,sama7d65-pmc.h b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
new file mode 100644
index 0000000000000..09d152da6db44
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sama7d65 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7D65_PMC_H
+#define _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7D65_PMC_H
+
+#define SAMA7D65_PMC_MCK0		1
+#define SAMA7D65_PMC_UTMI		2
+#define SAMA7D65_PMC_MAIN		3
+#define SAMA7D65_PMC_CPUPLL		4
+#define SAMA7D65_PMC_SYSPLL		5
+#define SAMA7D65_PMC_BAUDPLL		8
+#define SAMA7D65_PMC_AUDIOPMCPLL	9
+#define SAMA7D65_PMC_AUDIOIOPLL		10
+#define SAMA7D65_PMC_ETHPLL		11
+#define SAMA7D65_PMC_MCK1		13
+#define SAMA7D65_PMC_LVDSPLL		15
+#define SAMA7D65_PMC_MCK3		16
+#define SAMA7D65_PMC_MCK5		17
+
+#endif
diff --git a/include/dt-bindings/clock/microchip,sama7g5-pmc.h b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
new file mode 100644
index 0000000000000..0303cae56f849
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * The constants defined in this header are being used in dts and in
+ * at91 sama7g5 clock driver.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7G5_PMC_H
+#define _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7G5_PMC_H
+
+#define SAMA7G5_PMC_MCK0	1
+#define SAMA7G5_PMC_UTMI	2
+#define SAMA7G5_PMC_MAIN	3
+#define SAMA7G5_PMC_CPUPLL	4
+#define SAMA7G5_PMC_SYSPLL	5
+#define SAMA7G5_PMC_AUDIOPMCPLL	9
+#define SAMA7G5_PMC_AUDIOIOPLL	10
+#define SAMA7G5_PMC_MCK1	13
+
+#endif
-- 
2.47.3

[PATCH v3 03/19] dt-bindings: clock: at91: Allow referencing main rc oscillator in DT

[Alexander Dahl]

The main rc oscillator will be needed for the OTPC to work properly.

The new index introduced here was not used on the four affected SoC
clock drivers before, but for sama5d2 only (PMC_I2S1_MUX).

Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - adapt to different base changes, added lines are the same
    
    v2:
    - new patch, not present in v1

 include/dt-bindings/clock/microchip,sam9x60-pmc.h  | 1 +
 include/dt-bindings/clock/microchip,sam9x7-pmc.h   | 1 +
 include/dt-bindings/clock/microchip,sama7d65-pmc.h | 1 +
 include/dt-bindings/clock/microchip,sama7g5-pmc.h  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
index 91f8f863ea076..1f6bb51780d09 100644
--- a/include/dt-bindings/clock/microchip,sam9x60-pmc.h
+++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
@@ -10,6 +10,7 @@
 #define SAM9X60_PMC_MCK		1
 #define SAM9X60_PMC_UTMI	2
 #define SAM9X60_PMC_MAIN	3
+#define SAM9X60_PMC_MAIN_RC	6
 #define SAM9X60_PMC_PLLACK	7
 
 #endif
diff --git a/include/dt-bindings/clock/microchip,sam9x7-pmc.h b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
index e1dd41fe75046..657f32ce10071 100644
--- a/include/dt-bindings/clock/microchip,sam9x7-pmc.h
+++ b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
@@ -10,6 +10,7 @@
 #define SAM9X7_PMC_MCK		1
 #define SAM9X7_PMC_UTMI		2
 #define SAM9X7_PMC_MAIN		3
+#define SAM9X7_PMC_MAIN_RC	6
 #define SAM9X7_PMC_PLLACK	7
 #define SAM9X7_PMC_AUDIOPMCPLL	9
 #define SAM9X7_PMC_AUDIOIOPLL	10
diff --git a/include/dt-bindings/clock/microchip,sama7d65-pmc.h b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
index 09d152da6db44..ddcb236718978 100644
--- a/include/dt-bindings/clock/microchip,sama7d65-pmc.h
+++ b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
@@ -12,6 +12,7 @@
 #define SAMA7D65_PMC_MAIN		3
 #define SAMA7D65_PMC_CPUPLL		4
 #define SAMA7D65_PMC_SYSPLL		5
+#define SAMA7D65_PMC_MAIN_RC		6
 #define SAMA7D65_PMC_BAUDPLL		8
 #define SAMA7D65_PMC_AUDIOPMCPLL	9
 #define SAMA7D65_PMC_AUDIOIOPLL		10
diff --git a/include/dt-bindings/clock/microchip,sama7g5-pmc.h b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
index 0303cae56f849..e891715a35173 100644
--- a/include/dt-bindings/clock/microchip,sama7g5-pmc.h
+++ b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
@@ -12,6 +12,7 @@
 #define SAMA7G5_PMC_MAIN	3
 #define SAMA7G5_PMC_CPUPLL	4
 #define SAMA7G5_PMC_SYSPLL	5
+#define SAMA7G5_PMC_MAIN_RC	6
 #define SAMA7G5_PMC_AUDIOPMCPLL	9
 #define SAMA7G5_PMC_AUDIOIOPLL	10
 #define SAMA7G5_PMC_MCK1	13
-- 
2.47.3

[PATCH v3 04/19] clk: at91: Use new PMC bindings

[Alexander Dahl]

The bindings were split up per SoC before adding new array members for
missing clocks.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - extend to all SoC specific at91 clk drivers
    
    v2:
    - new patch, not present in v1

 drivers/clk/at91/at91rm9200.c  | 12 +++++------
 drivers/clk/at91/at91sam9260.c | 14 ++++++-------
 drivers/clk/at91/at91sam9g45.c | 12 +++++------
 drivers/clk/at91/at91sam9n12.c | 12 +++++------
 drivers/clk/at91/at91sam9rl.c  | 12 +++++------
 drivers/clk/at91/at91sam9x5.c  | 12 +++++------
 drivers/clk/at91/sam9x60.c     | 14 ++++++-------
 drivers/clk/at91/sam9x7.c      | 22 ++++++++++----------
 drivers/clk/at91/sama5d2.c     | 22 ++++++++++----------
 drivers/clk/at91/sama5d3.c     | 10 ++++-----
 drivers/clk/at91/sama5d4.c     | 12 +++++------
 drivers/clk/at91/sama7d65.c    | 38 +++++++++++++++++-----------------
 drivers/clk/at91/sama7g5.c     | 28 ++++++++++++-------------
 13 files changed, 110 insertions(+), 110 deletions(-)

diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index 3f19e737ae4d2..6f5c758ab3ec6 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91rm9200-pmc.h>
 
 #include "pmc.h"
 
@@ -100,7 +100,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	at91rm9200_pmc = pmc_data_allocate(PMC_PLLBCK + 1,
+	at91rm9200_pmc = pmc_data_allocate(AT91RM9200_PMC_PLLBCK + 1,
 					    nck(at91rm9200_systemck),
 					    nck(at91rm9200_periphck), 0, 4);
 	if (!at91rm9200_pmc)
@@ -117,7 +117,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91rm9200_pmc->chws[PMC_MAIN] = hw;
+	at91rm9200_pmc->chws[AT91RM9200_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &at91rm9200_pll_layout,
@@ -125,7 +125,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91rm9200_pmc->chws[PMC_PLLACK] = hw;
+	at91rm9200_pmc->chws[AT91RM9200_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
 				   &at91rm9200_pll_layout,
@@ -133,7 +133,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91rm9200_pmc->chws[PMC_PLLBCK] = hw;
+	at91rm9200_pmc->chws[AT91RM9200_PMC_PLLBCK] = hw;
 
 	parent_names[0] = slowxtal_name;
 	parent_names[1] = "mainck";
@@ -155,7 +155,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91rm9200_pmc->chws[PMC_MCK] = hw;
+	at91rm9200_pmc->chws[AT91RM9200_PMC_MCK] = hw;
 
 	hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", usb_div);
 	if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index 0799a13060ea4..492114c13e40d 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
 
 #include "pmc.h"
 
@@ -354,7 +354,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 	if (IS_ERR(regmap))
 		return;
 
-	at91sam9260_pmc = pmc_data_allocate(PMC_PLLBCK + 1,
+	at91sam9260_pmc = pmc_data_allocate(AT91SAM9260_PMC_PLLBCK + 1,
 					    ndck(data->sck, data->num_sck),
 					    ndck(data->pck, data->num_pck),
 					    0, data->num_progck);
@@ -372,7 +372,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9260_pmc->chws[PMC_MAIN] = hw;
+	at91sam9260_pmc->chws[AT91SAM9260_PMC_MAIN] = hw;
 
 	if (data->has_slck) {
 		hw = clk_hw_register_fixed_rate_with_accuracy(NULL,
@@ -389,7 +389,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 		if (IS_ERR(hw))
 			goto err_free;
 
-		at91sam9260_pmc->chws[PMC_SLOW] = hw;
+		at91sam9260_pmc->chws[AT91SAM9260_PMC_SLOW] = hw;
 		slck_name = "slck";
 	} else {
 		slck_name = slowxtal_name;
@@ -401,7 +401,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9260_pmc->chws[PMC_PLLACK] = hw;
+	at91sam9260_pmc->chws[AT91SAM9260_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
 				   data->pllb_layout,
@@ -409,7 +409,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9260_pmc->chws[PMC_PLLBCK] = hw;
+	at91sam9260_pmc->chws[AT91SAM9260_PMC_PLLBCK] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -432,7 +432,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9260_pmc->chws[PMC_MCK] = hw;
+	at91sam9260_pmc->chws[AT91SAM9260_PMC_MCK] = hw;
 
 	hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", usb_div);
 	if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index f45a7b80f7d8b..f41bbff76a541 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9g45-pmc.h>
 
 #include "pmc.h"
 
@@ -115,7 +115,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	at91sam9g45_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	at91sam9g45_pmc = pmc_data_allocate(AT91SAM9G45_PMC_PLLACK + 1,
 					    nck(at91sam9g45_systemck),
 					    nck(at91sam9g45_periphck), 0, 2);
 	if (!at91sam9g45_pmc)
@@ -132,7 +132,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9g45_pmc->chws[PMC_MAIN] = hw;
+	at91sam9g45_pmc->chws[AT91SAM9G45_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &at91rm9200_pll_layout, &plla_characteristics);
@@ -143,13 +143,13 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9g45_pmc->chws[PMC_PLLACK] = hw;
+	at91sam9g45_pmc->chws[AT91SAM9G45_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9g45_pmc->chws[PMC_UTMI] = hw;
+	at91sam9g45_pmc->chws[AT91SAM9G45_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -172,7 +172,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9g45_pmc->chws[PMC_MCK] = hw;
+	at91sam9g45_pmc->chws[AT91SAM9G45_PMC_MCK] = hw;
 
 	parent_names[0] = "plladivck";
 	parent_names[1] = "utmick";
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index 751786184ae2b..f6210fac26f39 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9n12-pmc.h>
 
 #include "pmc.h"
 
@@ -135,7 +135,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	at91sam9n12_pmc = pmc_data_allocate(PMC_PLLBCK + 1,
+	at91sam9n12_pmc = pmc_data_allocate(AT91SAM9N12_PMC_PLLBCK + 1,
 					   nck(at91sam9n12_systemck), 31, 0, 2);
 	if (!at91sam9n12_pmc)
 		return;
@@ -158,7 +158,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9n12_pmc->chws[PMC_MAIN] = hw;
+	at91sam9n12_pmc->chws[AT91SAM9N12_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &at91rm9200_pll_layout, &plla_characteristics);
@@ -169,14 +169,14 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9n12_pmc->chws[PMC_PLLACK] = hw;
+	at91sam9n12_pmc->chws[AT91SAM9N12_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
 				   &at91rm9200_pll_layout, &pllb_characteristics);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9n12_pmc->chws[PMC_PLLBCK] = hw;
+	at91sam9n12_pmc->chws[AT91SAM9N12_PMC_PLLBCK] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -199,7 +199,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9n12_pmc->chws[PMC_MCK] = hw;
+	at91sam9n12_pmc->chws[AT91SAM9N12_PMC_MCK] = hw;
 
 	hw = at91sam9n12_clk_register_usb(regmap, "usbck", "pllbck");
 	if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c
index 969f809e7d65a..4664e4afc69cf 100644
--- a/drivers/clk/at91/at91sam9rl.c
+++ b/drivers/clk/at91/at91sam9rl.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9rl-pmc.h>
 
 #include "pmc.h"
 
@@ -89,7 +89,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	at91sam9rl_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	at91sam9rl_pmc = pmc_data_allocate(AT91SAM9RL_PMC_PLLACK + 1,
 					   nck(at91sam9rl_systemck),
 					   nck(at91sam9rl_periphck), 0, 2);
 	if (!at91sam9rl_pmc)
@@ -99,7 +99,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9rl_pmc->chws[PMC_MAIN] = hw;
+	at91sam9rl_pmc->chws[AT91SAM9RL_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &at91rm9200_pll_layout,
@@ -107,13 +107,13 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9rl_pmc->chws[PMC_PLLACK] = hw;
+	at91sam9rl_pmc->chws[AT91SAM9RL_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9rl_pmc->chws[PMC_UTMI] = hw;
+	at91sam9rl_pmc->chws[AT91SAM9RL_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -135,7 +135,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9rl_pmc->chws[PMC_MCK] = hw;
+	at91sam9rl_pmc->chws[AT91SAM9RL_PMC_MCK] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 3b801d12fac0d..501315934965e 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9x5-pmc.h>
 
 #include "pmc.h"
 
@@ -157,7 +157,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
 	if (IS_ERR(regmap))
 		return;
 
-	at91sam9x5_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	at91sam9x5_pmc = pmc_data_allocate(AT91SAM9X5_PMC_PLLACK + 1,
 					   nck(at91sam9x5_systemck), 31, 0, 2);
 	if (!at91sam9x5_pmc)
 		return;
@@ -180,7 +180,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9x5_pmc->chws[PMC_MAIN] = hw;
+	at91sam9x5_pmc->chws[AT91SAM9X5_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &at91rm9200_pll_layout, &plla_characteristics);
@@ -191,13 +191,13 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9x5_pmc->chws[PMC_PLLACK] = hw;
+	at91sam9x5_pmc->chws[AT91SAM9X5_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9x5_pmc->chws[PMC_UTMI] = hw;
+	at91sam9x5_pmc->chws[AT91SAM9X5_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -218,7 +218,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
 	if (IS_ERR(hw))
 		goto err_free;
 
-	at91sam9x5_pmc->chws[PMC_MCK] = hw;
+	at91sam9x5_pmc->chws[AT91SAM9X5_PMC_MCK] = hw;
 
 	parent_names[0] = "plladivck";
 	parent_names[1] = "utmick";
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 18baf4a256f47..dbcdb1d2161a9 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x60-pmc.h>
 
 #include "pmc.h"
 
@@ -216,7 +216,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sam9x60_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	sam9x60_pmc = pmc_data_allocate(SAM9X60_PMC_PLLACK + 1,
 					nck(sam9x60_systemck),
 					nck(sam9x60_periphck),
 					nck(sam9x60_gck), 8);
@@ -239,10 +239,10 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x60_pmc->chws[PMC_MAIN] = hw;
+	sam9x60_pmc->chws[SAM9X60_PMC_MAIN] = hw;
 
 	hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "pllack_fracck",
-					   "mainck", sam9x60_pmc->chws[PMC_MAIN],
+					   "mainck", sam9x60_pmc->chws[SAM9X60_PMC_MAIN],
 					   0, &plla_characteristics,
 					   &pll_frac_layout,
 					   /*
@@ -265,7 +265,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x60_pmc->chws[PMC_PLLACK] = hw;
+	sam9x60_pmc->chws[SAM9X60_PMC_PLLACK] = hw;
 
 	hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "upllck_fracck",
 					   "main_osc", main_osc_hw, 1,
@@ -283,7 +283,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x60_pmc->chws[PMC_UTMI] = hw;
+	sam9x60_pmc->chws[SAM9X60_PMC_UTMI] = hw;
 
 	parent_names[0] = md_slck_name;
 	parent_names[1] = "mainck";
@@ -301,7 +301,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x60_pmc->chws[PMC_MCK] = hw;
+	sam9x60_pmc->chws[SAM9X60_PMC_MCK] = hw;
 
 	parent_names[0] = "pllack_divck";
 	parent_names[1] = "upllck_divck";
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 89868a0aeaba9..07eadb712a1e4 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -12,7 +12,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x7-pmc.h>
 
 #include "pmc.h"
 
@@ -225,7 +225,7 @@ static const struct {
 			.t = PLL_TYPE_DIV,
 			/* This feeds CPU. It should not be disabled */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
-			.eid = PMC_PLLACK,
+			.eid = SAM9X7_PMC_PLLACK,
 			.c = &plla_characteristics,
 		},
 	},
@@ -247,7 +247,7 @@ static const struct {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_UTMI,
+			.eid = SAM9X7_PMC_UTMI,
 			.c = &upll_characteristics,
 		},
 	},
@@ -269,7 +269,7 @@ static const struct {
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
 			.c = &audiopll_characteristics,
-			.eid = PMC_AUDIOPMCPLL,
+			.eid = SAM9X7_PMC_AUDIOPMCPLL,
 			.t = PLL_TYPE_DIV,
 		},
 
@@ -280,7 +280,7 @@ static const struct {
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
 			.c = &audiopll_characteristics,
-			.eid = PMC_AUDIOIOPLL,
+			.eid = SAM9X7_PMC_AUDIOIOPLL,
 			.t = PLL_TYPE_DIV,
 		},
 	},
@@ -302,7 +302,7 @@ static const struct {
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
 			.c = &lvdspll_characteristics,
-			.eid = PMC_LVDSPLL,
+			.eid = SAM9X7_PMC_LVDSPLL,
 			.t = PLL_TYPE_DIV,
 		},
 	},
@@ -318,7 +318,7 @@ static const struct {
 			 */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
 			.c = &plladiv2_characteristics,
-			.eid = PMC_PLLADIV2,
+			.eid = SAM9X7_PMC_PLLADIV2,
 			.t = PLL_TYPE_DIV,
 		},
 	},
@@ -747,7 +747,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sam9x7_pmc = pmc_data_allocate(PMC_LVDSPLL + 1,
+	sam9x7_pmc = pmc_data_allocate(SAM9X7_PMC_LVDSPLL + 1,
 				       nck(sam9x7_systemck),
 				       nck(sam9x7_periphck),
 				       nck(sam9x7_gck), 8);
@@ -776,7 +776,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x7_pmc->chws[PMC_MAIN] = hw;
+	sam9x7_pmc->chws[SAM9X7_PMC_MAIN] = hw;
 
 	for (i = 0; i < PLL_ID_MAX; i++) {
 		for (j = 0; j < 3; j++) {
@@ -788,7 +788,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 			switch (sam9x7_plls[i][j].t) {
 			case PLL_TYPE_FRAC:
 				if (!strcmp(sam9x7_plls[i][j].p, "mainck"))
-					parent_hw = sam9x7_pmc->chws[PMC_MAIN];
+					parent_hw = sam9x7_pmc->chws[SAM9X7_PMC_MAIN];
 				else if (!strcmp(sam9x7_plls[i][j].p, "main_osc"))
 					parent_hw = main_osc_hw;
 				else
@@ -844,7 +844,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sam9x7_pmc->chws[PMC_MCK] = hw;
+	sam9x7_pmc->chws[SAM9X7_PMC_MCK] = hw;
 
 	parent_names[0] = "plla_divpmcck";
 	parent_names[1] = "upll_divpmcck";
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index c16594fce90c9..b7f40c9302a21 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d2-pmc.h>
 
 #include "pmc.h"
 
@@ -188,7 +188,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sama5d2_pmc = pmc_data_allocate(PMC_AUDIOPINCK + 1,
+	sama5d2_pmc = pmc_data_allocate(SAMA5D2_PMC_AUDIOPINCK + 1,
 					nck(sama5d2_systemck),
 					nck(sama5d2_periph32ck),
 					nck(sama5d2_gck), 3);
@@ -213,7 +213,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_MAIN] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_MAIN] = hw;
 
 	hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 				   &sama5d3_pll_layout, &plla_characteristics);
@@ -224,7 +224,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_PLLACK] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck",
 					      "mainck");
@@ -236,14 +236,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_AUDIOPINCK] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_AUDIOPINCK] = hw;
 
 	hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck",
 					     "audiopll_fracck");
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_AUDIOPLLCK] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_AUDIOPLLCK] = hw;
 
 	regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
 	if (IS_ERR(regmap_sfr))
@@ -253,7 +253,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_UTMI] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -274,13 +274,13 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_MCK] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_MCK] = hw;
 
 	hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d2_pmc->chws[PMC_MCK2] = hw;
+	sama5d2_pmc->chws[SAMA5D2_PMC_MCK2] = hw;
 
 	parent_names[0] = "plladivck";
 	parent_names[1] = "utmick";
@@ -376,7 +376,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 		if (IS_ERR(hw))
 			goto err_free;
 
-		sama5d2_pmc->chws[PMC_I2S0_MUX] = hw;
+		sama5d2_pmc->chws[SAMA5D2_PMC_I2S0_MUX] = hw;
 
 		parent_names[0] = "i2s1_clk";
 		parent_names[1] = "i2s1_gclk";
@@ -385,7 +385,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
 		if (IS_ERR(hw))
 			goto err_free;
 
-		sama5d2_pmc->chws[PMC_I2S1_MUX] = hw;
+		sama5d2_pmc->chws[SAMA5D2_PMC_I2S1_MUX] = hw;
 	}
 
 	of_clk_add_hw_provider(np, of_clk_hw_pmc_get, sama5d2_pmc);
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 522ce60314464..4b1e160db09af 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d3-pmc.h>
 
 #include "pmc.h"
 
@@ -137,7 +137,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sama5d3_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	sama5d3_pmc = pmc_data_allocate(SAMA5D3_PMC_PLLACK + 1,
 					nck(sama5d3_systemck),
 					nck(sama5d3_periphck), 0, 3);
 	if (!sama5d3_pmc)
@@ -170,13 +170,13 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d3_pmc->chws[PMC_PLLACK] = hw;
+	sama5d3_pmc->chws[SAMA5D3_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d3_pmc->chws[PMC_UTMI] = hw;
+	sama5d3_pmc->chws[SAMA5D3_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -197,7 +197,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d3_pmc->chws[PMC_MCK] = hw;
+	sama5d3_pmc->chws[SAMA5D3_PMC_MCK] = hw;
 
 	parent_names[0] = "plladivck";
 	parent_names[1] = "utmick";
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 160c0bddb6a3b..d164b5dff7185 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -3,7 +3,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d4-pmc.h>
 
 #include "pmc.h"
 
@@ -152,7 +152,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sama5d4_pmc = pmc_data_allocate(PMC_PLLACK + 1,
+	sama5d4_pmc = pmc_data_allocate(SAMA5D4_PMC_PLLACK + 1,
 					nck(sama5d4_systemck),
 					nck(sama5d4_periph32ck), 0, 3);
 	if (!sama5d4_pmc)
@@ -185,13 +185,13 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d4_pmc->chws[PMC_PLLACK] = hw;
+	sama5d4_pmc->chws[SAMA5D4_PMC_PLLACK] = hw;
 
 	hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d4_pmc->chws[PMC_UTMI] = hw;
+	sama5d4_pmc->chws[SAMA5D4_PMC_UTMI] = hw;
 
 	parent_names[0] = slck_name;
 	parent_names[1] = "mainck";
@@ -212,13 +212,13 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d4_pmc->chws[PMC_MCK] = hw;
+	sama5d4_pmc->chws[SAMA5D4_PMC_MCK] = hw;
 
 	hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama5d4_pmc->chws[PMC_MCK2] = hw;
+	sama5d4_pmc->chws[SAMA5D4_PMC_MCK2] = hw;
 
 	parent_names[0] = "plladivck";
 	parent_names[1] = "utmick";
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 7dee2b160ffb3..f6f86261ceefd 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -11,7 +11,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7d65-pmc.h>
 
 #include "pmc.h"
 
@@ -225,7 +225,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			/* This feeds CPU. It should not be disabled. */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
-			.eid = PMC_CPUPLL,
+			.eid = SAMA7D65_PMC_CPUPLL,
 			/*
 			 * Safe div=15 should be safe even for switching b/w 1GHz and
 			 * 90MHz (frac pll might go up to 1.2GHz).
@@ -260,7 +260,7 @@ static struct sama7d65_pll {
 			 * Therefore it should not be disabled.
 			 */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
-			.eid = PMC_SYSPLL,
+			.eid = SAMA7D65_PMC_SYSPLL,
 		},
 	},
 
@@ -328,7 +328,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_BAUDPLL,
+			.eid = SAMA7D65_PMC_BAUDPLL,
 		},
 	},
 
@@ -350,7 +350,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_AUDIOPMCPLL,
+			.eid = SAMA7D65_PMC_AUDIOPMCPLL,
 		},
 
 		[PLL_COMPID_DIV1] = {
@@ -361,7 +361,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_AUDIOIOPLL,
+			.eid = SAMA7D65_PMC_AUDIOIOPLL,
 		},
 	},
 
@@ -383,7 +383,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_ETHPLL,
+			.eid = SAMA7D65_PMC_ETHPLL,
 		},
 	},
 
@@ -405,7 +405,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_LVDSPLL,
+			.eid = SAMA7D65_PMC_LVDSPLL,
 		},
 	},
 
@@ -427,7 +427,7 @@ static struct sama7d65_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_UTMI,
+			.eid = SAMA7D65_PMC_UTMI,
 		},
 	},
 };
@@ -470,7 +470,7 @@ static struct {
 	  .ep_mux_table = { 5, },
 	  .ep_count = 1,
 	  .ep_chg_id = INT_MIN,
-	  .eid = PMC_MCK1,
+	  .eid = SAMA7D65_PMC_MCK1,
 	  .c = 1, },
 
 	{ .n = "mck2",
@@ -487,7 +487,7 @@ static struct {
 	  .ep_mux_table = { 5, 6, },
 	  .ep_count = 2,
 	  .ep_chg_id = INT_MIN,
-	  .eid = PMC_MCK3,
+	  .eid = SAMA7D65_PMC_MCK3,
 	  .c = 1, },
 
 	{ .n = "mck4",
@@ -504,7 +504,7 @@ static struct {
 	  .ep_mux_table = { 5, },
 	  .ep_count = 1,
 	  .ep_chg_id = INT_MIN,
-	  .eid = PMC_MCK5,
+	  .eid = SAMA7D65_PMC_MCK5,
 	  .c = 1, },
 
 	{ .n = "mck6",
@@ -1153,7 +1153,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama7d65_pmc->chws[PMC_MAIN] = hw;
+	sama7d65_pmc->chws[SAMA7D65_PMC_MAIN] = hw;
 
 	for (i = 0; i < PLL_ID_MAX; i++) {
 		for (j = 0; j < PLL_COMPID_MAX; j++) {
@@ -1166,7 +1166,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 			case PLL_TYPE_FRAC:
 				switch (sama7d65_plls[i][j].p) {
 				case SAMA7D65_PLL_PARENT_MAINCK:
-					parent_hw = sama7d65_pmc->chws[PMC_MAIN];
+					parent_hw = sama7d65_pmc->chws[SAMA7D65_PMC_MAIN];
 					break;
 				case SAMA7D65_PLL_PARENT_MAIN_XTAL:
 					parent_hw = main_xtal_hw;
@@ -1215,12 +1215,12 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama7d65_pmc->chws[PMC_MCK] = hw;
+	sama7d65_pmc->chws[SAMA7D65_PMC_MCK0] = hw;
 	sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
+	parent_hws[2] = sama7d65_pmc->chws[SAMA7D65_PMC_MAIN];
 	for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
 		u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
 		struct clk_hw *tmp_parent_hws[8];
@@ -1269,7 +1269,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
+	parent_hws[2] = sama7d65_pmc->chws[SAMA7D65_PMC_MAIN];
 	parent_hws[3] = sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
 	parent_hws[4] = sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
 	parent_hws[5] = sama7d65_plls[PLL_ID_GPU][PLL_COMPID_DIV0].hw;
@@ -1320,8 +1320,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
-	parent_hws[3] = sama7d65_pmc->chws[PMC_MCK1];
+	parent_hws[2] = sama7d65_pmc->chws[SAMA7D65_PMC_MAIN];
+	parent_hws[3] = sama7d65_pmc->chws[SAMA7D65_PMC_MCK1];
 	for (i = 0; i < ARRAY_SIZE(sama7d65_gck); i++) {
 		u8 num_parents = 4 + sama7d65_gck[i].pp_count;
 		struct clk_hw *tmp_parent_hws[8];
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 1340c2b006192..99b4c1d9bdcca 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -12,7 +12,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/slab.h>
 
-#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7g5-pmc.h>
 
 #include "pmc.h"
 
@@ -183,7 +183,7 @@ static struct sama7g5_pll {
 			.t = PLL_TYPE_DIV,
 			/* This feeds CPU. It should not be disabled. */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
-			.eid = PMC_CPUPLL,
+			.eid = SAMA7G5_PMC_CPUPLL,
 			/*
 			 * Safe div=15 should be safe even for switching b/w 1GHz and
 			 * 90MHz (frac pll might go up to 1.2GHz).
@@ -218,7 +218,7 @@ static struct sama7g5_pll {
 			 * Therefore it should not be disabled.
 			 */
 			.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
-			.eid = PMC_SYSPLL,
+			.eid = SAMA7G5_PMC_SYSPLL,
 		},
 	},
 
@@ -306,7 +306,7 @@ static struct sama7g5_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_AUDIOPMCPLL,
+			.eid = SAMA7G5_PMC_AUDIOPMCPLL,
 		},
 
 		[PLL_COMPID_DIV1] = {
@@ -317,7 +317,7 @@ static struct sama7g5_pll {
 			.t = PLL_TYPE_DIV,
 			.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 			     CLK_SET_RATE_PARENT,
-			.eid = PMC_AUDIOIOPLL,
+			.eid = SAMA7G5_PMC_AUDIOIOPLL,
 		},
 	},
 
@@ -381,7 +381,7 @@ static struct {
 	  .ep_mux_table = { 5, },
 	  .ep_count = 1,
 	  .ep_chg_id = INT_MIN,
-	  .eid = PMC_MCK1,
+	  .eid = SAMA7G5_PMC_MCK1,
 	  .c = 1, },
 
 	{ .n = "mck2",
@@ -997,7 +997,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sama7g5_pmc = pmc_data_allocate(PMC_MCK1 + 1,
+	sama7g5_pmc = pmc_data_allocate(SAMA7G5_PMC_MCK1 + 1,
 					nck(sama7g5_systemck),
 					nck(sama7g5_periphck),
 					nck(sama7g5_gck), 8);
@@ -1030,7 +1030,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama7g5_pmc->chws[PMC_MAIN] = hw;
+	sama7g5_pmc->chws[SAMA7G5_PMC_MAIN] = hw;
 
 	for (i = 0; i < PLL_ID_MAX; i++) {
 		for (j = 0; j < PLL_COMPID_MAX; j++) {
@@ -1043,7 +1043,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 			case PLL_TYPE_FRAC:
 				switch (sama7g5_plls[i][j].p) {
 				case SAMA7G5_PLL_PARENT_MAINCK:
-					parent_hw = sama7g5_pmc->chws[PMC_MAIN];
+					parent_hw = sama7g5_pmc->chws[SAMA7G5_PMC_MAIN];
 					break;
 				case SAMA7G5_PLL_PARENT_MAIN_XTAL:
 					parent_hw = main_xtal_hw;
@@ -1092,11 +1092,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw;
+	sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[SAMA7G5_PMC_MCK0] = hw;
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+	parent_hws[2] = sama7g5_pmc->chws[SAMA7G5_PMC_MAIN];
 	for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) {
 		u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
 		struct clk_hw *tmp_parent_hws[8];
@@ -1138,11 +1138,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	sama7g5_pmc->chws[PMC_UTMI] = hw;
+	sama7g5_pmc->chws[SAMA7G5_PMC_UTMI] = hw;
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+	parent_hws[2] = sama7g5_pmc->chws[SAMA7G5_PMC_MAIN];
 	parent_hws[3] = sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
 	parent_hws[4] = sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
 	parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw;
@@ -1192,7 +1192,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 
 	parent_hws[0] = md_slck_hw;
 	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+	parent_hws[2] = sama7g5_pmc->chws[SAMA7G5_PMC_MAIN];
 	for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
 		u8 num_parents = 3 + sama7g5_gck[i].pp_count;
 		struct clk_hw *tmp_parent_hws[8];
-- 
2.47.3

[PATCH v3 05/19] clk: at91: sama7d65: Use highest PMC definition as max index

[Alexander Dahl]

Consistent with all the other at91 clock drivers now, which also use the
highest PMC definition as max value, and no extra number.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - new patch, not present in v2

 drivers/clk/at91/sama7d65.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index f6f86261ceefd..4ccffa8db43a5 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -19,8 +19,6 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
 static DEFINE_SPINLOCK(pmc_mck0_lock);
 static DEFINE_SPINLOCK(pmc_mckX_lock);
 
-#define PMC_INDEX_MAX	25
-
 /*
  * PLL clocks identifiers
  * @PLL_ID_CPU:		CPU PLL identifier
@@ -1120,7 +1118,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	sama7d65_pmc = pmc_data_allocate(PMC_INDEX_MAX,
+	sama7d65_pmc = pmc_data_allocate(SAMA7D65_PMC_MCK5 + 1,
 					 nck(sama7d65_systemck),
 					 nck(sama7d65_periphck),
 					 nck(sama7d65_gck), 8);
-- 
2.47.3

[PATCH v3 06/19] clk: at91: Allow enabling main_rc_osc through DT

[Alexander Dahl]

SAM9X60 Datasheet (DS60001579G) Section "23.4 Product Dependencies"
says:

    "The OTPC is clocked through the Power Management Controller (PMC).
    The user must power on the main RC oscillator and enable the
    peripheral clock of the OTPC prior to reading or writing the OTP
    memory."

The code for enabling/disabling that clock is already present, it was
just not possible to hook into DT anymore, after at91 clk devicetree
binding rework back in 2018 for kernel v4.19.

Do it for all controllers with an OTPC controller, where the main rc
oscillator is required for proper operation.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - no changes
    
    v2:
    - split out dt-bindings changes into separate patch
    - extend to drivers for other SoCs providing the OTPC

 drivers/clk/at91/sam9x60.c  | 1 +
 drivers/clk/at91/sam9x7.c   | 1 +
 drivers/clk/at91/sama7d65.c | 1 +
 drivers/clk/at91/sama7g5.c  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index dbcdb1d2161a9..a9f293a8e3b26 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -227,6 +227,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 					   50000000);
 	if (IS_ERR(hw))
 		goto err_free;
+	sam9x60_pmc->chws[SAM9X60_PMC_MAIN_RC] = hw;
 
 	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
 	if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 07eadb712a1e4..9a5afd258cb86 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -764,6 +764,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 					   50000000);
 	if (IS_ERR(hw))
 		goto err_free;
+	sam9x7_pmc->chws[SAM9X7_PMC_MAIN_RC] = hw;
 
 	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
 	if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 4ccffa8db43a5..5d8973aa50a53 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1135,6 +1135,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 						   50000000);
 	if (IS_ERR(main_rc_hw))
 		goto err_free;
+	sama7d65_pmc->chws[SAMA7D65_PMC_MAIN_RC] = hw;
 
 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
 
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 99b4c1d9bdcca..9a6f0f30b2b7e 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1014,6 +1014,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 						   50000000);
 	if (IS_ERR(main_rc_hw))
 		goto err_free;
+	sama7g5_pmc->chws[SAMA7G5_PMC_MAIN_RC] = hw;
 
 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
 
-- 
2.47.3

[PATCH v3 07/19] clk: at91: Add peripheral id for OTPC

[Alexander Dahl]

That peripheral clock is required for proper OTPC function.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - no changes
    
    v2:
    - new patch in series, was not present in v1

 drivers/clk/at91/sam9x60.c  | 1 +
 drivers/clk/at91/sam9x7.c   | 1 +
 drivers/clk/at91/sama7d65.c | 1 +
 drivers/clk/at91/sama7g5.c  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index a9f293a8e3b26..11f16126ff9e9 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -146,6 +146,7 @@ static const struct {
 	{ .n = "isi_clk",    .id = 43, },
 	{ .n = "pioD_clk",   .id = 44, },
 	{ .n = "tcb1_clk",   .id = 45, },
+	{ .n = "otpc_clk",   .id = 46, },
 	{ .n = "dbgu_clk",   .id = 47, },
 	/*
 	 * mpddr_clk feeds DDR controller and is enabled by bootloader thus we
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 9a5afd258cb86..c4d2b022d9d07 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -407,6 +407,7 @@ static const struct {
 	{ .n = "isi_clk",	.id = 43, },
 	{ .n = "pioD_clk",	.id = 44, },
 	{ .n = "tcb1_clk",	.id = 45, },
+	{ .n = "otpc_clk",	.id = 46, },
 	{ .n = "dbgu_clk",	.id = 47, },
 	{ .n = "pmecc_clk",	.id = 48, },
 	/*
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 5d8973aa50a53..52467d629258f 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -641,6 +641,7 @@ static struct {
 	{ .n = "mcan2_clk",	.p = PCK_PARENT_HW_MCK5, .id = 60, .r = { .max = 200000000, }, },
 	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK5, .id = 61, .r = { .max = 200000000, }, },
 	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK5, .id = 62, .r = { .max = 200000000, }, },
+	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 63, },
 	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK9, .id = 64, .r = { .max = 200000000, }, },
 	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK9, .id = 65, .r = { .max = 200000000, }, },
 	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK7, .id = 66, },
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 9a6f0f30b2b7e..3e0cfd2613851 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -504,6 +504,7 @@ static struct {
 	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK1, .id = 64, .r = { .max = 200000000, }, },
 	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK1, .id = 65, .r = { .max = 200000000, }, },
 	{ .n = "mcan5_clk",	.p = PCK_PARENT_HW_MCK1, .id = 66, .r = { .max = 200000000, }, },
+	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 67, },
 	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 68, .r = { .max = 200000000, }, },
 	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK1, .id = 69, .r = { .max = 200000000, }, },
 	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 70, },
-- 
2.47.3

[PATCH v3 07/19] clk: at91: Add peripheral id for OTPC

[Alexander Dahl]

That peripheral clock is required for proper OTPC function.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - no changes
    
    v2:
    - new patch in series, was not present in v1

 drivers/clk/at91/sam9x60.c  | 1 +
 drivers/clk/at91/sam9x7.c   | 1 +
 drivers/clk/at91/sama7d65.c | 1 +
 drivers/clk/at91/sama7g5.c  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index a9f293a8e3b26..11f16126ff9e9 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -146,6 +146,7 @@ static const struct {
 	{ .n = "isi_clk",    .id = 43, },
 	{ .n = "pioD_clk",   .id = 44, },
 	{ .n = "tcb1_clk",   .id = 45, },
+	{ .n = "otpc_clk",   .id = 46, },
 	{ .n = "dbgu_clk",   .id = 47, },
 	/*
 	 * mpddr_clk feeds DDR controller and is enabled by bootloader thus we
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 9a5afd258cb86..c4d2b022d9d07 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -407,6 +407,7 @@ static const struct {
 	{ .n = "isi_clk",	.id = 43, },
 	{ .n = "pioD_clk",	.id = 44, },
 	{ .n = "tcb1_clk",	.id = 45, },
+	{ .n = "otpc_clk",	.id = 46, },
 	{ .n = "dbgu_clk",	.id = 47, },
 	{ .n = "pmecc_clk",	.id = 48, },
 	/*
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 5d8973aa50a53..52467d629258f 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -641,6 +641,7 @@ static struct {
 	{ .n = "mcan2_clk",	.p = PCK_PARENT_HW_MCK5, .id = 60, .r = { .max = 200000000, }, },
 	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK5, .id = 61, .r = { .max = 200000000, }, },
 	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK5, .id = 62, .r = { .max = 200000000, }, },
+	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 63, },
 	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK9, .id = 64, .r = { .max = 200000000, }, },
 	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK9, .id = 65, .r = { .max = 200000000, }, },
 	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK7, .id = 66, },
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 9a6f0f30b2b7e..3e0cfd2613851 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -504,6 +504,7 @@ static struct {
 	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK1, .id = 64, .r = { .max = 200000000, }, },
 	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK1, .id = 65, .r = { .max = 200000000, }, },
 	{ .n = "mcan5_clk",	.p = PCK_PARENT_HW_MCK1, .id = 66, .r = { .max = 200000000, }, },
+	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 67, },
 	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 68, .r = { .max = 200000000, }, },
 	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK1, .id = 69, .r = { .max = 200000000, }, },
 	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 70, },
-- 
2.47.3

[PATCH v3 08/19] dt-bindings: nvmem: microchip-otpc: Add compatible for SAM9X60

[Alexander Dahl]

The SAM9X60 SoC family has a similar, but slightly different OTPC to the
SAMA7G5 family.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---

Notes:
    v3:
    - Added Acked-by trailer
    
    v2:
    - Fix dt_binding_check warnings

 .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml     | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
index cc25f2927682e..9a7aaf64eef32 100644
--- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
+++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
@@ -21,7 +21,9 @@ allOf:
 properties:
   compatible:
     items:
-      - const: microchip,sama7g5-otpc
+      - enum:
+          - microchip,sam9x60-otpc
+          - microchip,sama7g5-otpc
       - const: syscon
 
   reg:
-- 
2.47.3

[PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Alexander Dahl]

The OTPC requires both the peripheral clock through PMC and the main RC
oscillator.  Seemed to work without explicitly enabling those clocks on
sama7g5 before, but did not on sam9x60.

Older datasheets were not clear and explicit about this, but recent are,
e.g. SAMA7G5 series datasheet (DS60001765B),
section 30.4.1 Power Management:

> The OTPC is clocked through the Power Management Controller (PMC).
> The user must power on the main RC oscillator and enable the
> peripheral clock of the OTPC prior to reading or writing the OTP
> memory.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Removed clock-names (led to confusion, and not used by the driver anyways)
    - Removed redundant example
    
    v2:
    - new patch, not present in v1

 .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
index 9a7aaf64eef32..847dfb67c6b72 100644
--- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
+++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
@@ -29,6 +29,11 @@ properties:
   reg:
     maxItems: 1
 
+  clocks:
+    items:
+      - description: main rc oscillator
+      - description: otpc peripheral clock
+
 required:
   - compatible
   - reg
@@ -37,6 +42,8 @@ unevaluatedProperties: false
 
 examples:
   - |
+    #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
     #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
 
     otpc: efuse@e8c00000 {
@@ -44,6 +51,7 @@ examples:
         reg = <0xe8c00000 0xec>;
         #address-cells = <1>;
         #size-cells = <1>;
+        clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
 
         temperature_calib: calib@1 {
             reg = <OTP_PKT(1) 76>;
-- 
2.47.3

[PATCH v3 10/19] nvmem: microchip-otpc: Avoid reading a write-only register

[Alexander Dahl]

The OTPC Control Register (OTPC_CR) has just write-only members.
Reading from that register leads to a warning in OTPC Write Protection
Status Register (OTPC_WPSR) in field Software Error Type (SWETYP) of
type READ_WO (A write-only register has been read (warning).)

Just create the register write content from scratch is sufficient here.

Fixes: 98830350d3fc ("nvmem: microchip-otpc: add support")
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Reorder tags
    - Add stable tag
    
    v2:
    - Add Fixes tag
    - Remove temporary variable usage
    - Reword misleading subject (s/writing/reading/)

 drivers/nvmem/microchip-otpc.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index df979e8549fdb..e2851c63cc0b4 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -82,9 +82,7 @@ static int mchp_otpc_prepare_read(struct mchp_otpc *otpc,
 	writel_relaxed(tmp, otpc->base + MCHP_OTPC_MR);
 
 	/* Set read. */
-	tmp = readl_relaxed(otpc->base + MCHP_OTPC_CR);
-	tmp |= MCHP_OTPC_CR_READ;
-	writel_relaxed(tmp, otpc->base + MCHP_OTPC_CR);
+	writel_relaxed(MCHP_OTPC_CR_READ, otpc->base + MCHP_OTPC_CR);
 
 	/* Wait for packet to be transferred into temporary buffers. */
 	return read_poll_timeout(readl_relaxed, tmp, !(tmp & MCHP_OTPC_SR_READ),
-- 
2.47.3

[PATCH v3 11/19] nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters

[Alexander Dahl]

Makes no sense to have a timeout shorter than the sleep time, it would
run into timeout right after the first sleep already.
While at it, use a more specific macro instead of the generic one, which
does exactly the same, but needs less parameters.

Fixes: 98830350d3fc ("nvmem: microchip-otpc: add support")
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Reorder tags
    - Add stable tag
    
    v2:
    - Add Fixes tag

 drivers/nvmem/microchip-otpc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index e2851c63cc0b4..bf7e5167152cb 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -85,8 +85,8 @@ static int mchp_otpc_prepare_read(struct mchp_otpc *otpc,
 	writel_relaxed(MCHP_OTPC_CR_READ, otpc->base + MCHP_OTPC_CR);
 
 	/* Wait for packet to be transferred into temporary buffers. */
-	return read_poll_timeout(readl_relaxed, tmp, !(tmp & MCHP_OTPC_SR_READ),
-				 10000, 2000, false, otpc->base + MCHP_OTPC_SR);
+	return readl_relaxed_poll_timeout(otpc->base + MCHP_OTPC_SR, tmp,
+					  !(tmp & MCHP_OTPC_SR_READ), 2000, 10000);
 }
 
 /*
-- 
2.47.3

[PATCH v3 12/19] nvmem: microchip-otpc: Add SAM9X60 support

[Alexander Dahl]

Register layout is almost identical to SAMA7G5 OTPC.  SAMA7G5 has some
additional bits in common registers, and some additional registers all
related to custom packages in secure world.  None of these are currently
used by the driver.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - no changes
    
    v2:
    - Reword commit message (additional information about SoC differences)

 drivers/nvmem/microchip-otpc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index bf7e5167152cb..d39f2d57e5f5e 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -269,6 +269,7 @@ static int mchp_otpc_probe(struct platform_device *pdev)
 
 static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
 	{ .compatible = "microchip,sama7g5-otpc", },
+	{ .compatible = "microchip,sam9x60-otpc", },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, mchp_otpc_ids);
-- 
2.47.3

[PATCH v3 13/19] nvmem: microchip-otpc: Enable necessary clocks

[Alexander Dahl]

Without enabling the main rc clock, initializing the packet list leads
to a read timeout on the first packet, at least on sam9x60.

According to SAM9X60 datasheet (DS60001579G) section "23.4 Product
Dependencies" the clock must be enabled for reading and writing.

Tested on sam9x60-curiosity board.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Rewrap lines
    
    v2:
    - Rewrite to enable _all_ clocks defined in dts

 drivers/nvmem/microchip-otpc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index d39f2d57e5f5e..34c0d7611f3e4 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/bitfield.h>
+#include <linux/clk.h>
 #include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/nvmem-provider.h>
@@ -241,6 +242,7 @@ static struct nvmem_config mchp_nvmem_config = {
 static int mchp_otpc_probe(struct platform_device *pdev)
 {
 	struct nvmem_device *nvmem;
+	struct clk_bulk_data *clks;
 	struct mchp_otpc *otpc;
 	u32 size;
 	int ret;
@@ -253,6 +255,10 @@ static int mchp_otpc_probe(struct platform_device *pdev)
 	if (IS_ERR(otpc->base))
 		return PTR_ERR(otpc->base);
 
+	ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks);
+	if (ret < 0)
+		return dev_err_probe(&pdev->dev, ret, "Error getting clocks!\n");
+
 	otpc->dev = &pdev->dev;
 	ret = mchp_otpc_init_packets_list(otpc, &size);
 	if (ret)
-- 
2.47.3

[PATCH v3 14/19] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device

[Alexander Dahl]

For SAM9X60 the Product UID x Register containing the Unique Product ID
is part of the OTPC registers.  We have everything at hand here to just
create a trivial nvmem device for those.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - no changes
    
    v2:
    - Use dev_err_probe() for error reporting (thanks Claudiu)
    - Move required register definition over here from removed patch

 drivers/nvmem/microchip-otpc.c | 38 +++++++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index 34c0d7611f3e4..b35ed13b004bb 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -25,10 +25,14 @@
 #define MCHP_OTPC_HR			(0x20)
 #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
 #define MCHP_OTPC_DR			(0x24)
+#define MCHP_OTPC_UID0R			(0x60)
 
 #define MCHP_OTPC_NAME			"mchp-otpc"
 #define MCHP_OTPC_SIZE			(11 * 1024)
 
+#define MCHP_OTPC_UID_NAME		"mchp-uid"
+#define MCHP_OTPC_UID_SIZE		16
+
 /**
  * struct mchp_otpc - OTPC private data structure
  * @base: base address
@@ -230,6 +234,16 @@ static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
 	return 0;
 }
 
+static int mchp_otpc_uid_read(void *priv, unsigned int offset,
+			      void *val, size_t bytes)
+{
+	struct mchp_otpc *otpc = priv;
+
+	memcpy_fromio(val, otpc->base + MCHP_OTPC_UID0R + offset, bytes);
+
+	return 0;
+}
+
 static struct nvmem_config mchp_nvmem_config = {
 	.name = MCHP_OTPC_NAME,
 	.type = NVMEM_TYPE_OTP,
@@ -239,6 +253,15 @@ static struct nvmem_config mchp_nvmem_config = {
 	.reg_read = mchp_otpc_read,
 };
 
+static struct nvmem_config mchp_otpc_uid_nvmem_config = {
+	.name = MCHP_OTPC_UID_NAME,
+	.read_only = true,
+	.word_size = 4,
+	.stride = 4,
+	.size = MCHP_OTPC_UID_SIZE,
+	.reg_read = mchp_otpc_uid_read,
+};
+
 static int mchp_otpc_probe(struct platform_device *pdev)
 {
 	struct nvmem_device *nvmem;
@@ -269,8 +292,21 @@ static int mchp_otpc_probe(struct platform_device *pdev)
 	mchp_nvmem_config.size = size;
 	mchp_nvmem_config.priv = otpc;
 	nvmem = devm_nvmem_register(&pdev->dev, &mchp_nvmem_config);
+	if (IS_ERR(nvmem)) {
+		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
+				     "Error registering OTP as nvmem device\n");
+	}
 
-	return PTR_ERR_OR_ZERO(nvmem);
+	mchp_otpc_uid_nvmem_config.dev = otpc->dev;
+	mchp_otpc_uid_nvmem_config.priv = otpc;
+
+	nvmem = devm_nvmem_register(&pdev->dev, &mchp_otpc_uid_nvmem_config);
+	if (IS_ERR(nvmem)) {
+		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
+				     "Error registering UIDxR as nvmem device\n");
+	}
+
+	return 0;
 }
 
 static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
-- 
2.47.3

[PATCH v3 15/19] ARM: dts: microchip: Use new PMC bindings

[Alexander Dahl]

The bindings were split up per SoC before adding new members for
missing clocks.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - extend to all at91 family SoCs
    
    v2:
    - new patch, not present in v1

 arch/arm/boot/dts/microchip/at91rm9200.dtsi  |  3 ++-
 arch/arm/boot/dts/microchip/at91sam9260.dtsi | 19 ++++++++-------
 arch/arm/boot/dts/microchip/at91sam9261.dtsi |  7 +++---
 arch/arm/boot/dts/microchip/at91sam9263.dtsi |  9 +++----
 arch/arm/boot/dts/microchip/at91sam9g45.dtsi | 11 +++++----
 arch/arm/boot/dts/microchip/at91sam9n12.dtsi |  7 +++---
 arch/arm/boot/dts/microchip/at91sam9rl.dtsi  |  9 +++----
 arch/arm/boot/dts/microchip/at91sam9x5.dtsi  | 11 +++++----
 arch/arm/boot/dts/microchip/sam9x60.dtsi     | 15 ++++++------
 arch/arm/boot/dts/microchip/sam9x7.dtsi      | 13 +++++-----
 arch/arm/boot/dts/microchip/sama5d2.dtsi     | 25 ++++++++++----------
 arch/arm/boot/dts/microchip/sama5d3.dtsi     |  9 +++----
 arch/arm/boot/dts/microchip/sama5d4.dtsi     |  9 +++----
 arch/arm/boot/dts/microchip/sama7d65.dtsi    | 15 ++++++------
 arch/arm/boot/dts/microchip/sama7g5.dtsi     | 23 +++++++++---------
 15 files changed, 100 insertions(+), 85 deletions(-)

diff --git a/arch/arm/boot/dts/microchip/at91rm9200.dtsi b/arch/arm/boot/dts/microchip/at91rm9200.dtsi
index e105ad855ce8b..f158c1d70ac2d 100644
--- a/arch/arm/boot/dts/microchip/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/microchip/at91rm9200.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91rm9200-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -601,7 +602,7 @@ dbgu: serial@fffff200 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91RM9200_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
diff --git a/arch/arm/boot/dts/microchip/at91sam9260.dtsi b/arch/arm/boot/dts/microchip/at91sam9260.dtsi
index fc0b6a73204f8..76184155e6746 100644
--- a/arch/arm/boot/dts/microchip/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9260.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -127,20 +128,20 @@ pmc: clock-controller@fffffc00 {
 			reset-controller@fffffd00 {
 				compatible = "atmel,at91sam9260-rstc";
 				reg = <0xfffffd00 0x10>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 			};
 
 			shdwc: poweroff@fffffd10 {
 				compatible = "atmel,at91sam9260-shdwc";
 				reg = <0xfffffd10 0x10>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 			};
 
 			pit: timer@fffffd30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffd30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			};
 
 			tcb0: timer@fffa0000 {
@@ -151,7 +152,7 @@ tcb0: timer@fffa0000 {
 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
 					     <18 IRQ_TYPE_LEVEL_HIGH 0>,
 					     <19 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 			};
 
@@ -163,7 +164,7 @@ tcb1: timer@fffdc000 {
 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>,
 					     <27 IRQ_TYPE_LEVEL_HIGH 0>,
 					     <28 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 			};
 
@@ -537,7 +538,7 @@ dbgu: serial@fffff200 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -720,7 +721,7 @@ rtc@fffffd20 {
 				compatible = "atmel,at91sam9260-rtt";
 				reg = <0xfffffd20 0x10>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 				status = "disabled";
 			};
 
@@ -728,7 +729,7 @@ watchdog: watchdog@fffffd40 {
 				compatible = "atmel,at91sam9260-wdt";
 				reg = <0xfffffd40 0x10>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
 				atmel,watchdog-type = "hardware";
 				atmel,reset-type = "all";
 				atmel,dbg-halt;
@@ -766,7 +767,7 @@ ebi: ebi@10000000 {
 				  0x5 0x0 0x60000000 0x10000000
 				  0x6 0x0 0x70000000 0x10000000
 				  0x7 0x0 0x80000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/at91sam9261.dtsi b/arch/arm/boot/dts/microchip/at91sam9261.dtsi
index d1d678b77e84b..57643738b7c9a 100644
--- a/arch/arm/boot/dts/microchip/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9261.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -112,7 +113,7 @@ ebi: ebi@10000000 {
 				  0x5 0x0 0x60000000 0x10000000
 				  0x6 0x0 0x70000000 0x10000000
 				  0x7 0x0 0x80000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -309,7 +310,7 @@ dbgu: serial@fffff200 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -624,7 +625,7 @@ pit: timer@fffffd30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffd30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			};
 
 			rtc@fffffd20 {
diff --git a/arch/arm/boot/dts/microchip/at91sam9263.dtsi b/arch/arm/boot/dts/microchip/at91sam9263.dtsi
index a4b5d1f228f9c..48feaa2415bb6 100644
--- a/arch/arm/boot/dts/microchip/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9263.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -139,7 +140,7 @@ pit: timer@fffffd30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffd30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			};
 
 			tcb0: timer@fff7c000 {
@@ -545,7 +546,7 @@ dbgu: serial@ffffee00 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -790,7 +791,7 @@ ebi0: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller0: nand-controller {
@@ -811,7 +812,7 @@ ebi1: ebi@70000000 {
 			reg = <0x80000000 0x20000000>;
 			ranges = <0x0 0x0 0x80000000 0x10000000
 				  0x1 0x0 0x90000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller1: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
index 4e00ed2d3ecdf..73c188ca97f4a 100644
--- a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9g45-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -148,7 +149,7 @@ pit: timer@fffffd30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffd30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9G45_PMC_MCK>;
 			};
 
 
@@ -681,7 +682,7 @@ dbgu: serial@ffffee00 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9G45_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -918,7 +919,7 @@ usb2: gadget@fff78000 {
 				reg = <0x00600000 0x80000
 				       0xfff78000 0x400>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE AT91SAM9G45_PMC_UTMI>;
 				clock-names = "pclk", "hclk";
 				status = "disabled";
 			};
@@ -977,7 +978,7 @@ usb1: usb@800000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00800000 0x100000>;
 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9G45_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
 			clock-names = "usb_clk", "ehci_clk";
 			status = "disabled";
 		};
@@ -995,7 +996,7 @@ ebi: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9G45_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
index af41c3dbb4bfb..ee7027387292f 100644
--- a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9n12-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -137,7 +138,7 @@ pit: timer@fffffe30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9N12_PMC_MCK>;
 			};
 
 			poweroff@fffffe10 {
@@ -581,7 +582,7 @@ dbgu: serial@fffff200 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9N12_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -770,7 +771,7 @@ ebi: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9N12_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
index de74cf2980a04..78ede09d34861 100644
--- a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9rl-pmc.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pwm/pwm.h>
@@ -112,7 +113,7 @@ ebi: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9RL_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -287,7 +288,7 @@ usb0: gadget@fffd4000 {
 				reg = <0x00600000 0x100000>,
 				      <0xfffd4000 0x4000>;
 				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE AT91SAM9RL_PMC_UTMI>;
 				clock-names = "pclk", "hclk";
 				status = "disabled";
 			};
@@ -331,7 +332,7 @@ dbgu: serial@fffff200 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9RL_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -788,7 +789,7 @@ pit: timer@fffffd30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffd30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9RL_PMC_MCK>;
 			};
 
 			watchdog@fffffd40 {
diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
index 9070fd06995a0..e1ba217b5d624 100644
--- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,at91sam9x5-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -151,7 +152,7 @@ pit: timer@fffffe30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe30 0xf>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9X5_PMC_MCK>;
 			};
 
 			clk32k: clock-controller@fffffe50 {
@@ -682,7 +683,7 @@ dbgu: serial@fffff200 {
 				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
 				       <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 				dma-names = "tx", "rx";
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9X5_PMC_MCK>;
 				clock-names = "usart";
 				status = "disabled";
 			};
@@ -852,7 +853,7 @@ usb2: gadget@f803c000 {
 				reg = <0x00500000 0x80000
 				       0xf803c000 0x400>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
+				clocks = <&pmc PMC_TYPE_CORE AT91SAM9X5_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
 				clock-names = "hclk", "pclk";
 				status = "disabled";
 			};
@@ -899,7 +900,7 @@ usb1: usb@700000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00700000 0x100000>;
 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9X5_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
 			clock-names = "usb_clk", "ehci_clk";
 			status = "disabled";
 		};
@@ -917,7 +918,7 @@ ebi: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE AT91SAM9X5_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index b075865e6a768..f9e3962faca3f 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x60-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/mfd/atmel-flexcom.h>
 
@@ -81,9 +82,9 @@ usb0: gadget@500000 {
 			reg = <0x00500000 0x100000
 				0xf803c000 0x400>;
 			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
 			clock-names = "pclk", "hclk";
-			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
 			assigned-clock-rates = <480000000>;
 			status = "disabled";
 		};
@@ -101,9 +102,9 @@ usb2: usb@700000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00700000 0x100000>;
 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
+			clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
 			clock-names = "usb_clk", "ehci_clk";
-			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
 			assigned-clock-rates = <480000000>;
 			status = "disabled";
 		};
@@ -121,7 +122,7 @@ ebi: ebi@10000000 {
 				  0x3 0x0 0x40000000 0x10000000
 				  0x4 0x0 0x50000000 0x10000000
 				  0x5 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -1063,7 +1064,7 @@ hlcdc: hlcdc@f8038000 {
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_GCK 25>, <&clk32k 1>;
 				clock-names = "periph_clk","sys_clk", "slow_clk";
 				assigned-clocks = <&pmc PMC_TYPE_GCK 25>;
-				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
 				status = "disabled";
 
 				hlcdc-display-controller {
@@ -1369,7 +1370,7 @@ pit: timer@fffffe40 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe40 0x10>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
 			};
 
 			clk32k: clock-controller@fffffe50 {
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
index 46dacbbd201dd..69d51bd352bb0 100644
--- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x7-pmc.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -288,7 +289,7 @@ AT91_XDMAC_DT_PERID(26))>,
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>;
 			clock-names = "pclk", "gclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 35>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_PLLADIV2>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X7_PMC_PLLADIV2>;
 			status = "disabled";
 		};
 
@@ -500,9 +501,9 @@ can0: can@f8000000 {
 			interrupt-names = "int0", "int1";
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_GCK 29>;
 			clock-names = "hclk", "cclk";
-			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
+			assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
 			assigned-clock-rates = <480000000>, <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>;
 			bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -516,9 +517,9 @@ can1: can@f8004000 {
 			interrupt-names = "int0", "int1";
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
 			clock-names = "hclk", "cclk";
-			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
+			assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
 			assigned-clock-rates = <480000000>, <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>;
 			bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -1158,7 +1159,7 @@ pmecc: ecc-engine@ffffe000 {
 		mpddrc: mpddrc@ffffe800 {
 			compatible = "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc";
 			reg = <0xffffe800 0x200>;
-			clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_MCK>;
 			clock-names = "ddrck", "mpddr";
 		};
 
diff --git a/arch/arm/boot/dts/microchip/sama5d2.dtsi b/arch/arm/boot/dts/microchip/sama5d2.dtsi
index fde890f18d201..343fd4e878055 100644
--- a/arch/arm/boot/dts/microchip/sama5d2.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d2.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d2-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
 
@@ -47,7 +48,7 @@ etb@740000 {
 		compatible = "arm,coresight-etb10", "arm,primecell";
 		reg = <0x740000 0x1000>;
 
-		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+		clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MCK>;
 		clock-names = "apb_pclk";
 
 		in-ports {
@@ -63,7 +64,7 @@ etm@73c000 {
 		compatible = "arm,coresight-etm3x", "arm,primecell";
 		reg = <0x73c000 0x1000>;
 
-		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+		clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MCK>;
 		clock-names = "apb_pclk";
 
 		out-ports {
@@ -133,7 +134,7 @@ usb0: gadget@300000 {
 			reg = <0x00300000 0x100000
 			       0xfc02c000 0x400>;
 			interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE SAMA5D2_PMC_UTMI>;
 			clock-names = "pclk", "hclk";
 			status = "disabled";
 		};
@@ -151,7 +152,7 @@ usb2: usb@500000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00500000 0x100000>;
 			interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
 			clock-names = "usb_clk", "ehci_clk";
 			status = "disabled";
 		};
@@ -176,7 +177,7 @@ ebi: ebi@10000000 {
 				  0x1 0x0 0x60000000 0x10000000
 				  0x2 0x0 0x70000000 0x10000000
 				  0x3 0x0 0x80000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MCK2>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -195,7 +196,7 @@ sdmmc0: sdio-host@a0000000 {
 			compatible = "atmel,sama5d2-sdhci";
 			reg = <0xa0000000 0x300>;
 			interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MAIN>;
 			clock-names = "hclock", "multclk", "baseclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
 			assigned-clock-rates = <480000000>;
@@ -206,7 +207,7 @@ sdmmc1: sdio-host@b0000000 {
 			compatible = "atmel,sama5d2-sdhci";
 			reg = <0xb0000000 0x300>;
 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MAIN>;
 			clock-names = "hclock", "multclk", "baseclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
 			assigned-clock-rates = <480000000>;
@@ -696,7 +697,7 @@ pit: timer@f8048030 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xf8048030 0x10>;
 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
+				clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_MCK2>;
 			};
 
 			watchdog: watchdog@f8048040 {
@@ -734,7 +735,7 @@ AT91_XDMAC_DT_PERID(31))>,
 				dma-names = "tx", "rx";
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
 				clock-names = "pclk", "gclk";
-				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
+				assigned-clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_I2S0_MUX>;
 				assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
 				status = "disabled";
 			};
@@ -749,7 +750,7 @@ can0: can@f8054000 {
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
 				clock-names = "hclk", "cclk";
 				assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
-				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+				assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_UTMI>;
 				assigned-clock-rates = <40000000>;
 				bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 				status = "disabled";
@@ -1134,7 +1135,7 @@ AT91_XDMAC_DT_PERID(33))>,
 				dma-names = "tx", "rx";
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
 				clock-names = "pclk", "gclk";
-				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
+				assigned-clocks = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_I2S1_MUX>;
 				assigned-clock-parents = <&pmc PMC_TYPE_GCK 55>;
 				status = "disabled";
 			};
@@ -1149,7 +1150,7 @@ can1: can@fc050000 {
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 				clock-names = "hclk", "cclk";
 				assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
-				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+				assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA5D2_PMC_UTMI>;
 				assigned-clock-rates = <40000000>;
 				bosch,mram-cfg = <0x1c00 0 0 64 0 0 32 32>;
 				status = "disabled";
diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi
index 00ba59ac1968c..a4e6ad652152c 100644
--- a/arch/arm/boot/dts/microchip/sama5d3.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d3-pmc.h>
 #include <dt-bindings/mfd/at91-usart.h>
 
 / {
@@ -1028,7 +1029,7 @@ pit: timer@fffffe30 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe30 0xf>;
 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_CORE SAMA5D3_PMC_MCK>;
 			};
 
 			watchdog: watchdog@fffffe40 {
@@ -1071,7 +1072,7 @@ usb0: gadget@500000 {
 			reg = <0x00500000 0x100000
 			       0xf8030000 0x4000>;
 			interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE SAMA5D3_PMC_UTMI>;
 			clock-names = "pclk", "hclk";
 			status = "disabled";
 		};
@@ -1089,7 +1090,7 @@ usb2: usb@700000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00700000 0x100000>;
 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D3_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>;
 			clock-names = "usb_clk", "ehci_clk";
 			status = "disabled";
 		};
@@ -1105,7 +1106,7 @@ ebi: ebi@10000000 {
 				  0x1 0x0 0x40000000 0x10000000
 				  0x2 0x0 0x50000000 0x10000000
 				  0x3 0x0 0x60000000 0x10000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D3_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi
index ec1d68c640dea..d41377c465c4f 100644
--- a/arch/arm/boot/dts/microchip/sama5d4.dtsi
+++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi
@@ -7,6 +7,7 @@
  */
 
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/atmel,sama5d4-pmc.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/pinctrl/at91.h>
@@ -116,7 +117,7 @@ usb0: gadget@400000 {
 			reg = <0x00400000 0x100000
 			       0xfc02c000 0x4000>;
 			interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE SAMA5D4_PMC_UTMI>;
 			clock-names = "pclk", "hclk";
 			status = "disabled";
 		};
@@ -134,7 +135,7 @@ usb2: usb@600000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00600000 0x100000>;
 			interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D4_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
 			clock-names = "usb_clk", "ehci_clk";
 			status = "disabled";
 		};
@@ -159,7 +160,7 @@ ebi: ebi@10000000 {
 				  0x1 0x0 0x60000000 0x10000000
 				  0x2 0x0 0x70000000 0x10000000
 				  0x3 0x0 0x80000000 0x8000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA5D4_PMC_MCK>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -753,7 +754,7 @@ pit: timer@fc068630 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfc068630 0x10>;
 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
-				clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
+				clocks = <&pmc PMC_TYPE_CORE SAMA5D4_PMC_MCK2>;
 			};
 
 			watchdog: watchdog@fc068640 {
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index cd2cf9a6f40b8..246fc0e5fe21f 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -9,6 +9,7 @@
  */
 
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7d65-pmc.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -30,7 +31,7 @@ cpu0: cpu@0 {
 			compatible = "arm,cortex-a7";
 			reg = <0x0>;
 			device_type = "cpu";
-			clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_CPUPLL>;
 			clock-names = "cpu";
 			d-cache-size = <0x8000>;	// L1, 32 KB
 			i-cache-size = <0x8000>;	// L1, 32 KB
@@ -186,7 +187,7 @@ can0: can@e0828000 {
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 58>;
 			assigned-clock-rates = <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_UTMI>;
 			bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -202,7 +203,7 @@ can1: can@e082c000 {
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 59>;
 			assigned-clock-rates = <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_UTMI>;
 			bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -218,7 +219,7 @@ can2: can@e0830000 {
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 60>;
 			assigned-clock-rates = <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_UTMI>;
 			bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -234,7 +235,7 @@ can3: can@e0834000 {
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
 			assigned-clock-rates = <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_UTMI>;
 			bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -250,7 +251,7 @@ can4: can@e0838000 {
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
 			assigned-clock-rates = <40000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_UTMI>;
 			bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
 			status = "disabled";
 		};
@@ -274,7 +275,7 @@ sdmmc1: mmc@e1208000 {
 			clock-names = "hclock", "multclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 76>;
 			assigned-clock-rates = <200000000>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK1>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_MCK1>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index 03ef3d9aaeec6..b8296391fc696 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7g5-pmc.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mfd/at91-usart.h>
@@ -34,7 +35,7 @@ cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0x0>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_CPUPLL>;
 			clock-names = "cpu";
 			operating-points-v2 = <&cpu_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -202,7 +203,7 @@ ebi: ebi@40000000 {
 				  0x1 0x0 0x48000000 0x8000000
 				  0x2 0x0 0x50000000 0x8000000
 				  0x3 0x0 0x58000000 0x8000000>;
-			clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MCK1>;
 			status = "disabled";
 
 			nand_controller: nand-controller {
@@ -385,7 +386,7 @@ can0: can@e0828000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -401,7 +402,7 @@ can1: can@e082c000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -417,7 +418,7 @@ can2: can@e0830000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 63>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -433,7 +434,7 @@ can3: can@e0834000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 64>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -449,7 +450,7 @@ can4: can@e0838000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 65>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -465,7 +466,7 @@ can5: can@e083c000 {
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
 			clock-names = "hclk", "cclk";
 			assigned-clocks = <&pmc PMC_TYPE_GCK 66>;
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clock-rates = <40000000>;
 			bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
 			status = "disabled";
@@ -496,7 +497,7 @@ sdmmc0: mmc@e1204000 {
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
 			clock-names = "hclock", "multclk";
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
 			assigned-clock-rates = <200000000>;
 			microchip,sdcal-inverted;
@@ -509,7 +510,7 @@ sdmmc1: mmc@e1208000 {
 			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
 			clock-names = "hclock", "multclk";
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
 			assigned-clock-rates = <200000000>;
 			microchip,sdcal-inverted;
@@ -522,7 +523,7 @@ sdmmc2: mmc@e120c000 {
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
 			clock-names = "hclock", "multclk";
-			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+			assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
 			assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
 			assigned-clock-rates = <200000000>;
 			microchip,sdcal-inverted;
-- 
2.47.3

[PATCH v3 16/19] ARM: dts: microchip: sama7g5: Add OTPC clocks

[Alexander Dahl]

These clocks should be enabled, datasheet says:

> The OTPC is clocked through the Power Management Controller (PMC).
> The user must power on the main RC oscillator and enable the
> peripheral clock of the OTPC prior to reading or writing the OTP
> memory.

Earlier discussions suggest, MCK0 must be enabled, too.  MCK0 is parent
of peripheral otpc_clk, so this is done implicitly.

Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Removed clock-names, not part of bindings anymore, and not used by driver
    
    v2:
    - new patch, not present in v1

 arch/arm/boot/dts/microchip/sama7g5.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index b8296391fc696..30193f3bf9775 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -1036,6 +1036,7 @@ otpc: efuse@e8c00000 {
 			reg = <0xe8c00000 0x100>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+			clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
 
 			temperature_calib: calib@1 {
 				reg = <OTP_PKT(1) 76>;
-- 
2.47.3

[PATCH v3 17/19] ARM: dts: microchip: sam9x60: Add OTPC node

[Alexander Dahl]

The One-Time Programmable (OTP) Memory Controller (OTPC) is the secure
interface between the system and the OTP memory.  It also features the
Unique Product ID (UID) registers containing a unique serial number.

See datasheet (DS60001579G) sections "7. Memories" and "23. OTP Memory
Controller (OTPC)" for reference.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Removed needless header include
    - Removed clock-names, not part of bindings anymore, and not used by driver
    
    v2:
    - squashed with patch adding the clock properties

 arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index f9e3962faca3f..098996739a62f 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -157,6 +157,14 @@ sdmmc1: sdio-host@90000000 {
 			status = "disabled";
 		};
 
+		otpc: efuse@eff00000 {
+			compatible = "microchip,sam9x60-otpc", "syscon";
+			reg = <0xeff00000 0xec>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 46>;
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;
-- 
2.47.3

[PATCH v3 18/19] ARM: dts: microchip: sam9x60_curiosity: Enable OTP Controller

[Alexander Dahl]

Allows to access the OTP memory and Product UID now.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - Reworded commit message after reordering patches
    
    v2:
    - same as in v1, no changes

 arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts
index b9ffd9e5faacc..c110a8e87568a 100644
--- a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts
+++ b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts
@@ -252,6 +252,10 @@ ethernet-phy@0 {
 	};
 };
 
+&otpc {
+	status = "okay";
+};
+
 &pinctrl {
 	adc {
 		pinctrl_adc_default: adc-default {
-- 
2.47.3

[PATCH v3 19/19] dt-bindings: clock: at91: Remove old PMC definitions

[Alexander Dahl]

Those were split up per SoC and are not used anymore.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---

Notes:
    v3:
    - new patch, not present in v2

 include/dt-bindings/clock/at91.h | 32 --------------------------------
 1 file changed, 32 deletions(-)

diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
index f2a7b7d39c0d0..ebc41cb4edb92 100644
--- a/include/dt-bindings/clock/at91.h
+++ b/include/dt-bindings/clock/at91.h
@@ -14,38 +14,6 @@
 #define PMC_TYPE_GCK		3
 #define PMC_TYPE_PROGRAMMABLE	4
 
-#define PMC_SLOW		0
-#define PMC_MCK			1
-#define PMC_UTMI		2
-#define PMC_MAIN		3
-#define PMC_MCK2		4
-#define PMC_I2S0_MUX		5
-#define PMC_I2S1_MUX		6
-#define PMC_PLLACK		7
-#define PMC_PLLBCK		8
-#define PMC_AUDIOPLLCK		9
-#define PMC_AUDIOPINCK		10
-
-/* SAMA7G5 */
-#define PMC_CPUPLL		(PMC_MAIN + 1)
-#define PMC_SYSPLL		(PMC_MAIN + 2)
-#define PMC_DDRPLL		(PMC_MAIN + 3)
-#define PMC_IMGPLL		(PMC_MAIN + 4)
-#define PMC_BAUDPLL		(PMC_MAIN + 5)
-#define PMC_AUDIOPMCPLL		(PMC_MAIN + 6)
-#define PMC_AUDIOIOPLL		(PMC_MAIN + 7)
-#define PMC_ETHPLL		(PMC_MAIN + 8)
-#define PMC_CPU			(PMC_MAIN + 9)
-#define PMC_MCK1		(PMC_MAIN + 10)
-
-/* SAM9X7 */
-#define PMC_PLLADIV2		(PMC_MAIN + 11)
-#define PMC_LVDSPLL		(PMC_MAIN + 12)
-
-/* SAMA7D65 */
-#define PMC_MCK3		(PMC_MAIN + 13)
-#define PMC_MCK5		(PMC_MAIN + 14)
-
 #ifndef AT91_PMC_MOSCS
 #define AT91_PMC_MOSCS		0		/* MOSCS Flag */
 #define AT91_PMC_LOCKA		1		/* PLLA Lock */
-- 
2.47.3

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Rob Herring (Arm)]

On Tue, 20 Jan 2026 16:44:43 +0100, Alexander Dahl wrote:
> The OTPC requires both the peripheral clock through PMC and the main RC
> oscillator.  Seemed to work without explicitly enabling those clocks on
> sama7g5 before, but did not on sam9x60.
> 
> Older datasheets were not clear and explicit about this, but recent are,
> e.g. SAMA7G5 series datasheet (DS60001765B),
> section 30.4.1 Power Management:
> 
> > The OTPC is clocked through the Power Management Controller (PMC).
> > The user must power on the main RC oscillator and enable the
> > peripheral clock of the OTPC prior to reading or writing the OTP
> > memory.
> 
> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>     v3:
>     - Removed clock-names (led to confusion, and not used by the driver anyways)
>     - Removed redundant example
> 
>     v2:
>     - new patch, not present in v1
> 
>  .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.example.dts:19:18: fatal error: dt-bindings/clock/microchip,sama7g5-pmc.h: No such file or directory
   19 |         #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [scripts/Makefile.dtbs:141: Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.example.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1559: dt_binding_check] Error 2
make: *** [Makefile:248: __sub-make] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20260120154502.1280938-3-ada@thorsis.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v3 02/19] dt-bindings: clock: at91: Split up per SoC partially

[Rob Herring (Arm)]

On Tue, 20 Jan 2026 15:37:23 +0100, Alexander Dahl wrote:
> Before adding even more new indexes creating more holes in the
> clk at91 drivers pmc_data->chws arrays, split this up.
> 
> This is a partial split up only for some of the old PMC definitions.
> 
> Binding splitup was proposed for several reasons:
> 
> 1) keep the driver code simple, readable, and efficient
> 2) avoid accidental array index duplication
> 3) avoid memory waste by creating more and more unused array members.
> 
> Old values are kept to not break dts, and to maintain dt ABI.
> 
> Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>     v3:
>     - full splitup for all at91 family SoCs instead of just a few
> 
>     v2:
>     - new patch, not present in v1
> 
>  .../reset/atmel,at91sam9260-reset.yaml        |  3 ++-
>  .../dt-bindings/clock/atmel,at91rm9200-pmc.h  | 15 ++++++++++++
>  .../dt-bindings/clock/atmel,at91sam9260-pmc.h | 16 +++++++++++++
>  .../dt-bindings/clock/atmel,at91sam9g45-pmc.h | 15 ++++++++++++
>  .../dt-bindings/clock/atmel,at91sam9n12-pmc.h | 15 ++++++++++++
>  .../dt-bindings/clock/atmel,at91sam9rl-pmc.h  | 15 ++++++++++++
>  .../dt-bindings/clock/atmel,at91sam9x5-pmc.h  | 15 ++++++++++++
>  include/dt-bindings/clock/atmel,sama5d2-pmc.h | 20 ++++++++++++++++
>  include/dt-bindings/clock/atmel,sama5d3-pmc.h | 14 +++++++++++
>  include/dt-bindings/clock/atmel,sama5d4-pmc.h | 15 ++++++++++++
>  .../dt-bindings/clock/microchip,sam9x60-pmc.h | 15 ++++++++++++
>  .../dt-bindings/clock/microchip,sam9x7-pmc.h  | 19 +++++++++++++++
>  .../clock/microchip,sama7d65-pmc.h            | 24 +++++++++++++++++++
>  .../dt-bindings/clock/microchip,sama7g5-pmc.h | 19 +++++++++++++++
>  14 files changed, 219 insertions(+), 1 deletion(-)
>  create mode 100644 include/dt-bindings/clock/atmel,at91rm9200-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,at91sam9260-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,sama5d2-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,sama5d3-pmc.h
>  create mode 100644 include/dt-bindings/clock/atmel,sama5d4-pmc.h
>  create mode 100644 include/dt-bindings/clock/microchip,sam9x60-pmc.h
>  create mode 100644 include/dt-bindings/clock/microchip,sam9x7-pmc.h
>  create mode 100644 include/dt-bindings/clock/microchip,sama7d65-pmc.h
>  create mode 100644 include/dt-bindings/clock/microchip,sama7g5-pmc.h
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH v3 19/19] dt-bindings: clock: at91: Remove old PMC definitions

[Rob Herring (Arm)]

On Tue, 20 Jan 2026 16:44:53 +0100, Alexander Dahl wrote:
> Those were split up per SoC and are not used anymore.
> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>     v3:
>     - new patch, not present in v2
> 
>  include/dt-bindings/clock/at91.h | 32 --------------------------------
>  1 file changed, 32 deletions(-)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH v3 02/19] dt-bindings: clock: at91: Split up per SoC partially

[Claudiu Beznea]

On 1/20/26 16:37, Alexander Dahl wrote:
> Before adding even more new indexes creating more holes in the
> clk at91 drivers pmc_data->chws arrays, split this up.
> 
> This is a partial split up only for some of the old PMC definitions.
> 
> Binding splitup was proposed for several reasons:
> 
> 1) keep the driver code simple, readable, and efficient
> 2) avoid accidental array index duplication
> 3) avoid memory waste by creating more and more unused array members.
> 
> Old values are kept to not break dts, and to maintain dt ABI.
> 
> Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - full splitup for all at91 family SoCs instead of just a few
>      
>      v2:
>      - new patch, not present in v1
> 
>   .../reset/atmel,at91sam9260-reset.yaml        |  3 ++-
>   .../dt-bindings/clock/atmel,at91rm9200-pmc.h  | 15 ++++++++++++
>   .../dt-bindings/clock/atmel,at91sam9260-pmc.h | 16 +++++++++++++
>   .../dt-bindings/clock/atmel,at91sam9g45-pmc.h | 15 ++++++++++++
>   .../dt-bindings/clock/atmel,at91sam9n12-pmc.h | 15 ++++++++++++
>   .../dt-bindings/clock/atmel,at91sam9rl-pmc.h  | 15 ++++++++++++
>   .../dt-bindings/clock/atmel,at91sam9x5-pmc.h  | 15 ++++++++++++
>   include/dt-bindings/clock/atmel,sama5d2-pmc.h | 20 ++++++++++++++++
>   include/dt-bindings/clock/atmel,sama5d3-pmc.h | 14 +++++++++++
>   include/dt-bindings/clock/atmel,sama5d4-pmc.h | 15 ++++++++++++
>   .../dt-bindings/clock/microchip,sam9x60-pmc.h | 15 ++++++++++++
>   .../dt-bindings/clock/microchip,sam9x7-pmc.h  | 19 +++++++++++++++
>   .../clock/microchip,sama7d65-pmc.h            | 24 +++++++++++++++++++
>   .../dt-bindings/clock/microchip,sama7g5-pmc.h | 19 +++++++++++++++
>   14 files changed, 219 insertions(+), 1 deletion(-)
>   create mode 100644 include/dt-bindings/clock/atmel,at91rm9200-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,at91sam9260-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,sama5d2-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,sama5d3-pmc.h
>   create mode 100644 include/dt-bindings/clock/atmel,sama5d4-pmc.h
>   create mode 100644 include/dt-bindings/clock/microchip,sam9x60-pmc.h
>   create mode 100644 include/dt-bindings/clock/microchip,sam9x7-pmc.h
>   create mode 100644 include/dt-bindings/clock/microchip,sama7d65-pmc.h
>   create mode 100644 include/dt-bindings/clock/microchip,sama7g5-pmc.h
> 
> diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
> index 84c4801df8d9a..8c89ccc3d6393 100644
> --- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
> +++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
> @@ -67,9 +67,10 @@ additionalProperties: false
>   examples:
>     - |
>       #include <dt-bindings/clock/at91.h>
> +    #include <dt-bindings/clock/atmel,at91sam9260-pmc.h>
>   
>       reset-controller@fffffd00 {
>           compatible = "atmel,at91sam9260-rstc";
>           reg = <0xfffffd00 0x10>;
> -        clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
> +        clocks = <&pmc PMC_TYPE_CORE AT91SAM9260_PMC_SLOW>;
>       };
> diff --git a/include/dt-bindings/clock/atmel,at91rm9200-pmc.h b/include/dt-bindings/clock/atmel,at91rm9200-pmc.h
> new file mode 100644
> index 0000000000000..ab0d0d7a3b655
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91rm9200-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91rm9200 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91RM9200_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91RM9200_PMC_H
> +
> +#define AT91RM9200_PMC_MCK	1
> +#define AT91RM9200_PMC_MAIN	3
> +#define AT91RM9200_PMC_PLLACK	7
> +#define AT91RM9200_PMC_PLLBCK	8
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,at91sam9260-pmc.h b/include/dt-bindings/clock/atmel,at91sam9260-pmc.h
> new file mode 100644
> index 0000000000000..6a5453cf70954
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91sam9260-pmc.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91sam9260 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9260_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9260_PMC_H
> +
> +#define AT91SAM9260_PMC_SLOW	0
> +#define AT91SAM9260_PMC_MCK	1
> +#define AT91SAM9260_PMC_MAIN	3
> +#define AT91SAM9260_PMC_PLLACK	7
> +#define AT91SAM9260_PMC_PLLBCK	8
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h b/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
> new file mode 100644
> index 0000000000000..63134ecafa50c
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91sam9g45-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91sam9g45 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9G45_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9G45_PMC_H
> +
> +#define AT91SAM9G45_PMC_MCK	1
> +#define AT91SAM9G45_PMC_UTMI	2
> +#define AT91SAM9G45_PMC_MAIN	3
> +#define AT91SAM9G45_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h b/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
> new file mode 100644
> index 0000000000000..e41ad6d68108a
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91sam9n12-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91sam9n12 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9N12_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9N12_PMC_H
> +
> +#define AT91SAM9N12_PMC_MCK	1
> +#define AT91SAM9N12_PMC_MAIN	3
> +#define AT91SAM9N12_PMC_PLLACK	7
> +#define AT91SAM9N12_PMC_PLLBCK	8
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h b/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
> new file mode 100644
> index 0000000000000..4306d457f8d2b
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91sam9rl-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91sam9rl clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9RL_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9RL_PMC_H
> +
> +#define AT91SAM9RL_PMC_MCK	1
> +#define AT91SAM9RL_PMC_UTMI	2
> +#define AT91SAM9RL_PMC_MAIN	3
> +#define AT91SAM9RL_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h b/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
> new file mode 100644
> index 0000000000000..d3e612f063a00
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,at91sam9x5-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91sam9x5 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9X5_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_AT91SAM9X5_PMC_H
> +
> +#define AT91SAM9X5_PMC_MCK	1
> +#define AT91SAM9X5_PMC_UTMI	2
> +#define AT91SAM9X5_PMC_MAIN	3
> +#define AT91SAM9X5_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,sama5d2-pmc.h b/include/dt-bindings/clock/atmel,sama5d2-pmc.h
> new file mode 100644
> index 0000000000000..1690a69087522
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,sama5d2-pmc.h
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sama5d2 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D2_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D2_PMC_H
> +
> +#define SAMA5D2_PMC_MCK		1
> +#define SAMA5D2_PMC_UTMI	2
> +#define SAMA5D2_PMC_MAIN	3
> +#define SAMA5D2_PMC_MCK2	4
> +#define SAMA5D2_PMC_I2S0_MUX	5
> +#define SAMA5D2_PMC_I2S1_MUX	6
> +#define SAMA5D2_PMC_PLLACK	7
> +#define SAMA5D2_PMC_AUDIOPLLCK	9
> +#define SAMA5D2_PMC_AUDIOPINCK	10
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,sama5d3-pmc.h b/include/dt-bindings/clock/atmel,sama5d3-pmc.h
> new file mode 100644
> index 0000000000000..85b772ccd996a
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,sama5d3-pmc.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sama5d3 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D3_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D3_PMC_H
> +
> +#define SAMA5D3_PMC_MCK		1
> +#define SAMA5D3_PMC_UTMI	2
> +#define SAMA5D3_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/atmel,sama5d4-pmc.h b/include/dt-bindings/clock/atmel,sama5d4-pmc.h
> new file mode 100644
> index 0000000000000..15b812e1b9259
> --- /dev/null
> +++ b/include/dt-bindings/clock/atmel,sama5d4-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sama5d4 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_ATMEL_SAMA5D4_PMC_H
> +#define _DT_BINDINGS_CLOCK_ATMEL_SAMA5D4_PMC_H
> +
> +#define SAMA5D4_PMC_MCK		1
> +#define SAMA5D4_PMC_UTMI	2
> +#define SAMA5D4_PMC_MCK2	4
> +#define SAMA5D4_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> new file mode 100644
> index 0000000000000..91f8f863ea076
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sam9x60 clock driver.

s/at91/Microchip. Same for microchip,sam9x7-pmc.h, microchip,sama7d65-pmc.h, 
microchip,sama7g5-pmc.h files.


> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X60_PMC_H
> +#define _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X60_PMC_H
> +
> +#define SAM9X60_PMC_MCK		1
> +#define SAM9X60_PMC_UTMI	2
> +#define SAM9X60_PMC_MAIN	3
> +#define SAM9X60_PMC_PLLACK	7
> +
> +#endif
> diff --git a/include/dt-bindings/clock/microchip,sam9x7-pmc.h b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> new file mode 100644
> index 0000000000000..e1dd41fe75046
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sam9x7 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X7_PMC_H
> +#define _DT_BINDINGS_CLOCK_MICROCHIP_SAM9X7_PMC_H
> +
> +#define SAM9X7_PMC_MCK		1
> +#define SAM9X7_PMC_UTMI		2
> +#define SAM9X7_PMC_MAIN		3
> +#define SAM9X7_PMC_PLLACK	7

You should also keep the other PLLs even if they are not used in device trees. 
They are HW specific. Same for the other SoCs.

> +#define SAM9X7_PMC_AUDIOPMCPLL	9
> +#define SAM9X7_PMC_AUDIOIOPLL	10
> +#define SAM9X7_PMC_PLLADIV2	14
> +#define SAM9X7_PMC_LVDSPLL	15
> +
> +#endif
> diff --git a/include/dt-bindings/clock/microchip,sama7d65-pmc.h b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> new file mode 100644
> index 0000000000000..09d152da6db44
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sama7d65 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7D65_PMC_H
> +#define _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7D65_PMC_H
> +
> +#define SAMA7D65_PMC_MCK0		1
> +#define SAMA7D65_PMC_UTMI		2
> +#define SAMA7D65_PMC_MAIN		3
> +#define SAMA7D65_PMC_CPUPLL		4
> +#define SAMA7D65_PMC_SYSPLL		5

Here, you should keep the other PLLs as well.

> +#define SAMA7D65_PMC_BAUDPLL		8
> +#define SAMA7D65_PMC_AUDIOPMCPLL	9
> +#define SAMA7D65_PMC_AUDIOIOPLL		10
> +#define SAMA7D65_PMC_ETHPLL		11
> +#define SAMA7D65_PMC_MCK1		13
> +#define SAMA7D65_PMC_LVDSPLL		15
> +#define SAMA7D65_PMC_MCK3		16
> +#define SAMA7D65_PMC_MCK5		17
> +
> +#endif
> diff --git a/include/dt-bindings/clock/microchip,sama7g5-pmc.h b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> new file mode 100644
> index 0000000000000..0303cae56f849
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * The constants defined in this header are being used in dts and in
> + * at91 sama7g5 clock driver.
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7G5_PMC_H
> +#define _DT_BINDINGS_CLOCK_MICROCHIP_SAMA7G5_PMC_H
> +
> +#define SAMA7G5_PMC_MCK0	1
> +#define SAMA7G5_PMC_UTMI	2
> +#define SAMA7G5_PMC_MAIN	3
> +#define SAMA7G5_PMC_CPUPLL	4
> +#define SAMA7G5_PMC_SYSPLL	5

Same here. Keep the defines for the rest of the PLLs.

> +#define SAMA7G5_PMC_AUDIOPMCPLL	9
> +#define SAMA7G5_PMC_AUDIOIOPLL	10
> +#define SAMA7G5_PMC_MCK1	13
> +
> +#endif

Re: [PATCH v3 03/19] dt-bindings: clock: at91: Allow referencing main rc oscillator in DT

[Claudiu Beznea]

Hi, Alexander,

On 1/20/26 16:37, Alexander Dahl wrote:
> The main rc oscillator will be needed for the OTPC to work properly.
> 
> The new index introduced here was not used on the four affected SoC
> clock drivers before, but for sama5d2 only (PMC_I2S1_MUX).
> 
> Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - adapt to different base changes, added lines are the same
>      
>      v2:
>      - new patch, not present in v1
> 
>   include/dt-bindings/clock/microchip,sam9x60-pmc.h  | 1 +
>   include/dt-bindings/clock/microchip,sam9x7-pmc.h   | 1 +
>   include/dt-bindings/clock/microchip,sama7d65-pmc.h | 1 +
>   include/dt-bindings/clock/microchip,sama7g5-pmc.h  | 1 +
>   4 files changed, 4 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> index 91f8f863ea076..1f6bb51780d09 100644
> --- a/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> +++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> @@ -10,6 +10,7 @@
>   #define SAM9X60_PMC_MCK		1
>   #define SAM9X60_PMC_UTMI	2
>   #define SAM9X60_PMC_MAIN	3
> +#define SAM9X60_PMC_MAIN_RC	6

Why 6 and not another index? In theory, now, you should be able to define here 
all the core clocks IDs (as these are known from the manuals) and prepare the 
driver to allocate memory for all of them such that the driver will have to be 
able to work with old and new device trees w/o further changes.

>   #define SAM9X60_PMC_PLLACK	7
>   
>   #endif
> diff --git a/include/dt-bindings/clock/microchip,sam9x7-pmc.h b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> index e1dd41fe75046..657f32ce10071 100644
> --- a/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> +++ b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> @@ -10,6 +10,7 @@
>   #define SAM9X7_PMC_MCK		1
>   #define SAM9X7_PMC_UTMI		2
>   #define SAM9X7_PMC_MAIN		3
> +#define SAM9X7_PMC_MAIN_RC	6
>   #define SAM9X7_PMC_PLLACK	7
>   #define SAM9X7_PMC_AUDIOPMCPLL	9
>   #define SAM9X7_PMC_AUDIOIOPLL	10
> diff --git a/include/dt-bindings/clock/microchip,sama7d65-pmc.h b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> index 09d152da6db44..ddcb236718978 100644
> --- a/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> +++ b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> @@ -12,6 +12,7 @@
>   #define SAMA7D65_PMC_MAIN		3
>   #define SAMA7D65_PMC_CPUPLL		4
>   #define SAMA7D65_PMC_SYSPLL		5
> +#define SAMA7D65_PMC_MAIN_RC		6

E.g. 6 was previously reserved for DDR and IMG PLLs.

>   #define SAMA7D65_PMC_BAUDPLL		8
>   #define SAMA7D65_PMC_AUDIOPMCPLL	9
>   #define SAMA7D65_PMC_AUDIOIOPLL		10
> diff --git a/include/dt-bindings/clock/microchip,sama7g5-pmc.h b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> index 0303cae56f849..e891715a35173 100644
> --- a/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> +++ b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> @@ -12,6 +12,7 @@
>   #define SAMA7G5_PMC_MAIN	3
>   #define SAMA7G5_PMC_CPUPLL	4
>   #define SAMA7G5_PMC_SYSPLL	5
> +#define SAMA7G5_PMC_MAIN_RC	6
>   #define SAMA7G5_PMC_AUDIOPMCPLL	9
>   #define SAMA7G5_PMC_AUDIOIOPLL	10
>   #define SAMA7G5_PMC_MCK1	13

Re: [PATCH v3 04/19] clk: at91: Use new PMC bindings

[Claudiu Beznea]

On 1/20/26 16:37, Alexander Dahl wrote:
> The bindings were split up per SoC before adding new array members for
> missing clocks.

Please adjust the patch description to follow the submitting patches document: 
https://www.kernel.org/doc/html/v6.13/process/submitting-patches.html#describe-your-changes

> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>

The rest LGTM.

Re: [PATCH v3 05/19] clk: at91: sama7d65: Use highest PMC definition as max index

[Claudiu Beznea]

On 1/20/26 16:37, Alexander Dahl wrote:
> Consistent with all the other at91 clock drivers now, which also use the
> highest PMC definition as max value, and no extra number.
> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - new patch, not present in v2
> 
>   drivers/clk/at91/sama7d65.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index f6f86261ceefd..4ccffa8db43a5 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -19,8 +19,6 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
>   static DEFINE_SPINLOCK(pmc_mck0_lock);
>   static DEFINE_SPINLOCK(pmc_mckX_lock);
>   
> -#define PMC_INDEX_MAX	25

That's not the right approach.

You should identify all the core clocks as described in the HW manual and 
allocate the ncore section of sama7d65_pmc[] to have all those fit in there. 
This driver would have to work with old and new device trees and thus, if you 
shrink it now you wouldn't satisfy this rule in the future.

> -
>   /*
>    * PLL clocks identifiers
>    * @PLL_ID_CPU:		CPU PLL identifier
> @@ -1120,7 +1118,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>   	if (IS_ERR(regmap))
>   		return;
>   
> -	sama7d65_pmc = pmc_data_allocate(PMC_INDEX_MAX,
> +	sama7d65_pmc = pmc_data_allocate(SAMA7D65_PMC_MCK5 + 1,
>   					 nck(sama7d65_systemck),
>   					 nck(sama7d65_periphck),
>   					 nck(sama7d65_gck), 8);

Re: [PATCH v3 07/19] clk: at91: Add peripheral id for OTPC

[Claudiu Beznea]

In patch title:

s/Add peripheral id for OTPC/Add peripheral clock id for OTPC


On 1/20/26 16:37, Alexander Dahl wrote:
> That peripheral clock is required for proper OTPC function.

This would have to follow the submitting patches rule (check the document shared 
in another patch). I would re-write this as:

Add the peripheral clock IDs for OTPC. This clock is required for proper OTPC 
operation.

> 
> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u

Why is this mentioned here?

> Signed-off-by: Alexander Dahl <ada@thorsis.com>

The rest LGTM.

> ---
> 
> Notes:
>      v3:
>      - no changes
>      
>      v2:
>      - new patch in series, was not present in v1
> 
>   drivers/clk/at91/sam9x60.c  | 1 +
>   drivers/clk/at91/sam9x7.c   | 1 +
>   drivers/clk/at91/sama7d65.c | 1 +
>   drivers/clk/at91/sama7g5.c  | 1 +
>   4 files changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
> index a9f293a8e3b26..11f16126ff9e9 100644
> --- a/drivers/clk/at91/sam9x60.c
> +++ b/drivers/clk/at91/sam9x60.c
> @@ -146,6 +146,7 @@ static const struct {
>   	{ .n = "isi_clk",    .id = 43, },
>   	{ .n = "pioD_clk",   .id = 44, },
>   	{ .n = "tcb1_clk",   .id = 45, },
> +	{ .n = "otpc_clk",   .id = 46, },
>   	{ .n = "dbgu_clk",   .id = 47, },
>   	/*
>   	 * mpddr_clk feeds DDR controller and is enabled by bootloader thus we
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index 9a5afd258cb86..c4d2b022d9d07 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -407,6 +407,7 @@ static const struct {
>   	{ .n = "isi_clk",	.id = 43, },
>   	{ .n = "pioD_clk",	.id = 44, },
>   	{ .n = "tcb1_clk",	.id = 45, },
> +	{ .n = "otpc_clk",	.id = 46, },
>   	{ .n = "dbgu_clk",	.id = 47, },
>   	{ .n = "pmecc_clk",	.id = 48, },
>   	/*
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index 5d8973aa50a53..52467d629258f 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -641,6 +641,7 @@ static struct {
>   	{ .n = "mcan2_clk",	.p = PCK_PARENT_HW_MCK5, .id = 60, .r = { .max = 200000000, }, },
>   	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK5, .id = 61, .r = { .max = 200000000, }, },
>   	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK5, .id = 62, .r = { .max = 200000000, }, },
> +	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 63, },
>   	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK9, .id = 64, .r = { .max = 200000000, }, },
>   	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK9, .id = 65, .r = { .max = 200000000, }, },
>   	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK7, .id = 66, },
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index 9a6f0f30b2b7e..3e0cfd2613851 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -504,6 +504,7 @@ static struct {
>   	{ .n = "mcan3_clk",	.p = PCK_PARENT_HW_MCK1, .id = 64, .r = { .max = 200000000, }, },
>   	{ .n = "mcan4_clk",	.p = PCK_PARENT_HW_MCK1, .id = 65, .r = { .max = 200000000, }, },
>   	{ .n = "mcan5_clk",	.p = PCK_PARENT_HW_MCK1, .id = 66, .r = { .max = 200000000, }, },
> +	{ .n = "otpc_clk",	.p = PCK_PARENT_HW_MCK0, .id = 67, },
>   	{ .n = "pdmc0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 68, .r = { .max = 200000000, }, },
>   	{ .n = "pdmc1_clk",	.p = PCK_PARENT_HW_MCK1, .id = 69, .r = { .max = 200000000, }, },
>   	{ .n = "pit64b0_clk",	.p = PCK_PARENT_HW_MCK1, .id = 70, },

Re: [PATCH v3 06/19] clk: at91: Allow enabling main_rc_osc through DT

[Claudiu Beznea]

On 1/20/26 16:37, Alexander Dahl wrote:
> SAM9X60 Datasheet (DS60001579G) Section "23.4 Product Dependencies"
> says:

s/says/states

> 
>      "The OTPC is clocked through the Power Management Controller (PMC).
>      The user must power on the main RC oscillator and enable the
>      peripheral clock of the OTPC prior to reading or writing the OTP
>      memory."
> 
> The code for enabling/disabling that clock is already present

s/that clock/the main RC oscillator clock

 > it was
> just not possible to hook into DT anymore, after at91 clk devicetree
> binding rework back in 2018 for kernel v4.19.

I would re-write this as:

however, after the at91 clock device tree binding rework in 2018
(kernel v4.19), it was no longer possible to hook it up via DT.

> 
> Do it for all controllers with an OTPC controller, where the main rc
> oscillator is required for proper operation.

I would re-write it as:

Export the main RC oscillator for all SoCs featuring an OTPC controller where 
the main RC oscillator is required for proper operation.


> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>

The code LGTM.

> ---
> 
> Notes:
>      v3:
>      - no changes
>      
>      v2:
>      - split out dt-bindings changes into separate patch
>      - extend to drivers for other SoCs providing the OTPC
> 
>   drivers/clk/at91/sam9x60.c  | 1 +
>   drivers/clk/at91/sam9x7.c   | 1 +
>   drivers/clk/at91/sama7d65.c | 1 +
>   drivers/clk/at91/sama7g5.c  | 1 +
>   4 files changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
> index dbcdb1d2161a9..a9f293a8e3b26 100644
> --- a/drivers/clk/at91/sam9x60.c
> +++ b/drivers/clk/at91/sam9x60.c
> @@ -227,6 +227,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
>   					   50000000);
>   	if (IS_ERR(hw))
>   		goto err_free;
> +	sam9x60_pmc->chws[SAM9X60_PMC_MAIN_RC] = hw;
>   
>   	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
>   	if (IS_ERR(hw))
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index 07eadb712a1e4..9a5afd258cb86 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -764,6 +764,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   					   50000000);
>   	if (IS_ERR(hw))
>   		goto err_free;
> +	sam9x7_pmc->chws[SAM9X7_PMC_MAIN_RC] = hw;
>   
>   	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
>   	if (IS_ERR(hw))
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index 4ccffa8db43a5..5d8973aa50a53 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -1135,6 +1135,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>   						   50000000);
>   	if (IS_ERR(main_rc_hw))
>   		goto err_free;
> +	sama7d65_pmc->chws[SAMA7D65_PMC_MAIN_RC] = hw;
>   
>   	bypass = of_property_read_bool(np, "atmel,osc-bypass");
>   
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index 99b4c1d9bdcca..9a6f0f30b2b7e 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -1014,6 +1014,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
>   						   50000000);
>   	if (IS_ERR(main_rc_hw))
>   		goto err_free;
> +	sama7g5_pmc->chws[SAMA7G5_PMC_MAIN_RC] = hw;
>   
>   	bypass = of_property_read_bool(np, "atmel,osc-bypass");
>   

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> The OTPC requires both the peripheral clock through PMC and the main RC
> oscillator.  Seemed to work without explicitly enabling those clocks on
> sama7g5 before, but did not on sam9x60.
> 
> Older datasheets were not clear and explicit about this, but recent are,
> e.g. SAMA7G5 series datasheet (DS60001765B),
> section 30.4.1 Power Management:
> 
>> The OTPC is clocked through the Power Management Controller (PMC).
>> The user must power on the main RC oscillator and enable the
>> peripheral clock of the OTPC prior to reading or writing the OTP
>> memory.

As this was not mentioned in the previous datasheet versions, the current driver 
don't handle those clocks, and it probably worked as the clocks were enabled by 
bootloaders, I think the clocks should be marked as required and this patch to 
be propagated as a fix along with fixes on driver and device trees.

I'll let DT binding maintainers for the final decision on this.

> 
> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u

Why this link here?

> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - Removed clock-names (led to confusion, and not used by the driver anyways)
>      - Removed redundant example
>      
>      v2:
>      - new patch, not present in v1
> 
>   .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> index 9a7aaf64eef32..847dfb67c6b72 100644
> --- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> @@ -29,6 +29,11 @@ properties:
>     reg:
>       maxItems: 1
>   
> +  clocks:
> +    items:
> +      - description: main rc oscillator
> +      - description: otpc peripheral clock
> +
>   required:
>     - compatible
>     - reg
> @@ -37,6 +42,8 @@ unevaluatedProperties: false
>   
>   examples:
>     - |
> +    #include <dt-bindings/clock/at91.h>
> +    #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
>       #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
>   
>       otpc: efuse@e8c00000 {
> @@ -44,6 +51,7 @@ examples:
>           reg = <0xe8c00000 0xec>;
>           #address-cells = <1>;
>           #size-cells = <1>;
> +        clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
>   
>           temperature_calib: calib@1 {
>               reg = <OTP_PKT(1) 76>;

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Claudiu Beznea]

On 1/31/26 17:47, Claudiu Beznea wrote:
> 
> 
> On 1/20/26 17:44, Alexander Dahl wrote:
>> The OTPC requires both the peripheral clock through PMC and the main RC
>> oscillator.  Seemed to work without explicitly enabling those clocks on
>> sama7g5 before, but did not on sam9x60.
>>
>> Older datasheets were not clear and explicit about this, but recent are,
>> e.g. SAMA7G5 series datasheet (DS60001765B),
>> section 30.4.1 Power Management:
>>
>>> The OTPC is clocked through the Power Management Controller (PMC).
>>> The user must power on the main RC oscillator and enable the
>>> peripheral clock of the OTPC prior to reading or writing the OTP
>>> memory.
> 
> As this was not mentioned in the previous datasheet versions, the current driver 
> don't handle those clocks, and it probably worked as the clocks were enabled by 
> bootloaders, I think the clocks should be marked as required and this patch to 
> be propagated as a fix along with fixes on driver and device trees.

Ah, wait, you can't propagate it as a fix as you don't have the necessary clocks 
exported in device tree in the older kernels. And you are just handling it in 
this series.

> 
> I'll let DT binding maintainers for the final decision on this.
> 
>>
>> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a- 
>> b5d8-6e2fd5e08c28@microchip.com/T/#u
> 
> Why this link here?
> 
>> Signed-off-by: Alexander Dahl <ada@thorsis.com>
>> ---
>>
>> Notes:
>>      v3:
>>      - Removed clock-names (led to confusion, and not used by the driver anyways)
>>      - Removed redundant example
>>      v2:
>>      - new patch, not present in v1
>>
>>   .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5- 
>> otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>> index 9a7aaf64eef32..847dfb67c6b72 100644
>> --- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>> +++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>> @@ -29,6 +29,11 @@ properties:
>>     reg:
>>       maxItems: 1
>> +  clocks:
>> +    items:
>> +      - description: main rc oscillator
>> +      - description: otpc peripheral clock
>> +
>>   required:
>>     - compatible
>>     - reg
>> @@ -37,6 +42,8 @@ unevaluatedProperties: false
>>   examples:
>>     - |
>> +    #include <dt-bindings/clock/at91.h>
>> +    #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
>>       #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
>>       otpc: efuse@e8c00000 {
>> @@ -44,6 +51,7 @@ examples:
>>           reg = <0xe8c00000 0xec>;
>>           #address-cells = <1>;
>>           #size-cells = <1>;
>> +        clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc 
>> PMC_TYPE_PERIPHERAL 67>;
>>           temperature_calib: calib@1 {
>>               reg = <OTP_PKT(1) 76>;
> 

Re: [PATCH v3 12/19] nvmem: microchip-otpc: Add SAM9X60 support

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> Register layout is almost identical to SAMA7G5 OTPC.  SAMA7G5 has some

Can't you just use a fallback to sama7g5 for sam9x60 and drop this patch?

> additional bits in common registers, and some additional registers all
> related to custom packages in secure world.  None of these are currently
> used by the driver.
> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - no changes
>      
>      v2:
>      - Reword commit message (additional information about SoC differences)
> 
>   drivers/nvmem/microchip-otpc.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> index bf7e5167152cb..d39f2d57e5f5e 100644
> --- a/drivers/nvmem/microchip-otpc.c
> +++ b/drivers/nvmem/microchip-otpc.c
> @@ -269,6 +269,7 @@ static int mchp_otpc_probe(struct platform_device *pdev)
>   
>   static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
>   	{ .compatible = "microchip,sama7g5-otpc", },
> +	{ .compatible = "microchip,sam9x60-otpc", },
>   	{ },
>   };
>   MODULE_DEVICE_TABLE(of, mchp_otpc_ids);

Re: [PATCH v3 10/19] nvmem: microchip-otpc: Avoid reading a write-only register

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> The OTPC Control Register (OTPC_CR) has just write-only members.
> Reading from that register leads to a warning in OTPC Write Protection
> Status Register (OTPC_WPSR) in field Software Error Type (SWETYP) of
> type READ_WO (A write-only register has been read (warning).)
> 
> Just create the register write content from scratch is sufficient here.
> 
> Fixes: 98830350d3fc ("nvmem: microchip-otpc: add support")
> Cc:stable@vger.kernel.org
> Signed-off-by: Alexander Dahl<ada@thorsis.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v3 11/19] nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> Makes no sense to have a timeout shorter than the sleep time, it would
> run into timeout right after the first sleep already.
> While at it, use a more specific macro instead of the generic one, which
> does exactly the same, but needs less parameters.
> 
> Fixes: 98830350d3fc ("nvmem: microchip-otpc: add support")
> Cc:stable@vger.kernel.org
> Signed-off-by: Alexander Dahl<ada@thorsis.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v3 13/19] nvmem: microchip-otpc: Enable necessary clocks

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> Without enabling the main rc clock, initializing the packet list leads
> to a read timeout on the first packet, at least on sam9x60.
> 
> According to SAM9X60 datasheet (DS60001579G) section "23.4 Product
> Dependencies" the clock must be enabled for reading and writing.
> 
> Tested on sam9x60-curiosity board.
> 
> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u

Why this link here?

> Signed-off-by: Alexander Dahl <ada@thorsis.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

> ---
> 
> Notes:
>      v3:
>      - Rewrap lines
>      
>      v2:
>      - Rewrite to enable _all_ clocks defined in dts
> 
>   drivers/nvmem/microchip-otpc.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> index d39f2d57e5f5e..34c0d7611f3e4 100644
> --- a/drivers/nvmem/microchip-otpc.c
> +++ b/drivers/nvmem/microchip-otpc.c
> @@ -8,6 +8,7 @@
>    */
>   
>   #include <linux/bitfield.h>
> +#include <linux/clk.h>
>   #include <linux/iopoll.h>
>   #include <linux/module.h>
>   #include <linux/nvmem-provider.h>
> @@ -241,6 +242,7 @@ static struct nvmem_config mchp_nvmem_config = {
>   static int mchp_otpc_probe(struct platform_device *pdev)
>   {
>   	struct nvmem_device *nvmem;
> +	struct clk_bulk_data *clks;
>   	struct mchp_otpc *otpc;
>   	u32 size;
>   	int ret;
> @@ -253,6 +255,10 @@ static int mchp_otpc_probe(struct platform_device *pdev)
>   	if (IS_ERR(otpc->base))
>   		return PTR_ERR(otpc->base);
>   
> +	ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks);
> +	if (ret < 0)
> +		return dev_err_probe(&pdev->dev, ret, "Error getting clocks!\n");
> +
>   	otpc->dev = &pdev->dev;
>   	ret = mchp_otpc_init_packets_list(otpc, &size);
>   	if (ret)

Re: [PATCH v3 14/19] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device

[Claudiu Beznea]

On 1/20/26 17:44, Alexander Dahl wrote:
> For SAM9X60 the Product UID x Register containing the Unique Product ID
> is part of the OTPC registers. 

SAMA7G5 as well.

> We have everything at hand here to just
> create a trivial nvmem device for those.

Please massage a bit the patch description to match 
https://www.kernel.org/doc/html/v6.13/process/submitting-patches.html#describe-your-changes

> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> 
> Notes:
>      v3:
>      - no changes
>      
>      v2:
>      - Use dev_err_probe() for error reporting (thanks Claudiu)
>      - Move required register definition over here from removed patch
> 
>   drivers/nvmem/microchip-otpc.c | 38 +++++++++++++++++++++++++++++++++-
>   1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> index 34c0d7611f3e4..b35ed13b004bb 100644
> --- a/drivers/nvmem/microchip-otpc.c
> +++ b/drivers/nvmem/microchip-otpc.c
> @@ -25,10 +25,14 @@
>   #define MCHP_OTPC_HR			(0x20)
>   #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
>   #define MCHP_OTPC_DR			(0x24)
> +#define MCHP_OTPC_UID0R			(0x60)
>   
>   #define MCHP_OTPC_NAME			"mchp-otpc"
>   #define MCHP_OTPC_SIZE			(11 * 1024)
>   
> +#define MCHP_OTPC_UID_NAME		"mchp-uid"
> +#define MCHP_OTPC_UID_SIZE		16

I think you can drop these as they are used (individually) in a single place.

> +
>   /**
>    * struct mchp_otpc - OTPC private data structure
>    * @base: base address
> @@ -230,6 +234,16 @@ static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
>   	return 0;
>   }
>   
> +static int mchp_otpc_uid_read(void *priv, unsigned int offset,
> +			      void *val, size_t bytes)
> +{
> +	struct mchp_otpc *otpc = priv;
> +
> +	memcpy_fromio(val, otpc->base + MCHP_OTPC_UID0R + offset, bytes);

Include <asm-generic/logic_io.h> for this one?

> +
> +	return 0;
> +}
> +
>   static struct nvmem_config mchp_nvmem_config = {
>   	.name = MCHP_OTPC_NAME,
>   	.type = NVMEM_TYPE_OTP,
> @@ -239,6 +253,15 @@ static struct nvmem_config mchp_nvmem_config = {
>   	.reg_read = mchp_otpc_read,
>   };
>   
> +static struct nvmem_config mchp_otpc_uid_nvmem_config = {
> +	.name = MCHP_OTPC_UID_NAME,

Should the type be filled here?


> +	.read_only = true,
> +	.word_size = 4,
> +	.stride = 4,
> +	.size = MCHP_OTPC_UID_SIZE,
> +	.reg_read = mchp_otpc_uid_read,
> +};
> +
>   static int mchp_otpc_probe(struct platform_device *pdev)
>   {
>   	struct nvmem_device *nvmem;
> @@ -269,8 +292,21 @@ static int mchp_otpc_probe(struct platform_device *pdev)
>   	mchp_nvmem_config.size = size;
>   	mchp_nvmem_config.priv = otpc;
>   	nvmem = devm_nvmem_register(&pdev->dev, &mchp_nvmem_config);
> +	if (IS_ERR(nvmem)) {
> +		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
> +				     "Error registering OTP as nvmem device\n");
> +	}
>   
> -	return PTR_ERR_OR_ZERO(nvmem);
> +	mchp_otpc_uid_nvmem_config.dev = otpc->dev;
> +	mchp_otpc_uid_nvmem_config.priv = otpc;
> +
> +	nvmem = devm_nvmem_register(&pdev->dev, &mchp_otpc_uid_nvmem_config);
> +	if (IS_ERR(nvmem)) {
> +		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
> +				     "Error registering UIDxR as nvmem device\n");
> +	}
> +
> +	return 0;
>   }
>   
>   static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {

Re: [PATCH v3 03/19] dt-bindings: clock: at91: Allow referencing main rc oscillator in DT

[Alexander Dahl]

Hello Claudiu,

Am Sat, Jan 31, 2026 at 05:44:18PM +0200 schrieb Claudiu Beznea:
> Hi, Alexander,
> 
> On 1/20/26 16:37, Alexander Dahl wrote:
> > The main rc oscillator will be needed for the OTPC to work properly.
> > 
> > The new index introduced here was not used on the four affected SoC
> > clock drivers before, but for sama5d2 only (PMC_I2S1_MUX).
> > 
> > Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
> > Signed-off-by: Alexander Dahl <ada@thorsis.com>
> > ---
> > 
> > Notes:
> >      v3:
> >      - adapt to different base changes, added lines are the same
> >      v2:
> >      - new patch, not present in v1
> > 
> >   include/dt-bindings/clock/microchip,sam9x60-pmc.h  | 1 +
> >   include/dt-bindings/clock/microchip,sam9x7-pmc.h   | 1 +
> >   include/dt-bindings/clock/microchip,sama7d65-pmc.h | 1 +
> >   include/dt-bindings/clock/microchip,sama7g5-pmc.h  | 1 +
> >   4 files changed, 4 insertions(+)
> > 
> > diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> > index 91f8f863ea076..1f6bb51780d09 100644
> > --- a/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> > +++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
> > @@ -10,6 +10,7 @@
> >   #define SAM9X60_PMC_MCK		1
> >   #define SAM9X60_PMC_UTMI	2
> >   #define SAM9X60_PMC_MAIN	3
> > +#define SAM9X60_PMC_MAIN_RC	6
> 
> Why 6 and not another index? In theory, now, you should be able to define
> here all the core clocks IDs (as these are known from the manuals) and
> prepare the driver to allocate memory for all of them such that the driver
> will have to be able to work with old and new device trees w/o further
> changes.

Was the first common free index for these four clocks.  Before split
up would have been nice to have a common index, because it was all
together in include/dt-bindings/clock/at91.h in one file.  After
splitup one could just use the first free index, as Krzysztof already
suggested.

From my reading of the SAM9X60 manual, there's no such thing as core
clock IDs in the manual.  If there is a section in the manual, please
point it out.

From my interpretation for SAM9X60 these clocks are provided by the
clock generator (section 40 in the manual):

- TD_SLCK
- MD_SLCK
- MAINCK
- UPLLCK
- PLLACK

The "main rc oscillator" clock is somewhat internal here, but for OTPC
we must be able to enable it.

MCK (not MAINCK) is generated in the Processor Clock Controller block
of the PMC (section 41 in the manual) from one of the above clocks.

So it's all mixed up from different blocks from Clock Generator and
Power Management Controller already.  These indexes are
arbitrary and just for the driver, right?  Or am I missing something?

Besides, if it is renamed now anyway:

- Why that PMC prefix? (most of these core clocks come from the
  clock controller, not the pmc)

- Why not rename PMC_UTMI to something like xyz_UPLLCK to match the
  datasheet/manual (likewise for the other definitions)?

Greets
Alex

> 
> >   #define SAM9X60_PMC_PLLACK	7
> >   #endif
> > diff --git a/include/dt-bindings/clock/microchip,sam9x7-pmc.h b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> > index e1dd41fe75046..657f32ce10071 100644
> > --- a/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> > +++ b/include/dt-bindings/clock/microchip,sam9x7-pmc.h
> > @@ -10,6 +10,7 @@
> >   #define SAM9X7_PMC_MCK		1
> >   #define SAM9X7_PMC_UTMI		2
> >   #define SAM9X7_PMC_MAIN		3
> > +#define SAM9X7_PMC_MAIN_RC	6
> >   #define SAM9X7_PMC_PLLACK	7
> >   #define SAM9X7_PMC_AUDIOPMCPLL	9
> >   #define SAM9X7_PMC_AUDIOIOPLL	10
> > diff --git a/include/dt-bindings/clock/microchip,sama7d65-pmc.h b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> > index 09d152da6db44..ddcb236718978 100644
> > --- a/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> > +++ b/include/dt-bindings/clock/microchip,sama7d65-pmc.h
> > @@ -12,6 +12,7 @@
> >   #define SAMA7D65_PMC_MAIN		3
> >   #define SAMA7D65_PMC_CPUPLL		4
> >   #define SAMA7D65_PMC_SYSPLL		5
> > +#define SAMA7D65_PMC_MAIN_RC		6
> 
> E.g. 6 was previously reserved for DDR and IMG PLLs.
> 
> >   #define SAMA7D65_PMC_BAUDPLL		8
> >   #define SAMA7D65_PMC_AUDIOPMCPLL	9
> >   #define SAMA7D65_PMC_AUDIOIOPLL		10
> > diff --git a/include/dt-bindings/clock/microchip,sama7g5-pmc.h b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> > index 0303cae56f849..e891715a35173 100644
> > --- a/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> > +++ b/include/dt-bindings/clock/microchip,sama7g5-pmc.h
> > @@ -12,6 +12,7 @@
> >   #define SAMA7G5_PMC_MAIN	3
> >   #define SAMA7G5_PMC_CPUPLL	4
> >   #define SAMA7G5_PMC_SYSPLL	5
> > +#define SAMA7G5_PMC_MAIN_RC	6
> >   #define SAMA7G5_PMC_AUDIOPMCPLL	9
> >   #define SAMA7G5_PMC_AUDIOIOPLL	10
> >   #define SAMA7G5_PMC_MCK1	13
> 

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Alexander Dahl]

Hello Claudiu,

Am Sat, Jan 31, 2026 at 05:47:05PM +0200 schrieb Claudiu Beznea:
> 
> 
> On 1/20/26 17:44, Alexander Dahl wrote:
> > The OTPC requires both the peripheral clock through PMC and the main RC
> > oscillator.  Seemed to work without explicitly enabling those clocks on
> > sama7g5 before, but did not on sam9x60.
> > 
> > Older datasheets were not clear and explicit about this, but recent are,
> > e.g. SAMA7G5 series datasheet (DS60001765B),
> > section 30.4.1 Power Management:
> > 
> > > The OTPC is clocked through the Power Management Controller (PMC).
> > > The user must power on the main RC oscillator and enable the
> > > peripheral clock of the OTPC prior to reading or writing the OTP
> > > memory.
> 
> As this was not mentioned in the previous datasheet versions, the current
> driver don't handle those clocks, and it probably worked as the clocks were
> enabled by bootloaders, I think the clocks should be marked as required and
> this patch to be propagated as a fix along with fixes on driver and device
> trees.

What do you mean by "clocks should be marked as required"?  Where?
How?  Is something more necessary, than already done here?

> I'll let DT binding maintainers for the final decision on this.
> 
> > 
> > Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
> 
> Why this link here?

That was the original discussion and at the time the sama7g5 datasheet
mentioned a thing missing in the sam9x60 datasheet.  So that
discussion was the only reference for why this change is needed for
sam9x60.  Will drop the line in v4 then.

Greets
Alex

> 
> > Signed-off-by: Alexander Dahl <ada@thorsis.com>
> > ---
> > 
> > Notes:
> >      v3:
> >      - Removed clock-names (led to confusion, and not used by the driver anyways)
> >      - Removed redundant example
> >      v2:
> >      - new patch, not present in v1
> > 
> >   .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml | 8 ++++++++
> >   1 file changed, 8 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> > index 9a7aaf64eef32..847dfb67c6b72 100644
> > --- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> > +++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> > @@ -29,6 +29,11 @@ properties:
> >     reg:
> >       maxItems: 1
> > +  clocks:
> > +    items:
> > +      - description: main rc oscillator
> > +      - description: otpc peripheral clock
> > +
> >   required:
> >     - compatible
> >     - reg
> > @@ -37,6 +42,8 @@ unevaluatedProperties: false
> >   examples:
> >     - |
> > +    #include <dt-bindings/clock/at91.h>
> > +    #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
> >       #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
> >       otpc: efuse@e8c00000 {
> > @@ -44,6 +51,7 @@ examples:
> >           reg = <0xe8c00000 0xec>;
> >           #address-cells = <1>;
> >           #size-cells = <1>;
> > +        clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
> >           temperature_calib: calib@1 {
> >               reg = <OTP_PKT(1) 76>;
> 

Re: [PATCH v3 14/19] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device

[Alexander Dahl]

Hello Claudiu,

thanks for your feedback on this, see my remarks inline below.

Am Sat, Jan 31, 2026 at 06:11:56PM +0200 schrieb Claudiu Beznea:
> 
> 
> On 1/20/26 17:44, Alexander Dahl wrote:
> > For SAM9X60 the Product UID x Register containing the Unique Product ID
> > is part of the OTPC registers.
> 
> SAMA7G5 as well.
> 
> > We have everything at hand here to just
> > create a trivial nvmem device for those.
> 
> Please massage a bit the patch description to match https://www.kernel.org/doc/html/v6.13/process/submitting-patches.html#describe-your-changes
> 
> > 
> > Signed-off-by: Alexander Dahl <ada@thorsis.com>
> > ---
> > 
> > Notes:
> >      v3:
> >      - no changes
> >      v2:
> >      - Use dev_err_probe() for error reporting (thanks Claudiu)
> >      - Move required register definition over here from removed patch
> > 
> >   drivers/nvmem/microchip-otpc.c | 38 +++++++++++++++++++++++++++++++++-
> >   1 file changed, 37 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> > index 34c0d7611f3e4..b35ed13b004bb 100644
> > --- a/drivers/nvmem/microchip-otpc.c
> > +++ b/drivers/nvmem/microchip-otpc.c
> > @@ -25,10 +25,14 @@
> >   #define MCHP_OTPC_HR			(0x20)
> >   #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
> >   #define MCHP_OTPC_DR			(0x24)
> > +#define MCHP_OTPC_UID0R			(0x60)
> >   #define MCHP_OTPC_NAME			"mchp-otpc"
> >   #define MCHP_OTPC_SIZE			(11 * 1024)
> > +#define MCHP_OTPC_UID_NAME		"mchp-uid"
> > +#define MCHP_OTPC_UID_SIZE		16
> 
> I think you can drop these as they are used (individually) in a single place.

If you don't mind I would rather keep it here together with already
present similar definitions, instead of sprinkling new literals over
this c file.

> 
> > +
> >   /**
> >    * struct mchp_otpc - OTPC private data structure
> >    * @base: base address
> > @@ -230,6 +234,16 @@ static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
> >   	return 0;
> >   }
> > +static int mchp_otpc_uid_read(void *priv, unsigned int offset,
> > +			      void *val, size_t bytes)
> > +{
> > +	struct mchp_otpc *otpc = priv;
> > +
> > +	memcpy_fromio(val, otpc->base + MCHP_OTPC_UID0R + offset, bytes);
> 
> Include <asm-generic/logic_io.h> for this one?

Yes, include what you use, I'd add `#include <linux/io.h>` then, seems
the usual way in drivers/nvmem.

> 
> > +
> > +	return 0;
> > +}
> > +
> >   static struct nvmem_config mchp_nvmem_config = {
> >   	.name = MCHP_OTPC_NAME,
> >   	.type = NVMEM_TYPE_OTP,
> > @@ -239,6 +253,15 @@ static struct nvmem_config mchp_nvmem_config = {
> >   	.reg_read = mchp_otpc_read,
> >   };
> > +static struct nvmem_config mchp_otpc_uid_nvmem_config = {
> > +	.name = MCHP_OTPC_UID_NAME,
> 
> Should the type be filled here?

In general I would say yes, but looking at `enum nvmem_type` none of
them seems to match.  IIRC I more or less copied the approach from
drivers/soc/atmel/sfr.c here.

Greets
Alex

> 
> 
> > +	.read_only = true,
> > +	.word_size = 4,
> > +	.stride = 4,
> > +	.size = MCHP_OTPC_UID_SIZE,
> > +	.reg_read = mchp_otpc_uid_read,
> > +};
> > +
> >   static int mchp_otpc_probe(struct platform_device *pdev)
> >   {
> >   	struct nvmem_device *nvmem;
> > @@ -269,8 +292,21 @@ static int mchp_otpc_probe(struct platform_device *pdev)
> >   	mchp_nvmem_config.size = size;
> >   	mchp_nvmem_config.priv = otpc;
> >   	nvmem = devm_nvmem_register(&pdev->dev, &mchp_nvmem_config);
> > +	if (IS_ERR(nvmem)) {
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
> > +				     "Error registering OTP as nvmem device\n");
> > +	}
> > -	return PTR_ERR_OR_ZERO(nvmem);
> > +	mchp_otpc_uid_nvmem_config.dev = otpc->dev;
> > +	mchp_otpc_uid_nvmem_config.priv = otpc;
> > +
> > +	nvmem = devm_nvmem_register(&pdev->dev, &mchp_otpc_uid_nvmem_config);
> > +	if (IS_ERR(nvmem)) {
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
> > +				     "Error registering UIDxR as nvmem device\n");
> > +	}
> > +
> > +	return 0;
> >   }
> >   static const struct of_device_id __maybe_unused mchp_otpc_ids[] = {
> 

Re: [PATCH v3 14/19] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device

[Claudiu Beznea]

Hi, Alexander,

On 2/20/26 12:38, Alexander Dahl wrote:
> Hello Claudiu,
> 
> thanks for your feedback on this, see my remarks inline below.
> 
> Am Sat, Jan 31, 2026 at 06:11:56PM +0200 schrieb Claudiu Beznea:
>>
>>
>> On 1/20/26 17:44, Alexander Dahl wrote:
>>> For SAM9X60 the Product UID x Register containing the Unique Product ID
>>> is part of the OTPC registers.
>>
>> SAMA7G5 as well.
>>
>>> We have everything at hand here to just
>>> create a trivial nvmem device for those.
>>
>> Please massage a bit the patch description to match https://www.kernel.org/doc/html/v6.13/process/submitting-patches.html#describe-your-changes
>>
>>>
>>> Signed-off-by: Alexander Dahl <ada@thorsis.com>
>>> ---
>>>
>>> Notes:
>>>       v3:
>>>       - no changes
>>>       v2:
>>>       - Use dev_err_probe() for error reporting (thanks Claudiu)
>>>       - Move required register definition over here from removed patch
>>>
>>>    drivers/nvmem/microchip-otpc.c | 38 +++++++++++++++++++++++++++++++++-
>>>    1 file changed, 37 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
>>> index 34c0d7611f3e4..b35ed13b004bb 100644
>>> --- a/drivers/nvmem/microchip-otpc.c
>>> +++ b/drivers/nvmem/microchip-otpc.c
>>> @@ -25,10 +25,14 @@
>>>    #define MCHP_OTPC_HR			(0x20)
>>>    #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
>>>    #define MCHP_OTPC_DR			(0x24)
>>> +#define MCHP_OTPC_UID0R			(0x60)
>>>    #define MCHP_OTPC_NAME			"mchp-otpc"
>>>    #define MCHP_OTPC_SIZE			(11 * 1024)
>>> +#define MCHP_OTPC_UID_NAME		"mchp-uid"
>>> +#define MCHP_OTPC_UID_SIZE		16
>>
>> I think you can drop these as they are used (individually) in a single place.
> 
> If you don't mind I would rather keep it here together with already
> present similar definitions, instead of sprinkling new literals over
> this c file.

OK for me.

Thank you,
Claudiu

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Claudiu Beznea]

Hi, Alexander,

On 2/20/26 11:58, Alexander Dahl wrote:
> Hello Claudiu,
> 
> Am Sat, Jan 31, 2026 at 05:47:05PM +0200 schrieb Claudiu Beznea:
>>
>>
>> On 1/20/26 17:44, Alexander Dahl wrote:
>>> The OTPC requires both the peripheral clock through PMC and the main RC
>>> oscillator.  Seemed to work without explicitly enabling those clocks on
>>> sama7g5 before, but did not on sam9x60.
>>>
>>> Older datasheets were not clear and explicit about this, but recent are,
>>> e.g. SAMA7G5 series datasheet (DS60001765B),
>>> section 30.4.1 Power Management:
>>>
>>>> The OTPC is clocked through the Power Management Controller (PMC).
>>>> The user must power on the main RC oscillator and enable the
>>>> peripheral clock of the OTPC prior to reading or writing the OTP
>>>> memory.
>>
>> As this was not mentioned in the previous datasheet versions, the current
>> driver don't handle those clocks, and it probably worked as the clocks were
>> enabled by bootloaders, I think the clocks should be marked as required and
>> this patch to be propagated as a fix along with fixes on driver and device
>> trees.
> 
> What do you mean by "clocks should be marked as required"?  Where?

In the bindings as you found that the IP don't work if the clocks are not enabled?

> How?  Is something more necessary, than already done here?

Update the required section in the yaml file with clocks, at least for the 
sam9x60, as you found it is not working w/o it.

I presume it has to be done for SAMA7G5 as well (as this is what the newer 
datasheets states) but that would involve adding required clocks now which were 
not needed later. I'm not sure what is the procedure here. I'll let DT 
maintainers comment on this.

Thank you,
Claudiu

Re: [PATCH v3 03/19] dt-bindings: clock: at91: Allow referencing main rc oscillator in DT

[Claudiu Beznea]

Hi, Alexander,

Sorry for the late reply.

On 2/9/26 10:08, Alexander Dahl wrote:
> Hello Claudiu,
> 
> Am Sat, Jan 31, 2026 at 05:44:18PM +0200 schrieb Claudiu Beznea:
>> Hi, Alexander,
>>
>> On 1/20/26 16:37, Alexander Dahl wrote:
>>> The main rc oscillator will be needed for the OTPC to work properly.
>>>
>>> The new index introduced here was not used on the four affected SoC
>>> clock drivers before, but for sama5d2 only (PMC_I2S1_MUX).
>>>
>>> Link: https://lore.kernel.org/linux-devicetree/20250207-jailbird-circus-bcc04ee90e05@thorsis.com/T/#u
>>> Signed-off-by: Alexander Dahl <ada@thorsis.com>
>>> ---
>>>
>>> Notes:
>>>       v3:
>>>       - adapt to different base changes, added lines are the same
>>>       v2:
>>>       - new patch, not present in v1
>>>
>>>    include/dt-bindings/clock/microchip,sam9x60-pmc.h  | 1 +
>>>    include/dt-bindings/clock/microchip,sam9x7-pmc.h   | 1 +
>>>    include/dt-bindings/clock/microchip,sama7d65-pmc.h | 1 +
>>>    include/dt-bindings/clock/microchip,sama7g5-pmc.h  | 1 +
>>>    4 files changed, 4 insertions(+)
>>>
>>> diff --git a/include/dt-bindings/clock/microchip,sam9x60-pmc.h b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
>>> index 91f8f863ea076..1f6bb51780d09 100644
>>> --- a/include/dt-bindings/clock/microchip,sam9x60-pmc.h
>>> +++ b/include/dt-bindings/clock/microchip,sam9x60-pmc.h
>>> @@ -10,6 +10,7 @@
>>>    #define SAM9X60_PMC_MCK		1
>>>    #define SAM9X60_PMC_UTMI	2
>>>    #define SAM9X60_PMC_MAIN	3
>>> +#define SAM9X60_PMC_MAIN_RC	6
>>
>> Why 6 and not another index? In theory, now, you should be able to define
>> here all the core clocks IDs (as these are known from the manuals) and
>> prepare the driver to allocate memory for all of them such that the driver
>> will have to be able to work with old and new device trees w/o further
>> changes.
> 
> Was the first common free index for these four clocks.  Before split
> up would have been nice to have a common index, because it was all
> together in include/dt-bindings/clock/at91.h in one file.  After
> splitup one could just use the first free index, as Krzysztof already
> suggested.

OK, sounds good.

> 
>  From my reading of the SAM9X60 manual, there's no such thing as core
> clock IDs in the manual.  If there is a section in the manual, please
> point it out.

There is no such section, AFAIK.

> 
>  From my interpretation for SAM9X60 these clocks are provided by the
> clock generator (section 40 in the manual):
> 
> - TD_SLCK
> - MD_SLCK
> - MAINCK
> - UPLLCK
> - PLLACK
> 
> The "main rc oscillator" clock is somewhat internal here, but for OTPC
> we must be able to enable it.
> 
> MCK (not MAINCK) is generated in the Processor Clock Controller block
> of the PMC (section 41 in the manual) from one of the above clocks.
> 
> So it's all mixed up from different blocks from Clock Generator and
> Power Management Controller already.  These indexes are
> arbitrary and just for the driver, right?  Or am I missing something?

If I got your question, some are only internally (currently), some are also used 
by DT (e.g. the PLL ones).

> 
> Besides, if it is renamed now anyway:
> 
> - Why that PMC prefix? (most of these core clocks come from the
>    clock controller, not the pmc)

The control interface for all of them are on PMC. So, they are all considered to 
be part of the PMC. From manual, chapter "Description" of "Clock generator":
The Clock Generator user interface is embedded within the Power Management 
Controller and is described in the

> 
> - Why not rename PMC_UTMI to something like xyz_UPLLCK to match the
>    datasheet/manual (likewise for the other definitions)?

That could be done for the SoCs where this applies.

Thank you,
Claudiu

Re: [PATCH v3 09/19] dt-bindings: nvmem: microchip-otpc: Add required clocks

[Claudiu Beznea]

+ Alexander Dahl

On 3/8/26 18:42, Claudiu Beznea wrote:
> Hi, Alexander,
> 
> On 2/20/26 11:58, Alexander Dahl wrote:
>> Hello Claudiu,
>>
>> Am Sat, Jan 31, 2026 at 05:47:05PM +0200 schrieb Claudiu Beznea:
>>>
>>>
>>> On 1/20/26 17:44, Alexander Dahl wrote:
>>>> The OTPC requires both the peripheral clock through PMC and the main RC
>>>> oscillator.  Seemed to work without explicitly enabling those clocks on
>>>> sama7g5 before, but did not on sam9x60.
>>>>
>>>> Older datasheets were not clear and explicit about this, but recent are,
>>>> e.g. SAMA7G5 series datasheet (DS60001765B),
>>>> section 30.4.1 Power Management:
>>>>
>>>>> The OTPC is clocked through the Power Management Controller (PMC).
>>>>> The user must power on the main RC oscillator and enable the
>>>>> peripheral clock of the OTPC prior to reading or writing the OTP
>>>>> memory.
>>>
>>> As this was not mentioned in the previous datasheet versions, the current
>>> driver don't handle those clocks, and it probably worked as the clocks were
>>> enabled by bootloaders, I think the clocks should be marked as required and
>>> this patch to be propagated as a fix along with fixes on driver and device
>>> trees.
>>
>> What do you mean by "clocks should be marked as required"?  Where?
> 
> In the bindings as you found that the IP don't work if the clocks are not enabled?
> 
>> How?  Is something more necessary, than already done here?
> 
> Update the required section in the yaml file with clocks, at least for the 
> sam9x60, as you found it is not working w/o it.
> 
> I presume it has to be done for SAMA7G5 as well (as this is what the newer 
> datasheets states) but that would involve adding required clocks now which were 
> not needed later. I'm not sure what is the procedure here. I'll let DT 
> maintainers comment on this.
> 
> Thank you,
> Claudiu
>