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Thu, 22 Jan 2026 03:29:16 -0800 (PST) Received: from skbuf ([2a02:2f04:d501:d900:7677:83bc:43db:13ae]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4356996cf58sm44986696f8f.22.2026.01.22.03.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jan 2026 03:29:16 -0800 (PST) Date: Thu, 22 Jan 2026 13:29:13 +0200 From: Vladimir Oltean To: "Russell King (Oracle)" Cc: Jakub Kicinski , linux-phy@lists.infradead.org, davem@davemloft.net, maxime.chevallier@bootlin.com, alexandre.torgue@foss.st.com, mohd.anwar@oss.qualcomm.com, neil.armstrong@linaro.org, hkallweit1@gmail.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, edumazet@google.com, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, vkoul@kernel.org, andrew@lunn.ch, pabeni@redhat.com, andrew+netdev@lunn.ch, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [net-next,05/14] net: stmmac: add stmmac core serdes support Message-ID: <20260122112913.svzaie4eywk5nc32@skbuf> References: <20260119192125.1245102-1-kuba@kernel.org> <20260120081844.7e6aq2urhxrylywi@skbuf> <20260120121114.2aedgu42i2wax3yp@skbuf> <20260121162345.4jpzvwqhfqxd7tl7@skbuf> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260122_032919_329291_10D8EA78 X-CRM114-Status: GOOD ( 41.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jan 21, 2026 at 05:33:28PM +0000, Russell King (Oracle) wrote: > On Wed, Jan 21, 2026 at 06:23:45PM +0200, Vladimir Oltean wrote: > > On Wed, Jan 21, 2026 at 02:46:42PM +0000, Russell King (Oracle) wrote: > > > On Tue, Jan 20, 2026 at 02:11:14PM +0200, Vladimir Oltean wrote: > > > > On Tue, Jan 20, 2026 at 10:12:46AM +0000, Russell King (Oracle) wrote: > > > > > First, I'll say I'm on a very short fuse today; no dinner last night, > > > > > at the hospital up until 5:30am, and a fucking cold caller rang the door > > > > > bell at 10am this morning. Just fucking our luck. > > > > > > > > Sorry to hear that. > > > > > > > > > On Tue, Jan 20, 2026 at 10:18:44AM +0200, Vladimir Oltean wrote: > > > > > > Isn't it sufficient to set pl->pcs to NULL when pcs_enable() fails and > > > > > > after calling pcs_disable(), though? > > > > > > > > > > No. We've already called mac_prepare(), pcs_pre_config(), > > > > > pcs_post_config() by this time, we're past the point of being able to > > > > > unwind. > > > > > > > > I'm set out to resolve a much smaller problem. > > > > > > > > Calling it a full "unwind" is perhaps a bit much, because pcs_pre_config() > > > > and pcs_post_config() don't have unwinding equivalents, unlike how > > > > pcs_enable() has pcs_disable(). I don't see what API convention would be > > > > violated if phylink decided to drop a PCS whose enable() returned an error. > > > > > > While pcs_pre_config() and pcs_post_config() do not have unwinding > > > equivalents (what would they be?) the issue here is that these could > > > have changed any state that isn't simply undone by calling > > > pcs_disable(). > > > > > > For example, pcs_pre_config() could have reprogrammed signal routing, > > > clocking, or power supplies to blocks. > > > > > > This already applies to Marvell DSA pcs-639x.c, where the pre/post > > > config hooks change the power state of the PCS block (for errata > > > handling), and the only way that gets undone is via a call to > > > pcs_disable() which explicitly disables IRQs and power for the PCS. Its > > > pcs_disable() isn't a strict reversal of pcs_enable(), it does more. > > > > > > We already declare the interface to be dead on pcs_post_config() > > > failure, but we don't do that for pcs_enable() failure. > > > > > > Maybe I need to explicitly state that pcs_disable() does not directly > > > balance pcs_enable(), but that _and_ the effects of pcs_pre_config() > > > and pcs_post_config(). However, that itself will add to the problems. > > > What if pcs_pre_config() and pcs_post_config() succeed but not > > > pcs_enable()? pcs-639x needs pcs_disable() to be called, but if we > > > require pcs_disable() to be balanced with a successful call to > > > pcs_enable(), that messes up that driver, and pretty much makes it > > > impossible to work around the errata. > > > > What if we reordered phylink_major_config() such that phylink_pcs_enable() > > comes first, followed by phylink_pcs_pre_config() -> phylink_mac_config() -> > > phylink_pcs_post_config()? Superficially looking at pcs-639x, I don't > > think it would break. > > I'm sorry, but I don't have time to continue this discussion today. I > woke late, we're trying to cram in the meals (in the middle of delayed > lunch-time dinner right now), work wants a quick call to discuss a > project that I missed the meeting for yesterday (which I haven't yet > had time for...) > > Sorry, but while you may wish to get this sorted, for me this is a very > low priority issue that can be addressed later. Don't think I will have > time to review anything you send - and that's not a personal attack, > it's because I'm barely managing to hold everything together at my > end, and I don't have the time. Thanks, this was a good talk, I understood a bit more about the challenges that need to be overcome. I'll do some testing on the Turris MOX with a 6390 switch. From my side this shouldn't block the stmmac integrated PCS from being integrated with the SerDes, but I do agree that leaving a comment explaining the current phylink_pcs calling convention, as Jakub requested, would be very useful.