From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2E09D2FEF0 for ; Tue, 27 Jan 2026 21:47:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=MsGunHqUs2STdmqxGd5hiAtRlOXAptQU2J22m1qy7BU=; b=qNK1aVhvDsQDBv/r7OySf2e493 D4f+Hxl4uiZ8NbFIzA8rcfZ01vwUHrsoTiTYrY+fJPC7JcLSybAgHODqc/fKZwzLlCMKGdEwWCdpq 2q9z0suN/iTY0fKxkY9w56GU7aE0ljP6l+C2k4rFS55JgwljxcuTk1676Wa+mksscOwR5BlWNUqi3 SFdknDK8FhS6BaMv7AqsryjkJywNxm2xp8YF37hvX7uQJcvvFfYUNQXwYS9Btji/Jf1GLCq0kd8df P15roBhphpRmYnhGnkLx5SzIxnTUGJIG++jPEBVwuUAPQpcocgA4lwbmwe6oKKYsVDEtdIlxlt08+ T+OMFwzA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vkqtz-0000000F4no-41L4; Tue, 27 Jan 2026 21:47:11 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vkqtw-0000000F4mQ-0ZFH for linux-arm-kernel@bombadil.infradead.org; Tue, 27 Jan 2026 21:47:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=MsGunHqUs2STdmqxGd5hiAtRlOXAptQU2J22m1qy7BU=; b=E+J0H9bUfozlj/zwWr2p4xRtdg qdlFvSMz/WmGijN4j3lpu2FAOry+pcEecrTEUdJap8s2s8SuFHv15XDr1AK63JXj9C0Eisc4PZyrx nvzuC+bVUk59lADjEOsxmZguN+H4zW03XI572C7DK2cJh8L/ycfqdz9IZEJ4JDP7IW2KE2wBgECvZ crZdd4FZdslJ9RRUXbAllWeyegB0opIFfqDTga4pelyHmZhEVjd5eW/FKgGdvtEDRMTDZp7+kgxs4 6b8TZtLMHMz8BhogDZKgm2e6h6YFXWyaESaEHULc62v7JD+VJ9eghO5xenTZiYDk21m0boJB/d38+ D0y1+JbA==; Received: from relay.smtp-ext.broadcom.com ([192.19.166.231]) by desiato.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vkqtr-00000007eee-1y9U for linux-arm-kernel@lists.infradead.org; Tue, 27 Jan 2026 21:47:07 +0000 Received: from mail-lvn-it-01.broadcom.com (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id B7644C000733; Tue, 27 Jan 2026 13:46:59 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com B7644C000733 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1769550419; bh=L374EcJRAc/qEjuY/FVQi+JhFU4/ncCIa2WaXKx/r3M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oHRqNqF+tyTHzIkMeUB9UZc25HkYip9O6CkZnbM8l9jwsOw3W7/6DgUtc3ABp0Lro Z7GNoVn2am/w2ZNt0f6/qEVhS6sZuOIWuogId44csbP7CF2lkUfAsCM34uRRgrVBXb 5KOcHb/haul/M3f7Ta63rDD+jEcnLZ+UJq7KTyC8= Received: from fainelli-desktop.igp.broadcom.net (fainelli-desktop.dhcp.broadcom.net [10.67.48.245]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail-lvn-it-01.broadcom.com (Postfix) with ESMTPSA id 9174D199D2; Tue, 27 Jan 2026 13:46:59 -0800 (PST) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Doug Berger , Florian Fainelli , Broadcom internal kernel review list , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Christophe Leroy , linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE) Subject: [PATCH v2 2/3] gpio: brcmstb: implement irq_mask_ack Date: Tue, 27 Jan 2026 13:46:55 -0800 Message-ID: <20260127214656.447333-3-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260127214656.447333-1-florian.fainelli@broadcom.com> References: <20260127214656.447333-1-florian.fainelli@broadcom.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260127_214703_817271_7D7E4B82 X-CRM114-Status: GOOD ( 14.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Doug Berger The irq_mask_ack operation is slightly more efficient than doing irq_mask and irq_ack separately. More importantly for this driver it bypasses the check of irqd_irq_masked ensuring a previously masked but still active interrupt gets remasked if unmasked at the hardware level. This allows the driver to more efficiently unmask the wake capable interrupts when quiescing without needing to enable the irqs individually to clear the irqd_irq_masked state. Signed-off-by: Doug Berger Co-developed-by: Florian Fainelli Signed-off-by: Florian Fainelli --- drivers/gpio/gpio-brcmstb.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 2352d099709c..bf0192b82276 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only -// Copyright (C) 2015-2017 Broadcom +// Copyright (C) 2015-2017, 2026 Broadcom #include #include @@ -95,15 +95,13 @@ static int brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq, return hwirq - bank->chip.gc.offset; } -static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, - unsigned int hwirq, bool enable) +static void __brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, + unsigned int hwirq, bool enable) { struct brcmstb_gpio_priv *priv = bank->parent_priv; u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(hwirq, bank)); u32 imask; - guard(gpio_generic_lock_irqsave)(&bank->chip); - imask = gpio_generic_read_reg(&bank->chip, priv->reg_base + GIO_MASK(bank->id)); if (enable) @@ -114,6 +112,13 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, priv->reg_base + GIO_MASK(bank->id), imask); } +static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, + unsigned int hwirq, bool enable) +{ + guard(gpio_generic_lock_irqsave)(&bank->chip); + __brcmstb_gpio_set_imask(bank, hwirq, enable); +} + static int brcmstb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) { struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc); @@ -135,6 +140,19 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d) brcmstb_gpio_set_imask(bank, d->hwirq, false); } +static void brcmstb_gpio_irq_mask_ack(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); + struct brcmstb_gpio_priv *priv = bank->parent_priv; + u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank)); + + guard(gpio_generic_lock_irqsave)(&bank->chip); + __brcmstb_gpio_set_imask(bank, d->hwirq, false); + gpio_generic_write_reg(&bank->chip, + priv->reg_base + GIO_STAT(bank->id), mask); +} + static void brcmstb_gpio_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); @@ -471,6 +489,7 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, priv->irq_chip.name = dev_name(dev); priv->irq_chip.irq_disable = brcmstb_gpio_irq_mask; priv->irq_chip.irq_mask = brcmstb_gpio_irq_mask; + priv->irq_chip.irq_mask_ack = brcmstb_gpio_irq_mask_ack; priv->irq_chip.irq_unmask = brcmstb_gpio_irq_unmask; priv->irq_chip.irq_ack = brcmstb_gpio_irq_ack; priv->irq_chip.irq_set_type = brcmstb_gpio_irq_set_type; -- 2.43.0