* [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander
@ 2026-01-29 7:37 Fred Chen
2026-02-09 5:45 ` Andrew Jeffery
0 siblings, 1 reply; 2+ messages in thread
From: Fred Chen @ 2026-01-29 7:37 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add CPLD-simulated IO expanders for cable presence detection and 4 SPI
flash control. To resolve sideband pin shortages, one IO expander is
utilized to aggregate interrupt signals.
Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
---
.../aspeed-bmc-facebook-santabarbara.dts | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 0a3e2e241063..39f7fade8ff7 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -1335,6 +1335,39 @@ eeprom@50 {
&i2c12 {
status = "okay";
+ ioexp0: gpio@20 {
+ compatible = "nxp,pca9555";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&sgpiom0>;
+ interrupts = <148 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "IOEXP_21h_INT_N","","","",
+ "","","","",
+ "","","","",
+ "","","","";
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9555";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&ioexp0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "PDB_PRSNT_J1_N","PDB_PRSNT_J2_N",
+ "PRSNT_NIC1_N","PRSNT_NIC2_N",
+ "PRSNT_NIC3_N","PRSNT_NIC4_N",
+ "SWB_PWR_FAULT_STATUS","",
+ "CBL_PRSNT_MCIO_0_N","CBL_PRSNT_MCIO_1_N",
+ "CBL_PRSNT_MCIO_2_N","CBL_PRSNT_MCIO_3_N",
+ "","","","";
+ };
+
gpio@27 {
compatible = "nxp,pca9555";
reg = <0x27>;
@@ -1349,6 +1382,21 @@ gpio@27 {
"SPI_MUX_SEL","","","";
};
+ gpio@28 {
+ compatible = "nxp,pca9555";
+ reg = <0x28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "SCO_UART_MUX_SEL0","SCO_UART_MUX_SEL1",
+ "SPI_PROG_PL12_SEL","SPI_PROG_PL34_SEL",
+ "","","","",
+ "I3C_HUB_3_MUX_SEL_PLD","",
+ "SPI_PROG_PL12_EN_N","SPI_PROG_PL34_EN_N",
+ "SCO1_SPI_SEL","SCO2_SPI_SEL",
+ "SCO3_SPI_SEL","SCO4_SPI_SEL";
+ };
+
// SWB FRU
eeprom@52 {
compatible = "atmel,24c64";
--
2.52.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander
2026-01-29 7:37 [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander Fred Chen
@ 2026-02-09 5:45 ` Andrew Jeffery
0 siblings, 0 replies; 2+ messages in thread
From: Andrew Jeffery @ 2026-02-09 5:45 UTC (permalink / raw)
To: Fred Chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
On Thu, 2026-01-29 at 15:37 +0800, Fred Chen wrote:
> Add CPLD-simulated IO expanders
>
If these are not genuine PCA9555 parts then I expect you should define
your own compatible string for the implementation which allows
nxp,pca9555 as a fallback. That way you can account for bugs in the
implementation either way (either in the kernel if updating the CPLD
firmware is not feasible in some situations, or by updating the
firmware when it is).
Andrew
> for cable presence detection and 4 SPI
> flash control. To resolve sideband pin shortages, one IO expander is
> utilized to aggregate interrupt signals.
>
> Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
> ---
> .../aspeed-bmc-facebook-santabarbara.dts | 48 +++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> index 0a3e2e241063..39f7fade8ff7 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
> @@ -1335,6 +1335,39 @@ eeprom@50 {
> &i2c12 {
> status = "okay";
>
> + ioexp0: gpio@20 {
> + compatible = "nxp,pca9555";
> + reg = <0x20>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupt-parent = <&sgpiom0>;
> + interrupts = <148 IRQ_TYPE_LEVEL_LOW>;
> + gpio-line-names =
> + "IOEXP_21h_INT_N","","","",
> + "","","","",
> + "","","","",
> + "","","","";
> + };
> +
> + gpio@21 {
> + compatible = "nxp,pca9555";
> + reg = <0x21>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-parent = <&ioexp0>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + gpio-line-names =
> + "PDB_PRSNT_J1_N","PDB_PRSNT_J2_N",
> + "PRSNT_NIC1_N","PRSNT_NIC2_N",
> + "PRSNT_NIC3_N","PRSNT_NIC4_N",
> + "SWB_PWR_FAULT_STATUS","",
> + "CBL_PRSNT_MCIO_0_N","CBL_PRSNT_MCIO_1_N",
> + "CBL_PRSNT_MCIO_2_N","CBL_PRSNT_MCIO_3_N",
> + "","","","";
> + };
> +
> gpio@27 {
> compatible = "nxp,pca9555";
> reg = <0x27>;
> @@ -1349,6 +1382,21 @@ gpio@27 {
> "SPI_MUX_SEL","","","";
> };
>
> + gpio@28 {
> + compatible = "nxp,pca9555";
> + reg = <0x28>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names =
> + "SCO_UART_MUX_SEL0","SCO_UART_MUX_SEL1",
> + "SPI_PROG_PL12_SEL","SPI_PROG_PL34_SEL",
> + "","","","",
> + "I3C_HUB_3_MUX_SEL_PLD","",
> + "SPI_PROG_PL12_EN_N","SPI_PROG_PL34_EN_N",
> + "SCO1_SPI_SEL","SCO2_SPI_SEL",
> + "SCO3_SPI_SEL","SCO4_SPI_SEL";
> + };
> +
> // SWB FRU
> eeprom@52 {
> compatible = "atmel,24c64";
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-01-29 7:37 [PATCH] ARM: dts: aspeed: santabarbara: Add swb cpld io expander Fred Chen
2026-02-09 5:45 ` Andrew Jeffery
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