[PATCH v6 0/5] Add support for S4 audio

[PATCH v6 0/5] Add support for S4 audio

[Jiebing Chen via B4 Relay]

This series completes the end-to-end audio support
for S4 SoC from hardware bindings to driver implementation
and system integration.

1 Device Tree Bindings Updates 
Added audio power domain and S4 audio clock support for S4 SoC.
Added S4 audio tocodec binding support.

2 Driver Implementation
Implemented S4 tocodec driver for G12A architecture.
Added S4 audio clock support in AXG audio clock 

3 Device Tree Integration
Add Amlogic S4 audio subsystem support in arm64 DTS.

Signed-off-by: jiebing chen <jiebing.chen@amlogic.com>
---
Changes in v6:
- Fix the problem of string for Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
- Remove clock pad register, and it will be submitted as an independent patch.
- Redescribe sound/soc/meson/g12a-toacodec.c
- Link to v5: https://lore.kernel.org/r/20250710-audio_drvier-v5-0-d4155f1e7464@amlogic.com

Changes in v5:
- Fix warning Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yam when make dt_binding_check
- The audio reg is mounted below the APB bus in dts file.
- Deal with pad clock in a distinct controller.
- Fix warning for sound/soc/meson/g12a-toacodec.c
- Link to v4: https://lore.kernel.org/r/20250319-audio_drvier-v4-0-686867fad719@amlogic.com

Changes in v4:
- fix dtb check warning 
- add maxItems of power domain for dt-bindings
- fixed audio clock pads regmap base and reg offset 
- use dapm widget to control tocodec bclk and mclk enable
- Link to v3: https://lore.kernel.org/r/20250228-audio_drvier-v3-0-dbfd30507e4c@amlogic.com

Changes in v3:
- remove g12a tocodec switch event
- Modify the incorrect title for dt-bindings
- Link to v2: https://lore.kernel.org/r/20250214-audio_drvier-v2-0-37881fa37c9e@amlogic.com

Changes in v2:
- remove tdm pad control and change tocodec base on g12a
- change hifipll rate to support 24bit
- add s4 audio clock
- Link to v1: https://lore.kernel.org/r/20250113-audio_drvier-v1-0-8c14770f38a0@amlogic.com

---
Jiebing Chen (5):
      dt-bindings: clock: meson: Add audio power domain for S4 soc
      dt-bindings: Asoc: axg-audio: Add S4 audio tocodec
      ASoC: meson: g12a-toacodec: Add S4 tocodec driver
      clk: meson: axg_audio: add S4 support
      arm64: dts: amlogic: Add Amlogic S4 Audio

 .../bindings/clock/amlogic,axg-audio-clkc.yaml     |  18 +-
 .../bindings/sound/amlogic,g12a-toacodec.yaml      |   1 +
 .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
 drivers/clk/meson/axg-audio.c                      | 165 ++++++++++
 sound/soc/meson/g12a-toacodec.c                    |  36 ++
 6 files changed, 801 insertions(+), 2 deletions(-)
---
base-commit: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d
change-id: 20250110-audio_drvier-07a5381c494b

Best regards,
-- 
jiebing chen <jiebing.chen@amlogic.com>

[PATCH v6 1/5] dt-bindings: clock: meson: Add audio power domain for S4 soc

[Jiebing Chen via B4 Relay]

From: Jiebing Chen <jiebing.chen@amlogic.com>

The audio power domain has been found on S4 device.
It must be enabled prior to audio operations.

Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
---
 .../bindings/clock/amlogic,axg-audio-clkc.yaml         | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
index fd7982dd4cea..1cd9a99e5ff3 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
@@ -20,6 +20,7 @@ properties:
     enum:
       - amlogic,axg-audio-clkc
       - amlogic,g12a-audio-clkc
+      - amlogic,s4-audio-clkc
       - amlogic,sm1-audio-clkc
 
   '#clock-cells':
@@ -99,7 +100,8 @@ properties:
 
   resets:
     description: internal reset line
-
+  power-domains:
+    maxItems: 1
 required:
   - compatible
   - '#clock-cells'
@@ -115,6 +117,7 @@ allOf:
           contains:
             enum:
               - amlogic,g12a-audio-clkc
+              - amlogic,s4-audio-clkc
               - amlogic,sm1-audio-clkc
     then:
       required:
@@ -122,7 +125,18 @@ allOf:
     else:
       properties:
         '#reset-cells': false
-
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amlogic,s4-audio-clkc
+    then:
+      required:
+        - power-domains
+    else:
+      properties:
+        power-domains: false
 additionalProperties: false
 
 examples:

-- 
2.52.0

[PATCH v6 2/5] dt-bindings: Asoc: axg-audio: Add S4 audio tocodec

[Jiebing Chen via B4 Relay]

From: Jiebing Chen <jiebing.chen@amlogic.com>

Add S4 SoC tocodec compatibility support.

Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
---
 Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml
index 23f82bb89750..7e053aaa0f59 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml
@@ -25,6 +25,7 @@ properties:
           - const: amlogic,g12a-toacodec
       - items:
           - enum:
+              - amlogic,s4-toacodec
               - amlogic,sm1-toacodec
           - const: amlogic,g12a-toacodec
 

-- 
2.52.0

[PATCH v6 3/5] ASoC: meson: g12a-toacodec: Add S4 tocodec driver

[Jiebing Chen via B4 Relay]

From: Jiebing Chen <jiebing.chen@amlogic.com>

The S4 requires additional clock control bits to be turn on while enabled.
The S4 has 8 TDM lanes, instead of 4 on previous SoC.
Update the widget accordingly.

Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
---
 sound/soc/meson/g12a-toacodec.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacodec.c
index a95375b53f0a..a7f9ac2d08f7 100644
--- a/sound/soc/meson/g12a-toacodec.c
+++ b/sound/soc/meson/g12a-toacodec.c
@@ -41,6 +41,9 @@
 #define  CTRL0_BCLK_SEL_LSB		4
 #define  CTRL0_MCLK_SEL			GENMASK(2, 0)
 
+#define CTRL0_BCLK_ENABLE_SHIFT		30
+#define CTRL0_MCLK_ENABLE_SHIFT		29
+
 #define TOACODEC_OUT_CHMAX		2
 
 struct g12a_toacodec {
@@ -141,6 +144,13 @@ static const struct snd_soc_dapm_widget sm1_toacodec_widgets[] = {
 			    &g12a_toacodec_out_enable),
 };
 
+static const struct snd_soc_dapm_widget s4_toacodec_widgets[] = {
+	SND_SOC_DAPM_MUX("SRC", TOACODEC_CTRL0, CTRL0_BCLK_ENABLE_SHIFT, 0,
+			 &sm1_toacodec_mux),
+	SND_SOC_DAPM_SWITCH("OUT EN", TOACODEC_CTRL0, CTRL0_MCLK_ENABLE_SHIFT, 0,
+			    &g12a_toacodec_out_enable),
+};
+
 static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
 					 struct snd_pcm_hw_params *params,
 					 struct snd_soc_dai *dai)
@@ -234,6 +244,10 @@ static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
 	SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
 };
 
+static const struct snd_kcontrol_new s4_toacodec_controls[] = {
+	SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 7, 0),
+};
+
 static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
 	.probe			= g12a_toacodec_component_probe,
 	.controls		= g12a_toacodec_controls,
@@ -256,6 +270,17 @@ static const struct snd_soc_component_driver sm1_toacodec_component_drv = {
 	.endianness		= 1,
 };
 
+static const struct snd_soc_component_driver s4_toacodec_component_drv = {
+	.probe			= sm1_toacodec_component_probe,
+	.controls		= s4_toacodec_controls,
+	.num_controls		= ARRAY_SIZE(s4_toacodec_controls),
+	.dapm_widgets		= s4_toacodec_widgets,
+	.num_dapm_widgets	= ARRAY_SIZE(s4_toacodec_widgets),
+	.dapm_routes		= g12a_toacodec_routes,
+	.num_dapm_routes	= ARRAY_SIZE(g12a_toacodec_routes),
+	.endianness		= 1,
+};
+
 static const struct regmap_config g12a_toacodec_regmap_cfg = {
 	.reg_bits	= 32,
 	.val_bits	= 32,
@@ -276,6 +301,13 @@ static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
 	.field_bclk_sel	= REG_FIELD(TOACODEC_CTRL0, 4, 6),
 };
 
+static const struct g12a_toacodec_match_data s4_toacodec_match_data = {
+	.component_drv	= &s4_toacodec_component_drv,
+	.field_dat_sel	= REG_FIELD(TOACODEC_CTRL0, 19, 20),
+	.field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 12, 14),
+	.field_bclk_sel	= REG_FIELD(TOACODEC_CTRL0, 4, 6),
+};
+
 static const struct of_device_id g12a_toacodec_of_match[] = {
 	{
 		.compatible = "amlogic,g12a-toacodec",
@@ -285,6 +317,10 @@ static const struct of_device_id g12a_toacodec_of_match[] = {
 		.compatible = "amlogic,sm1-toacodec",
 		.data = &sm1_toacodec_match_data,
 	},
+	{
+		.compatible = "amlogic,s4-toacodec",
+		.data = &s4_toacodec_match_data,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);

-- 
2.52.0

[PATCH v6 4/5] clk: meson: axg_audio: add S4 support

[Jiebing Chen via B4 Relay]

From: Jiebing Chen <jiebing.chen@amlogic.com>

Add S4 support the axg audio clock controllers, Compared with the
previous version, the selection of the audio's clock and data pad
will be designed in the form of pinmux control. The purpose of doing
this is to distinguish between clock control and pin control selection.

Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
---
 drivers/clk/meson/axg-audio.c | 165 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 165 insertions(+)

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index fd7eca652261..ab8c05b0509e 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -1150,6 +1150,159 @@ static struct clk_hw *g12a_audio_hw_clks[] = {
 	[AUD_CLKID_TOP]			= &axg_aud_top,
 };
 
+/*
+ * Array of all S4 clocks provided by this provider
+ * The input clocks of the controller will be populated at runtime
+ */
+static struct clk_hw *s4_audio_hw_clks[] = {
+	[AUD_CLKID_DDR_ARB]		= &ddr_arb.hw,
+	[AUD_CLKID_PDM]			= &pdm.hw,
+	[AUD_CLKID_TDMIN_A]		= &tdmin_a.hw,
+	[AUD_CLKID_TDMIN_B]		= &tdmin_b.hw,
+	[AUD_CLKID_TDMIN_C]		= &tdmin_c.hw,
+	[AUD_CLKID_TDMIN_LB]		= &tdmin_lb.hw,
+	[AUD_CLKID_TDMOUT_A]		= &tdmout_a.hw,
+	[AUD_CLKID_TDMOUT_B]		= &tdmout_b.hw,
+	[AUD_CLKID_TDMOUT_C]		= &tdmout_c.hw,
+	[AUD_CLKID_FRDDR_A]		= &frddr_a.hw,
+	[AUD_CLKID_FRDDR_B]		= &frddr_b.hw,
+	[AUD_CLKID_FRDDR_C]		= &frddr_c.hw,
+	[AUD_CLKID_TODDR_A]		= &toddr_a.hw,
+	[AUD_CLKID_TODDR_B]		= &toddr_b.hw,
+	[AUD_CLKID_TODDR_C]		= &toddr_c.hw,
+	[AUD_CLKID_LOOPBACK]		= &loopback.hw,
+	[AUD_CLKID_SPDIFIN]		= &spdifin.hw,
+	[AUD_CLKID_SPDIFOUT]		= &spdifout.hw,
+	[AUD_CLKID_RESAMPLE]		= &resample.hw,
+	[AUD_CLKID_SPDIFOUT_B]		= &spdifout_b.hw,
+	[AUD_CLKID_MST_A_MCLK_SEL]	= &sm1_mst_a_mclk_sel.hw,
+	[AUD_CLKID_MST_B_MCLK_SEL]	= &sm1_mst_b_mclk_sel.hw,
+	[AUD_CLKID_MST_C_MCLK_SEL]	= &sm1_mst_c_mclk_sel.hw,
+	[AUD_CLKID_MST_D_MCLK_SEL]	= &sm1_mst_d_mclk_sel.hw,
+	[AUD_CLKID_MST_E_MCLK_SEL]	= &sm1_mst_e_mclk_sel.hw,
+	[AUD_CLKID_MST_F_MCLK_SEL]	= &sm1_mst_f_mclk_sel.hw,
+	[AUD_CLKID_MST_A_MCLK_DIV]	= &sm1_mst_a_mclk_div.hw,
+	[AUD_CLKID_MST_B_MCLK_DIV]	= &sm1_mst_b_mclk_div.hw,
+	[AUD_CLKID_MST_C_MCLK_DIV]	= &sm1_mst_c_mclk_div.hw,
+	[AUD_CLKID_MST_D_MCLK_DIV]	= &sm1_mst_d_mclk_div.hw,
+	[AUD_CLKID_MST_E_MCLK_DIV]	= &sm1_mst_e_mclk_div.hw,
+	[AUD_CLKID_MST_F_MCLK_DIV]	= &sm1_mst_f_mclk_div.hw,
+	[AUD_CLKID_MST_A_MCLK]		= &sm1_mst_a_mclk.hw,
+	[AUD_CLKID_MST_B_MCLK]		= &sm1_mst_b_mclk.hw,
+	[AUD_CLKID_MST_C_MCLK]		= &sm1_mst_c_mclk.hw,
+	[AUD_CLKID_MST_D_MCLK]		= &sm1_mst_d_mclk.hw,
+	[AUD_CLKID_MST_E_MCLK]		= &sm1_mst_e_mclk.hw,
+	[AUD_CLKID_MST_F_MCLK]		= &sm1_mst_f_mclk.hw,
+	[AUD_CLKID_SPDIFOUT_CLK_SEL]	= &spdifout_clk_sel.hw,
+	[AUD_CLKID_SPDIFOUT_CLK_DIV]	= &spdifout_clk_div.hw,
+	[AUD_CLKID_SPDIFOUT_CLK]	= &spdifout_clk.hw,
+	[AUD_CLKID_SPDIFOUT_B_CLK_SEL]	= &spdifout_b_clk_sel.hw,
+	[AUD_CLKID_SPDIFOUT_B_CLK_DIV]	= &spdifout_b_clk_div.hw,
+	[AUD_CLKID_SPDIFOUT_B_CLK]	= &spdifout_b_clk.hw,
+	[AUD_CLKID_SPDIFIN_CLK_SEL]	= &spdifin_clk_sel.hw,
+	[AUD_CLKID_SPDIFIN_CLK_DIV]	= &spdifin_clk_div.hw,
+	[AUD_CLKID_SPDIFIN_CLK]		= &spdifin_clk.hw,
+	[AUD_CLKID_PDM_DCLK_SEL]	= &pdm_dclk_sel.hw,
+	[AUD_CLKID_PDM_DCLK_DIV]	= &pdm_dclk_div.hw,
+	[AUD_CLKID_PDM_DCLK]		= &pdm_dclk.hw,
+	[AUD_CLKID_PDM_SYSCLK_SEL]	= &pdm_sysclk_sel.hw,
+	[AUD_CLKID_PDM_SYSCLK_DIV]	= &pdm_sysclk_div.hw,
+	[AUD_CLKID_PDM_SYSCLK]		= &pdm_sysclk.hw,
+	[AUD_CLKID_MST_A_SCLK_PRE_EN]	= &mst_a_sclk_pre_en.hw,
+	[AUD_CLKID_MST_B_SCLK_PRE_EN]	= &mst_b_sclk_pre_en.hw,
+	[AUD_CLKID_MST_C_SCLK_PRE_EN]	= &mst_c_sclk_pre_en.hw,
+	[AUD_CLKID_MST_D_SCLK_PRE_EN]	= &mst_d_sclk_pre_en.hw,
+	[AUD_CLKID_MST_E_SCLK_PRE_EN]	= &mst_e_sclk_pre_en.hw,
+	[AUD_CLKID_MST_F_SCLK_PRE_EN]	= &mst_f_sclk_pre_en.hw,
+	[AUD_CLKID_MST_A_SCLK_DIV]	= &mst_a_sclk_div.hw,
+	[AUD_CLKID_MST_B_SCLK_DIV]	= &mst_b_sclk_div.hw,
+	[AUD_CLKID_MST_C_SCLK_DIV]	= &mst_c_sclk_div.hw,
+	[AUD_CLKID_MST_D_SCLK_DIV]	= &mst_d_sclk_div.hw,
+	[AUD_CLKID_MST_E_SCLK_DIV]	= &mst_e_sclk_div.hw,
+	[AUD_CLKID_MST_F_SCLK_DIV]	= &mst_f_sclk_div.hw,
+	[AUD_CLKID_MST_A_SCLK_POST_EN]	= &mst_a_sclk_post_en.hw,
+	[AUD_CLKID_MST_B_SCLK_POST_EN]	= &mst_b_sclk_post_en.hw,
+	[AUD_CLKID_MST_C_SCLK_POST_EN]	= &mst_c_sclk_post_en.hw,
+	[AUD_CLKID_MST_D_SCLK_POST_EN]	= &mst_d_sclk_post_en.hw,
+	[AUD_CLKID_MST_E_SCLK_POST_EN]	= &mst_e_sclk_post_en.hw,
+	[AUD_CLKID_MST_F_SCLK_POST_EN]	= &mst_f_sclk_post_en.hw,
+	[AUD_CLKID_MST_A_SCLK]		= &mst_a_sclk.hw,
+	[AUD_CLKID_MST_B_SCLK]		= &mst_b_sclk.hw,
+	[AUD_CLKID_MST_C_SCLK]		= &mst_c_sclk.hw,
+	[AUD_CLKID_MST_D_SCLK]		= &mst_d_sclk.hw,
+	[AUD_CLKID_MST_E_SCLK]		= &mst_e_sclk.hw,
+	[AUD_CLKID_MST_F_SCLK]		= &mst_f_sclk.hw,
+	[AUD_CLKID_MST_A_LRCLK_DIV]	= &mst_a_lrclk_div.hw,
+	[AUD_CLKID_MST_B_LRCLK_DIV]	= &mst_b_lrclk_div.hw,
+	[AUD_CLKID_MST_C_LRCLK_DIV]	= &mst_c_lrclk_div.hw,
+	[AUD_CLKID_MST_D_LRCLK_DIV]	= &mst_d_lrclk_div.hw,
+	[AUD_CLKID_MST_E_LRCLK_DIV]	= &mst_e_lrclk_div.hw,
+	[AUD_CLKID_MST_F_LRCLK_DIV]	= &mst_f_lrclk_div.hw,
+	[AUD_CLKID_MST_A_LRCLK]		= &mst_a_lrclk.hw,
+	[AUD_CLKID_MST_B_LRCLK]		= &mst_b_lrclk.hw,
+	[AUD_CLKID_MST_C_LRCLK]		= &mst_c_lrclk.hw,
+	[AUD_CLKID_MST_D_LRCLK]		= &mst_d_lrclk.hw,
+	[AUD_CLKID_MST_E_LRCLK]		= &mst_e_lrclk.hw,
+	[AUD_CLKID_MST_F_LRCLK]		= &mst_f_lrclk.hw,
+	[AUD_CLKID_TDMIN_A_SCLK_SEL]	= &tdmin_a_sclk_sel.hw,
+	[AUD_CLKID_TDMIN_B_SCLK_SEL]	= &tdmin_b_sclk_sel.hw,
+	[AUD_CLKID_TDMIN_C_SCLK_SEL]	= &tdmin_c_sclk_sel.hw,
+	[AUD_CLKID_TDMIN_LB_SCLK_SEL]	= &tdmin_lb_sclk_sel.hw,
+	[AUD_CLKID_TDMOUT_A_SCLK_SEL]	= &tdmout_a_sclk_sel.hw,
+	[AUD_CLKID_TDMOUT_B_SCLK_SEL]	= &tdmout_b_sclk_sel.hw,
+	[AUD_CLKID_TDMOUT_C_SCLK_SEL]	= &tdmout_c_sclk_sel.hw,
+	[AUD_CLKID_TDMIN_A_SCLK_PRE_EN]	= &tdmin_a_sclk_pre_en.hw,
+	[AUD_CLKID_TDMIN_B_SCLK_PRE_EN]	= &tdmin_b_sclk_pre_en.hw,
+	[AUD_CLKID_TDMIN_C_SCLK_PRE_EN]	= &tdmin_c_sclk_pre_en.hw,
+	[AUD_CLKID_TDMIN_LB_SCLK_PRE_EN] = &tdmin_lb_sclk_pre_en.hw,
+	[AUD_CLKID_TDMOUT_A_SCLK_PRE_EN] = &tdmout_a_sclk_pre_en.hw,
+	[AUD_CLKID_TDMOUT_B_SCLK_PRE_EN] = &tdmout_b_sclk_pre_en.hw,
+	[AUD_CLKID_TDMOUT_C_SCLK_PRE_EN] = &tdmout_c_sclk_pre_en.hw,
+	[AUD_CLKID_TDMIN_A_SCLK_POST_EN] = &tdmin_a_sclk_post_en.hw,
+	[AUD_CLKID_TDMIN_B_SCLK_POST_EN] = &tdmin_b_sclk_post_en.hw,
+	[AUD_CLKID_TDMIN_C_SCLK_POST_EN] = &tdmin_c_sclk_post_en.hw,
+	[AUD_CLKID_TDMIN_LB_SCLK_POST_EN] = &tdmin_lb_sclk_post_en.hw,
+	[AUD_CLKID_TDMOUT_A_SCLK_POST_EN] = &tdmout_a_sclk_post_en.hw,
+	[AUD_CLKID_TDMOUT_B_SCLK_POST_EN] = &tdmout_b_sclk_post_en.hw,
+	[AUD_CLKID_TDMOUT_C_SCLK_POST_EN] = &tdmout_c_sclk_post_en.hw,
+	[AUD_CLKID_TDMIN_A_SCLK]	= &tdmin_a_sclk.hw,
+	[AUD_CLKID_TDMIN_B_SCLK]	= &tdmin_b_sclk.hw,
+	[AUD_CLKID_TDMIN_C_SCLK]	= &tdmin_c_sclk.hw,
+	[AUD_CLKID_TDMIN_LB_SCLK]	= &tdmin_lb_sclk.hw,
+	[AUD_CLKID_TDMOUT_A_SCLK]	= &g12a_tdmout_a_sclk.hw,
+	[AUD_CLKID_TDMOUT_B_SCLK]	= &g12a_tdmout_b_sclk.hw,
+	[AUD_CLKID_TDMOUT_C_SCLK]	= &g12a_tdmout_c_sclk.hw,
+	[AUD_CLKID_TDMIN_A_LRCLK]	= &tdmin_a_lrclk.hw,
+	[AUD_CLKID_TDMIN_B_LRCLK]	= &tdmin_b_lrclk.hw,
+	[AUD_CLKID_TDMIN_C_LRCLK]	= &tdmin_c_lrclk.hw,
+	[AUD_CLKID_TDMIN_LB_LRCLK]	= &tdmin_lb_lrclk.hw,
+	[AUD_CLKID_TDMOUT_A_LRCLK]	= &tdmout_a_lrclk.hw,
+	[AUD_CLKID_TDMOUT_B_LRCLK]	= &tdmout_b_lrclk.hw,
+	[AUD_CLKID_TDMOUT_C_LRCLK]	= &tdmout_c_lrclk.hw,
+	[AUD_CLKID_TOP]			= &sm1_aud_top.hw,
+	[AUD_CLKID_TORAM]		= &toram.hw,
+	[AUD_CLKID_EQDRC]		= &eqdrc.hw,
+	[AUD_CLKID_RESAMPLE_B]		= &resample_b.hw,
+	[AUD_CLKID_TOVAD]		= &tovad.hw,
+	[AUD_CLKID_LOCKER]		= &locker.hw,
+	[AUD_CLKID_SPDIFIN_LB]		= &spdifin_lb.hw,
+	[AUD_CLKID_FRDDR_D]		= &frddr_d.hw,
+	[AUD_CLKID_TODDR_D]		= &toddr_d.hw,
+	[AUD_CLKID_LOOPBACK_B]		= &loopback_b.hw,
+	[AUD_CLKID_CLK81_EN]		= &sm1_clk81_en.hw,
+	[AUD_CLKID_SYSCLK_A_DIV]	= &sm1_sysclk_a_div.hw,
+	[AUD_CLKID_SYSCLK_A_EN]		= &sm1_sysclk_a_en.hw,
+	[AUD_CLKID_SYSCLK_B_DIV]	= &sm1_sysclk_b_div.hw,
+	[AUD_CLKID_SYSCLK_B_EN]		= &sm1_sysclk_b_en.hw,
+	[AUD_CLKID_EARCRX]		= &earcrx.hw,
+	[AUD_CLKID_EARCRX_CMDC_SEL]	= &sm1_earcrx_cmdc_clk_sel.hw,
+	[AUD_CLKID_EARCRX_CMDC_DIV]	= &sm1_earcrx_cmdc_clk_div.hw,
+	[AUD_CLKID_EARCRX_CMDC]		= &sm1_earcrx_cmdc_clk.hw,
+	[AUD_CLKID_EARCRX_DMAC_SEL]	= &sm1_earcrx_dmac_clk_sel.hw,
+	[AUD_CLKID_EARCRX_DMAC_DIV]	= &sm1_earcrx_dmac_clk_div.hw,
+	[AUD_CLKID_EARCRX_DMAC]		= &sm1_earcrx_dmac_clk.hw,
+};
+
 /*
  * Array of all SM1 clocks provided by this provider
  * The input clocks of the controller will be populated at runtime
@@ -1410,6 +1563,15 @@ static const struct audioclk_data g12a_audioclk_data = {
 	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
 };
 
+static const struct audioclk_data s4_audioclk_data = {
+	.hw_clks = {
+		.hws = s4_audio_hw_clks,
+		.num = ARRAY_SIZE(s4_audio_hw_clks),
+	},
+	.rst_drvname = "rst-sm1",
+	.max_register = AUDIO_EARCRX_DMAC_CLK_CTRL,
+};
+
 static const struct audioclk_data sm1_audioclk_data = {
 	.hw_clks = {
 		.hws = sm1_audio_hw_clks,
@@ -1426,6 +1588,9 @@ static const struct of_device_id clkc_match_table[] = {
 	}, {
 		.compatible = "amlogic,g12a-audio-clkc",
 		.data = &g12a_audioclk_data
+	}, {
+		.compatible = "amlogic,s4-audio-clkc",
+		.data = &s4_audioclk_data
 	}, {
 		.compatible = "amlogic,sm1-audio-clkc",
 		.data = &sm1_audioclk_data

-- 
2.52.0

[PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio

[Jiebing Chen via B4 Relay]

From: Jiebing Chen <jiebing.chen@amlogic.com>

Add basic audio driver support for the Amlogic S4 based
Amlogic AQ222 board.

Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
---
 .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
 2 files changed, 583 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
index 0a3f81ea0fb0..43493bc9da46 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
@@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 {
 	       regulator-always-on;
 	};
 
+	vcc5v_reg: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		vin-supply = <&main_12v>;
+		regulator-name = "VCC5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
+		startup-delay-us = <7000>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	/* SY8120B1ABC DC/DC Regulator. */
 	vddcpu: regulator-vddcpu {
 		compatible = "pwm-regulator";
@@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu {
 				<699000 98>,
 				<689000 100>;
 	};
+
+	dmics: audio-codec-1 {
+		compatible = "dmic-codec";
+		#sound-dai-cells = <0>;
+		num-channels = <2>;
+		wakeup-delay-ms = <50>;
+		sound-name-prefix = "MIC";
+	};
+
+	dioo2133: audio-amplifier-0 {
+		compatible = "simple-audio-amplifier";
+		enable-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
+		VCC-supply = <&vcc5v_reg>;
+		sound-name-prefix = "10U2";
+	};
+
+	spdif_dir: audio-spdif-in {
+		compatible = "linux,spdif-dir";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "DIR";
+	};
+
+	spdif_dit: audio-spdif-out {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "DIT";
+	};
+
+	sound {
+		compatible = "amlogic,axg-sound-card";
+		model = "aq222";
+		audio-widgets = "Line", "Lineout";
+		audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
+				 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
+				 <&tdmin_lb>, <&dioo2133>;
+		audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
+				"TDMOUT_A IN 1", "FRDDR_B OUT 0",
+				"TDMOUT_A IN 2", "FRDDR_C OUT 0",
+				"TDM_A Playback", "TDMOUT_A OUT",
+				"TDMOUT_B IN 0", "FRDDR_A OUT 1",
+				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
+				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
+				"TDM_B Playback", "TDMOUT_B OUT",
+				"TDMOUT_C IN 0", "FRDDR_A OUT 2",
+				"TDMOUT_C IN 1", "FRDDR_B OUT 2",
+				"TDMOUT_C IN 2", "FRDDR_C OUT 2",
+				"TDM_C Playback", "TDMOUT_C OUT",
+				"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
+				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
+				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
+				"SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
+				"SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
+				"SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
+				"TDMIN_A IN 0", "TDM_A Capture",
+				"TDMIN_A IN 1", "TDM_B Capture",
+				"TDMIN_A IN 2", "TDM_C Capture",
+				"TDMIN_A IN 3", "TDM_A Loopback",
+				"TDMIN_A IN 4", "TDM_B Loopback",
+				"TDMIN_A IN 5", "TDM_C Loopback",
+				"TDMIN_B IN 0", "TDM_A Capture",
+				"TDMIN_B IN 1", "TDM_B Capture",
+				"TDMIN_B IN 2", "TDM_C Capture",
+				"TDMIN_B IN 3", "TDM_A Loopback",
+				"TDMIN_B IN 4", "TDM_B Loopback",
+				"TDMIN_B IN 5", "TDM_C Loopback",
+				"TDMIN_C IN 0", "TDM_A Capture",
+				"TDMIN_C IN 1", "TDM_B Capture",
+				"TDMIN_C IN 2", "TDM_C Capture",
+				"TDMIN_C IN 3", "TDM_A Loopback",
+				"TDMIN_C IN 4", "TDM_B Loopback",
+				"TDMIN_C IN 5", "TDM_C Loopback",
+				"TDMIN_LB IN 3", "TDM_A Capture",
+				"TDMIN_LB IN 4", "TDM_B Capture",
+				"TDMIN_LB IN 5", "TDM_C Capture",
+				"TDMIN_LB IN 0", "TDM_A Loopback",
+				"TDMIN_LB IN 1", "TDM_B Loopback",
+				"TDMIN_LB IN 2", "TDM_C Loopback",
+				"TODDR_A IN 0", "TDMIN_A OUT",
+				"TODDR_B IN 0", "TDMIN_A OUT",
+				"TODDR_C IN 0", "TDMIN_A OUT",
+				"TODDR_A IN 1", "TDMIN_B OUT",
+				"TODDR_B IN 1", "TDMIN_B OUT",
+				"TODDR_C IN 1", "TDMIN_B OUT",
+				"TODDR_A IN 2", "TDMIN_C OUT",
+				"TODDR_B IN 2", "TDMIN_C OUT",
+				"TODDR_C IN 2", "TDMIN_C OUT",
+				"TODDR_A IN 3", "SPDIFIN Capture",
+				"TODDR_B IN 3", "SPDIFIN Capture",
+				"TODDR_C IN 3", "SPDIFIN Capture",
+				"TODDR_A IN 6", "TDMIN_LB OUT",
+				"TODDR_B IN 6", "TDMIN_LB OUT",
+				"TODDR_C IN 6", "TDMIN_LB OUT",
+				"10U2 INL", "ACODEC LOLP",
+				"10U2 INR", "ACODEC LORP",
+				"Lineout", "10U2 OUTL",
+				"Lineout", "10U2 OUTR";
+		clocks = <&clkc_pll CLKID_HIFI_PLL>,
+				<&clkc_pll CLKID_MPLL0>,
+				<&clkc_pll CLKID_MPLL1>;
+		assigned-clocks = <&clkc_pll CLKID_HIFI_PLL>,
+				  <&clkc_pll CLKID_MPLL0>,
+				  <&clkc_pll CLKID_MPLL1>;
+		assigned-clock-rates = <1179648000>,
+				       <270950400>,
+				       <338688000>;
+
+		dai-link-0 {
+			sound-dai = <&frddr_a>;
+		};
+
+		dai-link-1 {
+			sound-dai = <&frddr_b>;
+		};
+
+		dai-link-2 {
+			sound-dai = <&frddr_c>;
+		};
+
+		dai-link-3 {
+			sound-dai = <&toddr_a>;
+		};
+
+		dai-link-4 {
+			sound-dai = <&toddr_b>;
+		};
+
+		dai-link-5 {
+			sound-dai = <&toddr_c>;
+		};
+
+		dai-link-6 {
+			sound-dai = <&tdmif_a>;
+			dai-format = "i2s";
+			dai-tdm-slot-tx-mask-0 = <1 1>;
+			mclk-fs = <256>;
+			codec-0 {
+				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
+			};
+			codec-1 {
+				sound-dai = <&toacodec TOACODEC_IN_A>;
+			};
+		};
+
+		dai-link-7 {
+			sound-dai = <&tdmif_b>;
+			dai-format = "i2s";
+			dai-tdm-slot-tx-mask-0 = <1 1>;
+			mclk-fs = <256>;
+			codec-0 {
+				sound-dai = <&toacodec TOACODEC_IN_B>;
+			};
+			codec-1 {
+				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+			};
+		};
+
+		/* 8ch HDMI interface */
+		dai-link-8 {
+			sound-dai = <&tdmif_c>;
+			dai-format = "i2s";
+			dai-tdm-slot-tx-mask-0 = <1 1>;
+			dai-tdm-slot-tx-mask-1 = <1 1>;
+			dai-tdm-slot-tx-mask-2 = <1 1>;
+			dai-tdm-slot-tx-mask-3 = <1 1>;
+			mclk-fs = <256>;
+			codec-0 {
+				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
+			};
+		};
+
+		/* spdif hdmi and coax output */
+		dai-link-9 {
+			sound-dai = <&spdifout_a>;
+
+			codec-0 {
+				sound-dai = <&spdif_dit>;
+			};
+
+			codec-1 {
+				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
+			};
+		};
+
+		/* spdif hdmi interface */
+		dai-link-10 {
+			sound-dai = <&spdifout_b>;
+
+			codec {
+				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
+			};
+		};
+
+		/* spdif coax input */
+		dai-link-11 {
+			sound-dai = <&spdifin>;
+
+			codec {
+				sound-dai = <&spdif_dir>;
+			};
+		};
+
+		dai-link-12 {
+			sound-dai = <&toacodec TOACODEC_OUT>;
+
+			codec {
+				sound-dai = <&acodec>;
+			};
+		};
+	};
 };
 
 &pwm_ef {
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index dfc0a30a6e61..a6c2c83eea16 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -11,6 +11,11 @@
 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
 #include <dt-bindings/power/meson-s4-power.h>
 #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
+#include <dt-bindings/clock/axg-audio-clkc.h>
+#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
+#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
+#include <dt-bindings/sound/meson-g12a-toacodec.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
 
 / {
 	cpus {
@@ -863,4 +868,360 @@ emmc: mmc@fe08c000 {
 			assigned-clock-rates = <24000000>;
 		};
 	};
+
+	tdmif_a: audio-controller-0 {
+		compatible = "amlogic,axg-tdm-iface";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TDM_A";
+		clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
+			 <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
+			 <&clkc_audio AUD_CLKID_MST_A_MCLK>;
+		clock-names = "sclk", "lrclk","mclk";
+	};
+
+	tdmif_b: audio-controller-1 {
+		compatible = "amlogic,axg-tdm-iface";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TDM_B";
+		clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
+			 <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
+			 <&clkc_audio AUD_CLKID_MST_B_MCLK>;
+		clock-names = "sclk", "lrclk","mclk";
+	};
+
+	tdmif_c: audio-controller-2 {
+		compatible = "amlogic,axg-tdm-iface";
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TDM_C";
+		clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
+			 <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
+			 <&clkc_audio AUD_CLKID_MST_C_MCLK>;
+		clock-names = "sclk", "lrclk","mclk";
+	};
+};
+
+&apb4 {
+	acodec: audio-controller@1a000 {
+		compatible = "amlogic,t9015";
+		reg = <0x0 0x1a000 0x0 0x14>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "ACODEC";
+		clocks = <&clkc_periphs CLKID_ACODEC>;
+		clock-names = "pclk";
+		resets = <&reset RESET_ACODEC>;
+		AVDD-supply = <&vddio_ao1v8>;
+	};
+
+	clkc_audio: clock-controller@330000 {
+		compatible = "amlogic,s4-audio-clkc";
+		reg = <0x0 0x330000 0x0 0xd8>,
+			  <0x0 0x330e80 0x0 0x10>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		power-domains = <&pwrc PWRC_S4_AUDIO_ID>;
+		clocks = <&clkc_periphs CLKID_AUDIO>,
+			 <&clkc_pll CLKID_MPLL0>,
+			 <&clkc_pll CLKID_MPLL1>,
+			 <&clkc_pll CLKID_MPLL2>,
+			 <&clkc_pll CLKID_MPLL3>,
+			 <&clkc_pll CLKID_HIFI_PLL>,
+			 <&clkc_pll CLKID_FCLK_DIV3>,
+			 <&clkc_pll CLKID_FCLK_DIV4>,
+			 <&clkc_pll CLKID_FCLK_DIV5>;
+		clock-names = "pclk",
+				  "mst_in0",
+				  "mst_in1",
+				  "mst_in2",
+				  "mst_in3",
+				  "mst_in4",
+				  "mst_in5",
+				  "mst_in6",
+				  "mst_in7";
+		resets = <&reset RESET_AUDIO>;
+	};
+
+	toddr_a: audio-controller@330100 {
+		compatible = "amlogic,sm1-toddr",
+				 "amlogic,axg-toddr";
+		reg = <0x0 0x330100 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TODDR_A";
+		interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
+		resets = <&arb AXG_ARB_TODDR_A>,
+			 <&clkc_audio AUD_RESET_TODDR_A>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <8192>;
+	};
+
+	toddr_b: audio-controller@330140 {
+		compatible = "amlogic,sm1-toddr",
+				 "amlogic,axg-toddr";
+		reg = <0x0 0x330140 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TODDR_B";
+		interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
+		resets = <&arb AXG_ARB_TODDR_B>,
+			 <&clkc_audio AUD_RESET_TODDR_B>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	toddr_c: audio-controller@330180 {
+		compatible = "amlogic,sm1-toddr",
+				 "amlogic,axg-toddr";
+		reg = <0x0 0x330180 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TODDR_C";
+		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
+		resets = <&arb AXG_ARB_TODDR_C>,
+			 <&clkc_audio AUD_RESET_TODDR_C>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	frddr_a: audio-controller@3301c0 {
+		compatible = "amlogic,sm1-frddr",
+				 "amlogic,axg-frddr";
+		reg = <0x0 0x3301c0 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "FRDDR_A";
+		interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
+		resets = <&arb AXG_ARB_FRDDR_A>,
+			 <&clkc_audio AUD_RESET_FRDDR_A>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <512>;
+	};
+
+	frddr_b: audio-controller@330200 {
+		compatible = "amlogic,sm1-frddr",
+				 "amlogic,axg-frddr";
+		reg = <0x0 0x330200 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "FRDDR_B";
+		interrupts = <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
+		resets = <&arb AXG_ARB_FRDDR_B>,
+			 <&clkc_audio AUD_RESET_FRDDR_B>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	frddr_c: audio-controller@330240 {
+		compatible = "amlogic,sm1-frddr",
+				 "amlogic,axg-frddr";
+		reg = <0x0 0x330240 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "FRDDR_C";
+		interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
+		resets = <&arb AXG_ARB_FRDDR_C>,
+			 <&clkc_audio AUD_RESET_FRDDR_C>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	arb: reset-controller@330280 {
+		compatible = "amlogic,meson-sm1-audio-arb";
+		reg = <0x0 0x330280 0x0 0x4>;
+		#reset-cells = <1>;
+		clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
+	};
+
+	tdmin_a: audio-controller@330300 {
+		compatible = "amlogic,sm1-tdmin";
+		reg = <0x0 0x330300 0x0 0x40>;
+		sound-name-prefix = "TDMIN_A";
+		resets = <&clkc_audio AUD_RESET_TDMIN_A>;
+		clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
+			 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	tdmin_b: audio-controller@330340 {
+		compatible = "amlogic,sm1-tdmin";
+		reg = <0x0 0x330340 0x0 0x40>;
+		sound-name-prefix = "TDMIN_B";
+		resets = <&clkc_audio AUD_RESET_TDMIN_B>;
+		clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
+			 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	tdmin_c: audio-controller@330380 {
+		compatible = "amlogic,sm1-tdmin";
+		reg = <0x0 0x330380 0x0 0x40>;
+		sound-name-prefix = "TDMIN_C";
+		resets = <&clkc_audio AUD_RESET_TDMIN_C>;
+		clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
+			 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	tdmin_lb: audio-controller@3303c0 {
+		compatible = "amlogic,sm1-tdmin";
+		reg = <0x0 0x3303c0 0x0 0x40>;
+		sound-name-prefix = "TDMIN_LB";
+		resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
+		clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
+			 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	spdifin: audio-controller@330400 {
+		compatible = "amlogic,g12a-spdifin",
+				 "amlogic,axg-spdifin";
+		reg = <0x0 0x330400 0x0 0x30>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "SPDIFIN";
+		interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
+		<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
+		clock-names = "pclk", "refclk";
+		resets = <&clkc_audio AUD_RESET_SPDIFIN>;
+	};
+
+	spdifout_a: audio-controller@330480 {
+		compatible = "amlogic,g12a-spdifout",
+				 "amlogic,axg-spdifout";
+		reg = <0x0 0x330480 0x0 0x50>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "SPDIFOUT_A";
+		clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
+		<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
+		clock-names = "pclk", "mclk";
+		resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
+	};
+
+	tdmout_a: audio-controller@330500 {
+		compatible = "amlogic,sm1-tdmout";
+		reg = <0x0 0x330500 0x0 0x40>;
+		sound-name-prefix = "TDMOUT_A";
+		resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
+		clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	tdmout_b: audio-controller@330540 {
+		compatible = "amlogic,sm1-tdmout";
+		reg = <0x0 0x330540 0x0 0x40>;
+		sound-name-prefix = "TDMOUT_B";
+		resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
+		clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	tdmout_c: audio-controller@330580 {
+		compatible = "amlogic,sm1-tdmout";
+		reg = <0x0 0x330580 0x0 0x40>;
+		sound-name-prefix = "TDMOUT_C";
+		resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
+		clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
+			 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
+		clock-names = "pclk", "sclk", "sclk_sel",
+				  "lrclk", "lrclk_sel";
+	};
+
+	spdifout_b: audio-controller@330680 {
+		compatible = "amlogic,g12a-spdifout",
+				 "amlogic,axg-spdifout";
+		reg = <0x0 0x330680 0x0 0x50>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "SPDIFOUT_B";
+		clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
+			 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
+		clock-names = "pclk", "mclk";
+		resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
+	};
+
+	toacodec: audio-controller@330740 {
+		compatible = "amlogic,s4-toacodec",
+				 "amlogic,g12a-toacodec";
+		reg = <0x0 0x330740 0x0 0x4>;
+		sound-name-prefix = "TOACODEC";
+		#sound-dai-cells = <1>;
+		resets = <&clkc_audio AUD_RESET_TOACODEC>;
+	};
+
+	tohdmitx: audio-controller@330744 {
+		compatible = "amlogic,sm1-tohdmitx",
+				 "amlogic,g12a-tohdmitx";
+		reg = <0x0 0x330744 0x0 0x4>;
+		#sound-dai-cells = <1>;
+		sound-name-prefix = "TOHDMITX";
+		resets = <&clkc_audio AUD_RESET_TOHDMITX>;
+	};
+
+	toddr_d: audio-controller@330840 {
+		compatible = "amlogic,sm1-toddr",
+				 "amlogic,axg-toddr";
+		reg = <0x0 0x330840 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "TODDR_D";
+		interrupts = <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
+		resets = <&arb AXG_ARB_TODDR_D>,
+			 <&clkc_audio AUD_RESET_TODDR_D>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	frddr_d: audio-controller@330880 {
+		 compatible = "amlogic,sm1-frddr",
+				  "amlogic,axg-frddr";
+		reg = <0x0 0x330880 0x0 0x2c>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "FRDDR_D";
+		interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
+		resets = <&arb AXG_ARB_FRDDR_D>,
+			 <&clkc_audio AUD_RESET_FRDDR_D>;
+		reset-names = "arb", "rst";
+		amlogic,fifo-depth = <256>;
+	};
+
+	pdm: audio-controller@331000 {
+		compatible = "amlogic,sm1-pdm",
+			     "amlogic,axg-pdm";
+		reg = <0x0 0x331000 0x0 0x34>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "PDM";
+		clocks = <&clkc_audio AUD_CLKID_PDM>,
+			 <&clkc_audio AUD_CLKID_PDM_DCLK>,
+			 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
+		clock-names = "pclk", "dclk", "sysclk";
+		resets = <&clkc_audio AUD_RESET_PDM>;
+	};
 };

-- 
2.52.0

Re: [PATCH v6 3/5] ASoC: meson: g12a-toacodec: Add S4 tocodec driver

[Jerome Brunet]

On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:

> From: Jiebing Chen <jiebing.chen@amlogic.com>
>
> The S4 requires additional clock control bits to be turn on while enabled.
> The S4 has 8 TDM lanes, instead of 4 on previous SoC.
> Update the widget accordingly.
>
> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
> ---
>  sound/soc/meson/g12a-toacodec.c | 36 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
>
> diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacodec.c
> index a95375b53f0a..a7f9ac2d08f7 100644
> --- a/sound/soc/meson/g12a-toacodec.c
> +++ b/sound/soc/meson/g12a-toacodec.c
> @@ -41,6 +41,9 @@
>  #define  CTRL0_BCLK_SEL_LSB		4
>  #define  CTRL0_MCLK_SEL			GENMASK(2, 0)
>  
> +#define CTRL0_BCLK_ENABLE_SHIFT		30
> +#define CTRL0_MCLK_ENABLE_SHIFT		29
> +
>  #define TOACODEC_OUT_CHMAX		2
>  
>  struct g12a_toacodec {
> @@ -141,6 +144,13 @@ static const struct snd_soc_dapm_widget sm1_toacodec_widgets[] = {
>  			    &g12a_toacodec_out_enable),
>  };
>  
> +static const struct snd_soc_dapm_widget s4_toacodec_widgets[] = {
> +	SND_SOC_DAPM_MUX("SRC", TOACODEC_CTRL0, CTRL0_BCLK_ENABLE_SHIFT, 0,
> +			 &sm1_toacodec_mux),
> +	SND_SOC_DAPM_SWITCH("OUT EN", TOACODEC_CTRL0, CTRL0_MCLK_ENABLE_SHIFT, 0,
> +			    &g12a_toacodec_out_enable),

I guess that works but it is a bit hackish to hijack the output control
to enable a something really clock related. A supply widget connect to
this widget would be more approriate I think

> +};
> +
>  static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
>  					 struct snd_pcm_hw_params *params,
>  					 struct snd_soc_dai *dai)
> @@ -234,6 +244,10 @@ static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
>  	SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
>  };
>  
> +static const struct snd_kcontrol_new s4_toacodec_controls[] = {
> +	SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 7, 0),
> +};
> +
>  static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
>  	.probe			= g12a_toacodec_component_probe,
>  	.controls		= g12a_toacodec_controls,
> @@ -256,6 +270,17 @@ static const struct snd_soc_component_driver sm1_toacodec_component_drv = {
>  	.endianness		= 1,
>  };
>  
> +static const struct snd_soc_component_driver s4_toacodec_component_drv = {
> +	.probe			= sm1_toacodec_component_probe,
> +	.controls		= s4_toacodec_controls,
> +	.num_controls		= ARRAY_SIZE(s4_toacodec_controls),
> +	.dapm_widgets		= s4_toacodec_widgets,
> +	.num_dapm_widgets	= ARRAY_SIZE(s4_toacodec_widgets),
> +	.dapm_routes		= g12a_toacodec_routes,
> +	.num_dapm_routes	= ARRAY_SIZE(g12a_toacodec_routes),
> +	.endianness		= 1,
> +};
> +
>  static const struct regmap_config g12a_toacodec_regmap_cfg = {
>  	.reg_bits	= 32,
>  	.val_bits	= 32,
> @@ -276,6 +301,13 @@ static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
>  	.field_bclk_sel	= REG_FIELD(TOACODEC_CTRL0, 4, 6),
>  };
>  
> +static const struct g12a_toacodec_match_data s4_toacodec_match_data = {
> +	.component_drv	= &s4_toacodec_component_drv,
> +	.field_dat_sel	= REG_FIELD(TOACODEC_CTRL0, 19, 20),
> +	.field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 12, 14),
> +	.field_bclk_sel	= REG_FIELD(TOACODEC_CTRL0, 4, 6),
> +};
> +
>  static const struct of_device_id g12a_toacodec_of_match[] = {
>  	{
>  		.compatible = "amlogic,g12a-toacodec",
> @@ -285,6 +317,10 @@ static const struct of_device_id g12a_toacodec_of_match[] = {
>  		.compatible = "amlogic,sm1-toacodec",
>  		.data = &sm1_toacodec_match_data,
>  	},
> +	{
> +		.compatible = "amlogic,s4-toacodec",
> +		.data = &s4_toacodec_match_data,
> +	},
>  	{}
>  };
>  MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);

-- 
Jerome

Re: [PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio

[Jerome Brunet]

On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:

> From: Jiebing Chen <jiebing.chen@amlogic.com>
>
> Add basic audio driver support for the Amlogic S4 based
> Amlogic AQ222 board.
>
> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
> ---
>  .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
>  arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
>  2 files changed, 583 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
> index 0a3f81ea0fb0..43493bc9da46 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
> @@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 {
>  	       regulator-always-on;
>  	};
>  
> +	vcc5v_reg: regulator-vcc-5v {
> +		compatible = "regulator-fixed";
> +		vin-supply = <&main_12v>;
> +		regulator-name = "VCC5V";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
> +		startup-delay-us = <7000>;
> +		enable-active-high;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
>  	/* SY8120B1ABC DC/DC Regulator. */
>  	vddcpu: regulator-vddcpu {
>  		compatible = "pwm-regulator";
> @@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu {
>  				<699000 98>,
>  				<689000 100>;
>  	};
> +
> +	dmics: audio-codec-1 {
> +		compatible = "dmic-codec";
> +		#sound-dai-cells = <0>;
> +		num-channels = <2>;
> +		wakeup-delay-ms = <50>;
> +		sound-name-prefix = "MIC";
> +	};
> +
> +	dioo2133: audio-amplifier-0 {
> +		compatible = "simple-audio-amplifier";
> +		enable-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
> +		VCC-supply = <&vcc5v_reg>;
> +		sound-name-prefix = "10U2";
> +	};
> +
> +	spdif_dir: audio-spdif-in {
> +		compatible = "linux,spdif-dir";
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "DIR";
> +	};
> +
> +	spdif_dit: audio-spdif-out {
> +		compatible = "linux,spdif-dit";
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "DIT";
> +	};
> +
> +	sound {
> +		compatible = "amlogic,axg-sound-card";
> +		model = "aq222";
> +		audio-widgets = "Line", "Lineout";
> +		audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
> +				 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
> +				 <&tdmin_lb>, <&dioo2133>;
> +		audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
> +				"TDMOUT_A IN 1", "FRDDR_B OUT 0",
> +				"TDMOUT_A IN 2", "FRDDR_C OUT 0",
> +				"TDM_A Playback", "TDMOUT_A OUT",
> +				"TDMOUT_B IN 0", "FRDDR_A OUT 1",
> +				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
> +				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
> +				"TDM_B Playback", "TDMOUT_B OUT",
> +				"TDMOUT_C IN 0", "FRDDR_A OUT 2",
> +				"TDMOUT_C IN 1", "FRDDR_B OUT 2",
> +				"TDMOUT_C IN 2", "FRDDR_C OUT 2",
> +				"TDM_C Playback", "TDMOUT_C OUT",
> +				"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
> +				"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
> +				"SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
> +				"SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
> +				"SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
> +				"SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
> +				"TDMIN_A IN 0", "TDM_A Capture",
> +				"TDMIN_A IN 1", "TDM_B Capture",
> +				"TDMIN_A IN 2", "TDM_C Capture",
> +				"TDMIN_A IN 3", "TDM_A Loopback",
> +				"TDMIN_A IN 4", "TDM_B Loopback",
> +				"TDMIN_A IN 5", "TDM_C Loopback",
> +				"TDMIN_B IN 0", "TDM_A Capture",
> +				"TDMIN_B IN 1", "TDM_B Capture",
> +				"TDMIN_B IN 2", "TDM_C Capture",
> +				"TDMIN_B IN 3", "TDM_A Loopback",
> +				"TDMIN_B IN 4", "TDM_B Loopback",
> +				"TDMIN_B IN 5", "TDM_C Loopback",
> +				"TDMIN_C IN 0", "TDM_A Capture",
> +				"TDMIN_C IN 1", "TDM_B Capture",
> +				"TDMIN_C IN 2", "TDM_C Capture",
> +				"TDMIN_C IN 3", "TDM_A Loopback",
> +				"TDMIN_C IN 4", "TDM_B Loopback",
> +				"TDMIN_C IN 5", "TDM_C Loopback",
> +				"TDMIN_LB IN 3", "TDM_A Capture",
> +				"TDMIN_LB IN 4", "TDM_B Capture",
> +				"TDMIN_LB IN 5", "TDM_C Capture",
> +				"TDMIN_LB IN 0", "TDM_A Loopback",
> +				"TDMIN_LB IN 1", "TDM_B Loopback",
> +				"TDMIN_LB IN 2", "TDM_C Loopback",
> +				"TODDR_A IN 0", "TDMIN_A OUT",
> +				"TODDR_B IN 0", "TDMIN_A OUT",
> +				"TODDR_C IN 0", "TDMIN_A OUT",
> +				"TODDR_A IN 1", "TDMIN_B OUT",
> +				"TODDR_B IN 1", "TDMIN_B OUT",
> +				"TODDR_C IN 1", "TDMIN_B OUT",
> +				"TODDR_A IN 2", "TDMIN_C OUT",
> +				"TODDR_B IN 2", "TDMIN_C OUT",
> +				"TODDR_C IN 2", "TDMIN_C OUT",
> +				"TODDR_A IN 3", "SPDIFIN Capture",
> +				"TODDR_B IN 3", "SPDIFIN Capture",
> +				"TODDR_C IN 3", "SPDIFIN Capture",
> +				"TODDR_A IN 6", "TDMIN_LB OUT",
> +				"TODDR_B IN 6", "TDMIN_LB OUT",
> +				"TODDR_C IN 6", "TDMIN_LB OUT",
> +				"10U2 INL", "ACODEC LOLP",
> +				"10U2 INR", "ACODEC LORP",
> +				"Lineout", "10U2 OUTL",
> +				"Lineout", "10U2 OUTR";
> +		clocks = <&clkc_pll CLKID_HIFI_PLL>,
> +				<&clkc_pll CLKID_MPLL0>,
> +				<&clkc_pll CLKID_MPLL1>;
> +		assigned-clocks = <&clkc_pll CLKID_HIFI_PLL>,
> +				  <&clkc_pll CLKID_MPLL0>,
> +				  <&clkc_pll CLKID_MPLL1>;
> +		assigned-clock-rates = <1179648000>,
> +				       <270950400>,
> +				       <338688000>;

Seems like you've got the 2 last PLLs serving the 44.1kHz rate family.
Why is this needed ?

> +
> +		dai-link-0 {
> +			sound-dai = <&frddr_a>;
> +		};
> +
> +		dai-link-1 {
> +			sound-dai = <&frddr_b>;
> +		};
> +
> +		dai-link-2 {
> +			sound-dai = <&frddr_c>;
> +		};
> +
> +		dai-link-3 {
> +			sound-dai = <&toddr_a>;
> +		};
> +
> +		dai-link-4 {
> +			sound-dai = <&toddr_b>;
> +		};
> +
> +		dai-link-5 {
> +			sound-dai = <&toddr_c>;
> +		};
> +
> +		dai-link-6 {
> +			sound-dai = <&tdmif_a>;
> +			dai-format = "i2s";
> +			dai-tdm-slot-tx-mask-0 = <1 1>;
> +			mclk-fs = <256>;
> +			codec-0 {
> +				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
> +			};
> +			codec-1 {
> +				sound-dai = <&toacodec TOACODEC_IN_A>;
> +			};
> +		};
> +
> +		dai-link-7 {
> +			sound-dai = <&tdmif_b>;
> +			dai-format = "i2s";
> +			dai-tdm-slot-tx-mask-0 = <1 1>;
> +			mclk-fs = <256>;
> +			codec-0 {
> +				sound-dai = <&toacodec TOACODEC_IN_B>;
> +			};
> +			codec-1 {
> +				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
> +			};
> +		};
> +
> +		/* 8ch HDMI interface */
> +		dai-link-8 {
> +			sound-dai = <&tdmif_c>;
> +			dai-format = "i2s";
> +			dai-tdm-slot-tx-mask-0 = <1 1>;
> +			dai-tdm-slot-tx-mask-1 = <1 1>;
> +			dai-tdm-slot-tx-mask-2 = <1 1>;
> +			dai-tdm-slot-tx-mask-3 = <1 1>;
> +			mclk-fs = <256>;
> +			codec-0 {
> +				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
> +			};
> +		};
> +
> +		/* spdif hdmi and coax output */
> +		dai-link-9 {
> +			sound-dai = <&spdifout_a>;
> +
> +			codec-0 {
> +				sound-dai = <&spdif_dit>;
> +			};
> +
> +			codec-1 {
> +				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
> +			};
> +		};
> +
> +		/* spdif hdmi interface */
> +		dai-link-10 {
> +			sound-dai = <&spdifout_b>;
> +
> +			codec {
> +				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
> +			};
> +		};
> +
> +		/* spdif coax input */
> +		dai-link-11 {
> +			sound-dai = <&spdifin>;
> +
> +			codec {
> +				sound-dai = <&spdif_dir>;
> +			};
> +		};
> +
> +		dai-link-12 {
> +			sound-dai = <&toacodec TOACODEC_OUT>;
> +
> +			codec {
> +				sound-dai = <&acodec>;
> +			};
> +		};
> +	};
>  };
>  
>  &pwm_ef {
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index dfc0a30a6e61..a6c2c83eea16 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -11,6 +11,11 @@
>  #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
>  #include <dt-bindings/power/meson-s4-power.h>
>  #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
> +#include <dt-bindings/clock/axg-audio-clkc.h>
> +#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
> +#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
> +#include <dt-bindings/sound/meson-g12a-toacodec.h>
> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
>  
>  / {
>  	cpus {
> @@ -863,4 +868,360 @@ emmc: mmc@fe08c000 {
>  			assigned-clock-rates = <24000000>;
>  		};
>  	};
> +
> +	tdmif_a: audio-controller-0 {
> +		compatible = "amlogic,axg-tdm-iface";
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TDM_A";
> +		clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_A_MCLK>;
> +		clock-names = "sclk", "lrclk","mclk";
> +	};
> +
> +	tdmif_b: audio-controller-1 {
> +		compatible = "amlogic,axg-tdm-iface";
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TDM_B";
> +		clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_B_MCLK>;
> +		clock-names = "sclk", "lrclk","mclk";
> +	};
> +
> +	tdmif_c: audio-controller-2 {
> +		compatible = "amlogic,axg-tdm-iface";
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TDM_C";
> +		clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_MST_C_MCLK>;
> +		clock-names = "sclk", "lrclk","mclk";
> +	};
> +};
> +
> +&apb4 {
> +	acodec: audio-controller@1a000 {
> +		compatible = "amlogic,t9015";
> +		reg = <0x0 0x1a000 0x0 0x14>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "ACODEC";
> +		clocks = <&clkc_periphs CLKID_ACODEC>;
> +		clock-names = "pclk";
> +		resets = <&reset RESET_ACODEC>;
> +		AVDD-supply = <&vddio_ao1v8>;
> +	};
> +
> +	clkc_audio: clock-controller@330000 {
> +		compatible = "amlogic,s4-audio-clkc";
> +		reg = <0x0 0x330000 0x0 0xd8>,
> +			  <0x0 0x330e80 0x0 0x10>;
> +		#clock-cells = <1>;
> +		#reset-cells = <1>;
> +		power-domains = <&pwrc PWRC_S4_AUDIO_ID>;
> +		clocks = <&clkc_periphs CLKID_AUDIO>,
> +			 <&clkc_pll CLKID_MPLL0>,
> +			 <&clkc_pll CLKID_MPLL1>,
> +			 <&clkc_pll CLKID_MPLL2>,
> +			 <&clkc_pll CLKID_MPLL3>,
> +			 <&clkc_pll CLKID_HIFI_PLL>,
> +			 <&clkc_pll CLKID_FCLK_DIV3>,
> +			 <&clkc_pll CLKID_FCLK_DIV4>,
> +			 <&clkc_pll CLKID_FCLK_DIV5>;
> +		clock-names = "pclk",
> +				  "mst_in0",
> +				  "mst_in1",
> +				  "mst_in2",
> +				  "mst_in3",
> +				  "mst_in4",
> +				  "mst_in5",
> +				  "mst_in6",
> +				  "mst_in7";
> +		resets = <&reset RESET_AUDIO>;
> +	};
> +
> +	toddr_a: audio-controller@330100 {
> +		compatible = "amlogic,sm1-toddr",
> +				 "amlogic,axg-toddr";

no s4 compat ?

> +		reg = <0x0 0x330100 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TODDR_A";
> +		interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
> +		resets = <&arb AXG_ARB_TODDR_A>,
> +			 <&clkc_audio AUD_RESET_TODDR_A>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <8192>;
> +	};
> +
> +	toddr_b: audio-controller@330140 {
> +		compatible = "amlogic,sm1-toddr",
> +				 "amlogic,axg-toddr";
> +		reg = <0x0 0x330140 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TODDR_B";
> +		interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
> +		resets = <&arb AXG_ARB_TODDR_B>,
> +			 <&clkc_audio AUD_RESET_TODDR_B>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	toddr_c: audio-controller@330180 {
> +		compatible = "amlogic,sm1-toddr",
> +				 "amlogic,axg-toddr";
> +		reg = <0x0 0x330180 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TODDR_C";
> +		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
> +		resets = <&arb AXG_ARB_TODDR_C>,
> +			 <&clkc_audio AUD_RESET_TODDR_C>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	frddr_a: audio-controller@3301c0 {
> +		compatible = "amlogic,sm1-frddr",
> +				 "amlogic,axg-frddr";
> +		reg = <0x0 0x3301c0 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "FRDDR_A";
> +		interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
> +		resets = <&arb AXG_ARB_FRDDR_A>,
> +			 <&clkc_audio AUD_RESET_FRDDR_A>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <512>;
> +	};
> +
> +	frddr_b: audio-controller@330200 {
> +		compatible = "amlogic,sm1-frddr",
> +				 "amlogic,axg-frddr";
> +		reg = <0x0 0x330200 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "FRDDR_B";
> +		interrupts = <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
> +		resets = <&arb AXG_ARB_FRDDR_B>,
> +			 <&clkc_audio AUD_RESET_FRDDR_B>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	frddr_c: audio-controller@330240 {
> +		compatible = "amlogic,sm1-frddr",
> +				 "amlogic,axg-frddr";
> +		reg = <0x0 0x330240 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "FRDDR_C";
> +		interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
> +		resets = <&arb AXG_ARB_FRDDR_C>,
> +			 <&clkc_audio AUD_RESET_FRDDR_C>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	arb: reset-controller@330280 {
> +		compatible = "amlogic,meson-sm1-audio-arb";
> +		reg = <0x0 0x330280 0x0 0x4>;
> +		#reset-cells = <1>;
> +		clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
> +	};
> +
> +	tdmin_a: audio-controller@330300 {
> +		compatible = "amlogic,sm1-tdmin";
> +		reg = <0x0 0x330300 0x0 0x40>;
> +		sound-name-prefix = "TDMIN_A";
> +		resets = <&clkc_audio AUD_RESET_TDMIN_A>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	tdmin_b: audio-controller@330340 {
> +		compatible = "amlogic,sm1-tdmin";
> +		reg = <0x0 0x330340 0x0 0x40>;
> +		sound-name-prefix = "TDMIN_B";
> +		resets = <&clkc_audio AUD_RESET_TDMIN_B>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	tdmin_c: audio-controller@330380 {
> +		compatible = "amlogic,sm1-tdmin";
> +		reg = <0x0 0x330380 0x0 0x40>;
> +		sound-name-prefix = "TDMIN_C";
> +		resets = <&clkc_audio AUD_RESET_TDMIN_C>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	tdmin_lb: audio-controller@3303c0 {
> +		compatible = "amlogic,sm1-tdmin";
> +		reg = <0x0 0x3303c0 0x0 0x40>;
> +		sound-name-prefix = "TDMIN_LB";
> +		resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	spdifin: audio-controller@330400 {
> +		compatible = "amlogic,g12a-spdifin",
> +				 "amlogic,axg-spdifin";
> +		reg = <0x0 0x330400 0x0 0x30>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "SPDIFIN";
> +		interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
> +		<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
> +		clock-names = "pclk", "refclk";
> +		resets = <&clkc_audio AUD_RESET_SPDIFIN>;
> +	};
> +
> +	spdifout_a: audio-controller@330480 {
> +		compatible = "amlogic,g12a-spdifout",
> +				 "amlogic,axg-spdifout";
> +		reg = <0x0 0x330480 0x0 0x50>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "SPDIFOUT_A";
> +		clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
> +		<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
> +		clock-names = "pclk", "mclk";
> +		resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
> +	};
> +
> +	tdmout_a: audio-controller@330500 {
> +		compatible = "amlogic,sm1-tdmout";
> +		reg = <0x0 0x330500 0x0 0x40>;
> +		sound-name-prefix = "TDMOUT_A";
> +		resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	tdmout_b: audio-controller@330540 {
> +		compatible = "amlogic,sm1-tdmout";
> +		reg = <0x0 0x330540 0x0 0x40>;
> +		sound-name-prefix = "TDMOUT_B";
> +		resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	tdmout_c: audio-controller@330580 {
> +		compatible = "amlogic,sm1-tdmout";
> +		reg = <0x0 0x330580 0x0 0x40>;
> +		sound-name-prefix = "TDMOUT_C";
> +		resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
> +		clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
> +			 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
> +		clock-names = "pclk", "sclk", "sclk_sel",
> +				  "lrclk", "lrclk_sel";
> +	};
> +
> +	spdifout_b: audio-controller@330680 {
> +		compatible = "amlogic,g12a-spdifout",
> +				 "amlogic,axg-spdifout";
> +		reg = <0x0 0x330680 0x0 0x50>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "SPDIFOUT_B";
> +		clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
> +			 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
> +		clock-names = "pclk", "mclk";
> +		resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
> +	};
> +
> +	toacodec: audio-controller@330740 {
> +		compatible = "amlogic,s4-toacodec",
> +				 "amlogic,g12a-toacodec";
> +		reg = <0x0 0x330740 0x0 0x4>;
> +		sound-name-prefix = "TOACODEC";
> +		#sound-dai-cells = <1>;
> +		resets = <&clkc_audio AUD_RESET_TOACODEC>;
> +	};
> +
> +	tohdmitx: audio-controller@330744 {
> +		compatible = "amlogic,sm1-tohdmitx",
> +				 "amlogic,g12a-tohdmitx";
> +		reg = <0x0 0x330744 0x0 0x4>;
> +		#sound-dai-cells = <1>;
> +		sound-name-prefix = "TOHDMITX";
> +		resets = <&clkc_audio AUD_RESET_TOHDMITX>;
> +	};
> +
> +	toddr_d: audio-controller@330840 {
> +		compatible = "amlogic,sm1-toddr",
> +				 "amlogic,axg-toddr";
> +		reg = <0x0 0x330840 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "TODDR_D";
> +		interrupts = <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
> +		resets = <&arb AXG_ARB_TODDR_D>,
> +			 <&clkc_audio AUD_RESET_TODDR_D>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	frddr_d: audio-controller@330880 {
> +		 compatible = "amlogic,sm1-frddr",
> +				  "amlogic,axg-frddr";
> +		reg = <0x0 0x330880 0x0 0x2c>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "FRDDR_D";
> +		interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
> +		clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
> +		resets = <&arb AXG_ARB_FRDDR_D>,
> +			 <&clkc_audio AUD_RESET_FRDDR_D>;
> +		reset-names = "arb", "rst";
> +		amlogic,fifo-depth = <256>;
> +	};
> +
> +	pdm: audio-controller@331000 {
> +		compatible = "amlogic,sm1-pdm",
> +			     "amlogic,axg-pdm";
> +		reg = <0x0 0x331000 0x0 0x34>;
> +		#sound-dai-cells = <0>;
> +		sound-name-prefix = "PDM";
> +		clocks = <&clkc_audio AUD_CLKID_PDM>,
> +			 <&clkc_audio AUD_CLKID_PDM_DCLK>,
> +			 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
> +		clock-names = "pclk", "dclk", "sysclk";
> +		resets = <&clkc_audio AUD_RESET_PDM>;
> +	};
>  };

-- 
Jerome

Re: [PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio

[Jiebing Chen]

在 2026/1/26 19:19, Jerome Brunet 写道:
> [ EXTERNAL EMAIL ]
>
> On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:
>
>> From: Jiebing Chen <jiebing.chen@amlogic.com>
>>
>> Add basic audio driver support for the Amlogic S4 based
>> Amlogic AQ222 board.
>>
>> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
>> ---
>>   .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
>>   arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
>>   2 files changed, 583 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>> index 0a3f81ea0fb0..43493bc9da46 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>> @@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 {
>>               regulator-always-on;
>>        };
>>
>> +     vcc5v_reg: regulator-vcc-5v {
>> +             compatible = "regulator-fixed";
>> +             vin-supply = <&main_12v>;
>> +             regulator-name = "VCC5V";
>> +             regulator-min-microvolt = <5000000>;
>> +             regulator-max-microvolt = <5000000>;
>> +             gpio = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
>> +             startup-delay-us = <7000>;
>> +             enable-active-high;
>> +             regulator-boot-on;
>> +             regulator-always-on;
>> +     };
>> +
>>        /* SY8120B1ABC DC/DC Regulator. */
>>        vddcpu: regulator-vddcpu {
>>                compatible = "pwm-regulator";
>> @@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu {
>>                                <699000 98>,
>>                                <689000 100>;
>>        };
>> +
>> +     dmics: audio-codec-1 {
>> +             compatible = "dmic-codec";
>> +             #sound-dai-cells = <0>;
>> +             num-channels = <2>;
>> +             wakeup-delay-ms = <50>;
>> +             sound-name-prefix = "MIC";
>> +     };
>> +
>> +     dioo2133: audio-amplifier-0 {
>> +             compatible = "simple-audio-amplifier";
>> +             enable-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
>> +             VCC-supply = <&vcc5v_reg>;
>> +             sound-name-prefix = "10U2";
>> +     };
>> +
>> +     spdif_dir: audio-spdif-in {
>> +             compatible = "linux,spdif-dir";
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "DIR";
>> +     };
>> +
>> +     spdif_dit: audio-spdif-out {
>> +             compatible = "linux,spdif-dit";
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "DIT";
>> +     };
>> +
>> +     sound {
>> +             compatible = "amlogic,axg-sound-card";
>> +             model = "aq222";
>> +             audio-widgets = "Line", "Lineout";
>> +             audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
>> +                              <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
>> +                              <&tdmin_lb>, <&dioo2133>;
>> +             audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
>> +                             "TDMOUT_A IN 1", "FRDDR_B OUT 0",
>> +                             "TDMOUT_A IN 2", "FRDDR_C OUT 0",
>> +                             "TDM_A Playback", "TDMOUT_A OUT",
>> +                             "TDMOUT_B IN 0", "FRDDR_A OUT 1",
>> +                             "TDMOUT_B IN 1", "FRDDR_B OUT 1",
>> +                             "TDMOUT_B IN 2", "FRDDR_C OUT 1",
>> +                             "TDM_B Playback", "TDMOUT_B OUT",
>> +                             "TDMOUT_C IN 0", "FRDDR_A OUT 2",
>> +                             "TDMOUT_C IN 1", "FRDDR_B OUT 2",
>> +                             "TDMOUT_C IN 2", "FRDDR_C OUT 2",
>> +                             "TDM_C Playback", "TDMOUT_C OUT",
>> +                             "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
>> +                             "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
>> +                             "SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
>> +                             "SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
>> +                             "SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
>> +                             "SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
>> +                             "TDMIN_A IN 0", "TDM_A Capture",
>> +                             "TDMIN_A IN 1", "TDM_B Capture",
>> +                             "TDMIN_A IN 2", "TDM_C Capture",
>> +                             "TDMIN_A IN 3", "TDM_A Loopback",
>> +                             "TDMIN_A IN 4", "TDM_B Loopback",
>> +                             "TDMIN_A IN 5", "TDM_C Loopback",
>> +                             "TDMIN_B IN 0", "TDM_A Capture",
>> +                             "TDMIN_B IN 1", "TDM_B Capture",
>> +                             "TDMIN_B IN 2", "TDM_C Capture",
>> +                             "TDMIN_B IN 3", "TDM_A Loopback",
>> +                             "TDMIN_B IN 4", "TDM_B Loopback",
>> +                             "TDMIN_B IN 5", "TDM_C Loopback",
>> +                             "TDMIN_C IN 0", "TDM_A Capture",
>> +                             "TDMIN_C IN 1", "TDM_B Capture",
>> +                             "TDMIN_C IN 2", "TDM_C Capture",
>> +                             "TDMIN_C IN 3", "TDM_A Loopback",
>> +                             "TDMIN_C IN 4", "TDM_B Loopback",
>> +                             "TDMIN_C IN 5", "TDM_C Loopback",
>> +                             "TDMIN_LB IN 3", "TDM_A Capture",
>> +                             "TDMIN_LB IN 4", "TDM_B Capture",
>> +                             "TDMIN_LB IN 5", "TDM_C Capture",
>> +                             "TDMIN_LB IN 0", "TDM_A Loopback",
>> +                             "TDMIN_LB IN 1", "TDM_B Loopback",
>> +                             "TDMIN_LB IN 2", "TDM_C Loopback",
>> +                             "TODDR_A IN 0", "TDMIN_A OUT",
>> +                             "TODDR_B IN 0", "TDMIN_A OUT",
>> +                             "TODDR_C IN 0", "TDMIN_A OUT",
>> +                             "TODDR_A IN 1", "TDMIN_B OUT",
>> +                             "TODDR_B IN 1", "TDMIN_B OUT",
>> +                             "TODDR_C IN 1", "TDMIN_B OUT",
>> +                             "TODDR_A IN 2", "TDMIN_C OUT",
>> +                             "TODDR_B IN 2", "TDMIN_C OUT",
>> +                             "TODDR_C IN 2", "TDMIN_C OUT",
>> +                             "TODDR_A IN 3", "SPDIFIN Capture",
>> +                             "TODDR_B IN 3", "SPDIFIN Capture",
>> +                             "TODDR_C IN 3", "SPDIFIN Capture",
>> +                             "TODDR_A IN 6", "TDMIN_LB OUT",
>> +                             "TODDR_B IN 6", "TDMIN_LB OUT",
>> +                             "TODDR_C IN 6", "TDMIN_LB OUT",
>> +                             "10U2 INL", "ACODEC LOLP",
>> +                             "10U2 INR", "ACODEC LORP",
>> +                             "Lineout", "10U2 OUTL",
>> +                             "Lineout", "10U2 OUTR";
>> +             clocks = <&clkc_pll CLKID_HIFI_PLL>,
>> +                             <&clkc_pll CLKID_MPLL0>,
>> +                             <&clkc_pll CLKID_MPLL1>;
>> +             assigned-clocks = <&clkc_pll CLKID_HIFI_PLL>,
>> +                               <&clkc_pll CLKID_MPLL0>,
>> +                               <&clkc_pll CLKID_MPLL1>;
>> +             assigned-clock-rates = <1179648000>,
>> +                                    <270950400>,
>> +                                    <338688000>;
> Seems like you've got the 2 last PLLs serving the 44.1kHz rate family.
> Why is this needed ?

Hi, jermoe

Considering that the sample rate is up to 176.4K

PLL0 270.950400M max support 24bit *176.4k, 32ch for tdm mode

Perhaps PLL1 PLL1 calculation error , it should be set up 361.2672M for 
32bit * 176.4k * 32ch.

In fact, most situations are limited by the speed of the IO pin.

Can we remove MPLL1 here and keep MPLL0?

>> +
>> +             dai-link-0 {
>> +                     sound-dai = <&frddr_a>;
>> +             };
>> +
>> +             dai-link-1 {
>> +                     sound-dai = <&frddr_b>;
>> +             };
>> +
>> +             dai-link-2 {
>> +                     sound-dai = <&frddr_c>;
>> +             };
>> +
>> +             dai-link-3 {
>> +                     sound-dai = <&toddr_a>;
>> +             };
>> +
>> +             dai-link-4 {
>> +                     sound-dai = <&toddr_b>;
>> +             };
>> +
>> +             dai-link-5 {
>> +                     sound-dai = <&toddr_c>;
>> +             };
>> +
>> +             dai-link-6 {
>> +                     sound-dai = <&tdmif_a>;
>> +                     dai-format = "i2s";
>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>> +                     mclk-fs = <256>;
>> +                     codec-0 {
>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
>> +                     };
>> +                     codec-1 {
>> +                             sound-dai = <&toacodec TOACODEC_IN_A>;
>> +                     };
>> +             };
>> +
>> +             dai-link-7 {
>> +                     sound-dai = <&tdmif_b>;
>> +                     dai-format = "i2s";
>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>> +                     mclk-fs = <256>;
>> +                     codec-0 {
>> +                             sound-dai = <&toacodec TOACODEC_IN_B>;
>> +                     };
>> +                     codec-1 {
>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
>> +                     };
>> +             };
>> +
>> +             /* 8ch HDMI interface */
>> +             dai-link-8 {
>> +                     sound-dai = <&tdmif_c>;
>> +                     dai-format = "i2s";
>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>> +                     dai-tdm-slot-tx-mask-1 = <1 1>;
>> +                     dai-tdm-slot-tx-mask-2 = <1 1>;
>> +                     dai-tdm-slot-tx-mask-3 = <1 1>;
>> +                     mclk-fs = <256>;
>> +                     codec-0 {
>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
>> +                     };
>> +             };
>> +
>> +             /* spdif hdmi and coax output */
>> +             dai-link-9 {
>> +                     sound-dai = <&spdifout_a>;
>> +
>> +                     codec-0 {
>> +                             sound-dai = <&spdif_dit>;
>> +                     };
>> +
>> +                     codec-1 {
>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
>> +                     };
>> +             };
>> +
>> +             /* spdif hdmi interface */
>> +             dai-link-10 {
>> +                     sound-dai = <&spdifout_b>;
>> +
>> +                     codec {
>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
>> +                     };
>> +             };
>> +
>> +             /* spdif coax input */
>> +             dai-link-11 {
>> +                     sound-dai = <&spdifin>;
>> +
>> +                     codec {
>> +                             sound-dai = <&spdif_dir>;
>> +                     };
>> +             };
>> +
>> +             dai-link-12 {
>> +                     sound-dai = <&toacodec TOACODEC_OUT>;
>> +
>> +                     codec {
>> +                             sound-dai = <&acodec>;
>> +                     };
>> +             };
>> +     };
>>   };
>>
>>   &pwm_ef {
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> index dfc0a30a6e61..a6c2c83eea16 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> @@ -11,6 +11,11 @@
>>   #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
>>   #include <dt-bindings/power/meson-s4-power.h>
>>   #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
>> +#include <dt-bindings/clock/axg-audio-clkc.h>
>> +#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
>> +#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
>> +#include <dt-bindings/sound/meson-g12a-toacodec.h>
>> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
>>
>>   / {
>>        cpus {
>> @@ -863,4 +868,360 @@ emmc: mmc@fe08c000 {
>>                        assigned-clock-rates = <24000000>;
>>                };
>>        };
>> +
>> +     tdmif_a: audio-controller-0 {
>> +             compatible = "amlogic,axg-tdm-iface";
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TDM_A";
>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_A_MCLK>;
>> +             clock-names = "sclk", "lrclk","mclk";
>> +     };
>> +
>> +     tdmif_b: audio-controller-1 {
>> +             compatible = "amlogic,axg-tdm-iface";
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TDM_B";
>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_B_MCLK>;
>> +             clock-names = "sclk", "lrclk","mclk";
>> +     };
>> +
>> +     tdmif_c: audio-controller-2 {
>> +             compatible = "amlogic,axg-tdm-iface";
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TDM_C";
>> +             clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_MST_C_MCLK>;
>> +             clock-names = "sclk", "lrclk","mclk";
>> +     };
>> +};
>> +
>> +&apb4 {
>> +     acodec: audio-controller@1a000 {
>> +             compatible = "amlogic,t9015";
>> +             reg = <0x0 0x1a000 0x0 0x14>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "ACODEC";
>> +             clocks = <&clkc_periphs CLKID_ACODEC>;
>> +             clock-names = "pclk";
>> +             resets = <&reset RESET_ACODEC>;
>> +             AVDD-supply = <&vddio_ao1v8>;
>> +     };
>> +
>> +     clkc_audio: clock-controller@330000 {
>> +             compatible = "amlogic,s4-audio-clkc";
>> +             reg = <0x0 0x330000 0x0 0xd8>,
>> +                       <0x0 0x330e80 0x0 0x10>;
>> +             #clock-cells = <1>;
>> +             #reset-cells = <1>;
>> +             power-domains = <&pwrc PWRC_S4_AUDIO_ID>;
>> +             clocks = <&clkc_periphs CLKID_AUDIO>,
>> +                      <&clkc_pll CLKID_MPLL0>,
>> +                      <&clkc_pll CLKID_MPLL1>,
>> +                      <&clkc_pll CLKID_MPLL2>,
>> +                      <&clkc_pll CLKID_MPLL3>,
>> +                      <&clkc_pll CLKID_HIFI_PLL>,
>> +                      <&clkc_pll CLKID_FCLK_DIV3>,
>> +                      <&clkc_pll CLKID_FCLK_DIV4>,
>> +                      <&clkc_pll CLKID_FCLK_DIV5>;
>> +             clock-names = "pclk",
>> +                               "mst_in0",
>> +                               "mst_in1",
>> +                               "mst_in2",
>> +                               "mst_in3",
>> +                               "mst_in4",
>> +                               "mst_in5",
>> +                               "mst_in6",
>> +                               "mst_in7";
>> +             resets = <&reset RESET_AUDIO>;
>> +     };
>> +
>> +     toddr_a: audio-controller@330100 {
>> +             compatible = "amlogic,sm1-toddr",
>> +                              "amlogic,axg-toddr";
> no s4 compat ?
>
>> +             reg = <0x0 0x330100 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TODDR_A";
>> +             interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
>> +             resets = <&arb AXG_ARB_TODDR_A>,
>> +                      <&clkc_audio AUD_RESET_TODDR_A>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <8192>;
>> +     };
>> +
>> +     toddr_b: audio-controller@330140 {
>> +             compatible = "amlogic,sm1-toddr",
>> +                              "amlogic,axg-toddr";
>> +             reg = <0x0 0x330140 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TODDR_B";
>> +             interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
>> +             resets = <&arb AXG_ARB_TODDR_B>,
>> +                      <&clkc_audio AUD_RESET_TODDR_B>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     toddr_c: audio-controller@330180 {
>> +             compatible = "amlogic,sm1-toddr",
>> +                              "amlogic,axg-toddr";
>> +             reg = <0x0 0x330180 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TODDR_C";
>> +             interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
>> +             resets = <&arb AXG_ARB_TODDR_C>,
>> +                      <&clkc_audio AUD_RESET_TODDR_C>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     frddr_a: audio-controller@3301c0 {
>> +             compatible = "amlogic,sm1-frddr",
>> +                              "amlogic,axg-frddr";
>> +             reg = <0x0 0x3301c0 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "FRDDR_A";
>> +             interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
>> +             resets = <&arb AXG_ARB_FRDDR_A>,
>> +                      <&clkc_audio AUD_RESET_FRDDR_A>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <512>;
>> +     };
>> +
>> +     frddr_b: audio-controller@330200 {
>> +             compatible = "amlogic,sm1-frddr",
>> +                              "amlogic,axg-frddr";
>> +             reg = <0x0 0x330200 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "FRDDR_B";
>> +             interrupts = <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
>> +             resets = <&arb AXG_ARB_FRDDR_B>,
>> +                      <&clkc_audio AUD_RESET_FRDDR_B>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     frddr_c: audio-controller@330240 {
>> +             compatible = "amlogic,sm1-frddr",
>> +                              "amlogic,axg-frddr";
>> +             reg = <0x0 0x330240 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "FRDDR_C";
>> +             interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
>> +             resets = <&arb AXG_ARB_FRDDR_C>,
>> +                      <&clkc_audio AUD_RESET_FRDDR_C>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     arb: reset-controller@330280 {
>> +             compatible = "amlogic,meson-sm1-audio-arb";
>> +             reg = <0x0 0x330280 0x0 0x4>;
>> +             #reset-cells = <1>;
>> +             clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
>> +     };
>> +
>> +     tdmin_a: audio-controller@330300 {
>> +             compatible = "amlogic,sm1-tdmin";
>> +             reg = <0x0 0x330300 0x0 0x40>;
>> +             sound-name-prefix = "TDMIN_A";
>> +             resets = <&clkc_audio AUD_RESET_TDMIN_A>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     tdmin_b: audio-controller@330340 {
>> +             compatible = "amlogic,sm1-tdmin";
>> +             reg = <0x0 0x330340 0x0 0x40>;
>> +             sound-name-prefix = "TDMIN_B";
>> +             resets = <&clkc_audio AUD_RESET_TDMIN_B>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     tdmin_c: audio-controller@330380 {
>> +             compatible = "amlogic,sm1-tdmin";
>> +             reg = <0x0 0x330380 0x0 0x40>;
>> +             sound-name-prefix = "TDMIN_C";
>> +             resets = <&clkc_audio AUD_RESET_TDMIN_C>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     tdmin_lb: audio-controller@3303c0 {
>> +             compatible = "amlogic,sm1-tdmin";
>> +             reg = <0x0 0x3303c0 0x0 0x40>;
>> +             sound-name-prefix = "TDMIN_LB";
>> +             resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     spdifin: audio-controller@330400 {
>> +             compatible = "amlogic,g12a-spdifin",
>> +                              "amlogic,axg-spdifin";
>> +             reg = <0x0 0x330400 0x0 0x30>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "SPDIFIN";
>> +             interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
>> +             <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
>> +             clock-names = "pclk", "refclk";
>> +             resets = <&clkc_audio AUD_RESET_SPDIFIN>;
>> +     };
>> +
>> +     spdifout_a: audio-controller@330480 {
>> +             compatible = "amlogic,g12a-spdifout",
>> +                              "amlogic,axg-spdifout";
>> +             reg = <0x0 0x330480 0x0 0x50>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "SPDIFOUT_A";
>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
>> +             <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
>> +             clock-names = "pclk", "mclk";
>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
>> +     };
>> +
>> +     tdmout_a: audio-controller@330500 {
>> +             compatible = "amlogic,sm1-tdmout";
>> +             reg = <0x0 0x330500 0x0 0x40>;
>> +             sound-name-prefix = "TDMOUT_A";
>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     tdmout_b: audio-controller@330540 {
>> +             compatible = "amlogic,sm1-tdmout";
>> +             reg = <0x0 0x330540 0x0 0x40>;
>> +             sound-name-prefix = "TDMOUT_B";
>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     tdmout_c: audio-controller@330580 {
>> +             compatible = "amlogic,sm1-tdmout";
>> +             reg = <0x0 0x330580 0x0 0x40>;
>> +             sound-name-prefix = "TDMOUT_C";
>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
>> +             clock-names = "pclk", "sclk", "sclk_sel",
>> +                               "lrclk", "lrclk_sel";
>> +     };
>> +
>> +     spdifout_b: audio-controller@330680 {
>> +             compatible = "amlogic,g12a-spdifout",
>> +                              "amlogic,axg-spdifout";
>> +             reg = <0x0 0x330680 0x0 0x50>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "SPDIFOUT_B";
>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
>> +                      <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
>> +             clock-names = "pclk", "mclk";
>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
>> +     };
>> +
>> +     toacodec: audio-controller@330740 {
>> +             compatible = "amlogic,s4-toacodec",
>> +                              "amlogic,g12a-toacodec";
>> +             reg = <0x0 0x330740 0x0 0x4>;
>> +             sound-name-prefix = "TOACODEC";
>> +             #sound-dai-cells = <1>;
>> +             resets = <&clkc_audio AUD_RESET_TOACODEC>;
>> +     };
>> +
>> +     tohdmitx: audio-controller@330744 {
>> +             compatible = "amlogic,sm1-tohdmitx",
>> +                              "amlogic,g12a-tohdmitx";
>> +             reg = <0x0 0x330744 0x0 0x4>;
>> +             #sound-dai-cells = <1>;
>> +             sound-name-prefix = "TOHDMITX";
>> +             resets = <&clkc_audio AUD_RESET_TOHDMITX>;
>> +     };
>> +
>> +     toddr_d: audio-controller@330840 {
>> +             compatible = "amlogic,sm1-toddr",
>> +                              "amlogic,axg-toddr";
>> +             reg = <0x0 0x330840 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "TODDR_D";
>> +             interrupts = <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
>> +             resets = <&arb AXG_ARB_TODDR_D>,
>> +                      <&clkc_audio AUD_RESET_TODDR_D>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     frddr_d: audio-controller@330880 {
>> +              compatible = "amlogic,sm1-frddr",
>> +                               "amlogic,axg-frddr";
>> +             reg = <0x0 0x330880 0x0 0x2c>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "FRDDR_D";
>> +             interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
>> +             resets = <&arb AXG_ARB_FRDDR_D>,
>> +                      <&clkc_audio AUD_RESET_FRDDR_D>;
>> +             reset-names = "arb", "rst";
>> +             amlogic,fifo-depth = <256>;
>> +     };
>> +
>> +     pdm: audio-controller@331000 {
>> +             compatible = "amlogic,sm1-pdm",
>> +                          "amlogic,axg-pdm";
>> +             reg = <0x0 0x331000 0x0 0x34>;
>> +             #sound-dai-cells = <0>;
>> +             sound-name-prefix = "PDM";
>> +             clocks = <&clkc_audio AUD_CLKID_PDM>,
>> +                      <&clkc_audio AUD_CLKID_PDM_DCLK>,
>> +                      <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
>> +             clock-names = "pclk", "dclk", "sysclk";
>> +             resets = <&clkc_audio AUD_RESET_PDM>;
>> +     };
>>   };
> --
> Jerome

Re: [PATCH v6 3/5] ASoC: meson: g12a-toacodec: Add S4 tocodec driver

[Jiebing Chen]

在 2026/1/26 19:04, Jerome Brunet 写道:
> [ EXTERNAL EMAIL ]
>
> On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:
>
>> From: Jiebing Chen <jiebing.chen@amlogic.com>
>>
>> The S4 requires additional clock control bits to be turn on while enabled.
>> The S4 has 8 TDM lanes, instead of 4 on previous SoC.
>> Update the widget accordingly.
>>
>> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
>> ---
>>   sound/soc/meson/g12a-toacodec.c | 36 ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 36 insertions(+)
>>
>> diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacodec.c
>> index a95375b53f0a..a7f9ac2d08f7 100644
>> --- a/sound/soc/meson/g12a-toacodec.c
>> +++ b/sound/soc/meson/g12a-toacodec.c
>> @@ -41,6 +41,9 @@
>>   #define  CTRL0_BCLK_SEL_LSB          4
>>   #define  CTRL0_MCLK_SEL                      GENMASK(2, 0)
>>
>> +#define CTRL0_BCLK_ENABLE_SHIFT              30
>> +#define CTRL0_MCLK_ENABLE_SHIFT              29
>> +
>>   #define TOACODEC_OUT_CHMAX           2
>>
>>   struct g12a_toacodec {
>> @@ -141,6 +144,13 @@ static const struct snd_soc_dapm_widget sm1_toacodec_widgets[] = {
>>                            &g12a_toacodec_out_enable),
>>   };
>>
>> +static const struct snd_soc_dapm_widget s4_toacodec_widgets[] = {
>> +     SND_SOC_DAPM_MUX("SRC", TOACODEC_CTRL0, CTRL0_BCLK_ENABLE_SHIFT, 0,
>> +                      &sm1_toacodec_mux),
>> +     SND_SOC_DAPM_SWITCH("OUT EN", TOACODEC_CTRL0, CTRL0_MCLK_ENABLE_SHIFT, 0,
>> +                         &g12a_toacodec_out_enable),
> I guess that works but it is a bit hackish to hijack the output control
> to enable a something really clock related. A supply widget connect to
> this widget would be more approriate I think

Hi, jerome

Thanks for your suggestion. A supply widget is  appropriate.

I will add the supply widget in next version

>> +};
>> +
>>   static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
>>                                         struct snd_pcm_hw_params *params,
>>                                         struct snd_soc_dai *dai)
>> @@ -234,6 +244,10 @@ static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
>>        SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
>>   };
>>
>> +static const struct snd_kcontrol_new s4_toacodec_controls[] = {
>> +     SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 7, 0),
>> +};
>> +
>>   static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
>>        .probe                  = g12a_toacodec_component_probe,
>>        .controls               = g12a_toacodec_controls,
>> @@ -256,6 +270,17 @@ static const struct snd_soc_component_driver sm1_toacodec_component_drv = {
>>        .endianness             = 1,
>>   };
>>
>> +static const struct snd_soc_component_driver s4_toacodec_component_drv = {
>> +     .probe                  = sm1_toacodec_component_probe,
>> +     .controls               = s4_toacodec_controls,
>> +     .num_controls           = ARRAY_SIZE(s4_toacodec_controls),
>> +     .dapm_widgets           = s4_toacodec_widgets,
>> +     .num_dapm_widgets       = ARRAY_SIZE(s4_toacodec_widgets),
>> +     .dapm_routes            = g12a_toacodec_routes,
>> +     .num_dapm_routes        = ARRAY_SIZE(g12a_toacodec_routes),
>> +     .endianness             = 1,
>> +};
>> +
>>   static const struct regmap_config g12a_toacodec_regmap_cfg = {
>>        .reg_bits       = 32,
>>        .val_bits       = 32,
>> @@ -276,6 +301,13 @@ static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
>>        .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 6),
>>   };
>>
>> +static const struct g12a_toacodec_match_data s4_toacodec_match_data = {
>> +     .component_drv  = &s4_toacodec_component_drv,
>> +     .field_dat_sel  = REG_FIELD(TOACODEC_CTRL0, 19, 20),
>> +     .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 12, 14),
>> +     .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 6),
>> +};
>> +
>>   static const struct of_device_id g12a_toacodec_of_match[] = {
>>        {
>>                .compatible = "amlogic,g12a-toacodec",
>> @@ -285,6 +317,10 @@ static const struct of_device_id g12a_toacodec_of_match[] = {
>>                .compatible = "amlogic,sm1-toacodec",
>>                .data = &sm1_toacodec_match_data,
>>        },
>> +     {
>> +             .compatible = "amlogic,s4-toacodec",
>> +             .data = &s4_toacodec_match_data,
>> +     },
>>        {}
>>   };
>>   MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);
> --
> Jerome

Re: [PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio

[Jerome Brunet]

On lun. 26 janv. 2026 at 21:20, Jiebing Chen <jiebing.chen@amlogic.com> wrote:

> 在 2026/1/26 19:19, Jerome Brunet 写道:
>> [ EXTERNAL EMAIL ]
>>
>> On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:
>>
>>> From: Jiebing Chen <jiebing.chen@amlogic.com>
>>>
>>> Add basic audio driver support for the Amlogic S4 based
>>> Amlogic AQ222 board.
>>>
>>> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
>>> ---
>>>   .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
>>>   arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
>>>   2 files changed, 583 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>> index 0a3f81ea0fb0..43493bc9da46 100644
>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>> @@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 {
>>>               regulator-always-on;
>>>        };
>>>
>>> +     vcc5v_reg: regulator-vcc-5v {
>>> +             compatible = "regulator-fixed";
>>> +             vin-supply = <&main_12v>;
>>> +             regulator-name = "VCC5V";
>>> +             regulator-min-microvolt = <5000000>;
>>> +             regulator-max-microvolt = <5000000>;
>>> +             gpio = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
>>> +             startup-delay-us = <7000>;
>>> +             enable-active-high;
>>> +             regulator-boot-on;
>>> +             regulator-always-on;
>>> +     };
>>> +
>>>        /* SY8120B1ABC DC/DC Regulator. */
>>>        vddcpu: regulator-vddcpu {
>>>                compatible = "pwm-regulator";
>>> @@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu {
>>>                                <699000 98>,
>>>                                <689000 100>;
>>>        };
>>> +
>>> +     dmics: audio-codec-1 {
>>> +             compatible = "dmic-codec";
>>> +             #sound-dai-cells = <0>;
>>> +             num-channels = <2>;
>>> +             wakeup-delay-ms = <50>;
>>> +             sound-name-prefix = "MIC";
>>> +     };
>>> +
>>> +     dioo2133: audio-amplifier-0 {
>>> +             compatible = "simple-audio-amplifier";
>>> +             enable-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
>>> +             VCC-supply = <&vcc5v_reg>;
>>> +             sound-name-prefix = "10U2";
>>> +     };
>>> +
>>> +     spdif_dir: audio-spdif-in {
>>> +             compatible = "linux,spdif-dir";
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "DIR";
>>> +     };
>>> +
>>> +     spdif_dit: audio-spdif-out {
>>> +             compatible = "linux,spdif-dit";
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "DIT";
>>> +     };
>>> +
>>> +     sound {
>>> +             compatible = "amlogic,axg-sound-card";
>>> +             model = "aq222";
>>> +             audio-widgets = "Line", "Lineout";
>>> +             audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
>>> +                              <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
>>> +                              <&tdmin_lb>, <&dioo2133>;
>>> +             audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
>>> +                             "TDMOUT_A IN 1", "FRDDR_B OUT 0",
>>> +                             "TDMOUT_A IN 2", "FRDDR_C OUT 0",
>>> +                             "TDM_A Playback", "TDMOUT_A OUT",
>>> +                             "TDMOUT_B IN 0", "FRDDR_A OUT 1",
>>> +                             "TDMOUT_B IN 1", "FRDDR_B OUT 1",
>>> +                             "TDMOUT_B IN 2", "FRDDR_C OUT 1",
>>> +                             "TDM_B Playback", "TDMOUT_B OUT",
>>> +                             "TDMOUT_C IN 0", "FRDDR_A OUT 2",
>>> +                             "TDMOUT_C IN 1", "FRDDR_B OUT 2",
>>> +                             "TDMOUT_C IN 2", "FRDDR_C OUT 2",
>>> +                             "TDM_C Playback", "TDMOUT_C OUT",
>>> +                             "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
>>> +                             "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
>>> +                             "SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
>>> +                             "SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
>>> +                             "SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
>>> +                             "SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
>>> +                             "TDMIN_A IN 0", "TDM_A Capture",
>>> +                             "TDMIN_A IN 1", "TDM_B Capture",
>>> +                             "TDMIN_A IN 2", "TDM_C Capture",
>>> +                             "TDMIN_A IN 3", "TDM_A Loopback",
>>> +                             "TDMIN_A IN 4", "TDM_B Loopback",
>>> +                             "TDMIN_A IN 5", "TDM_C Loopback",
>>> +                             "TDMIN_B IN 0", "TDM_A Capture",
>>> +                             "TDMIN_B IN 1", "TDM_B Capture",
>>> +                             "TDMIN_B IN 2", "TDM_C Capture",
>>> +                             "TDMIN_B IN 3", "TDM_A Loopback",
>>> +                             "TDMIN_B IN 4", "TDM_B Loopback",
>>> +                             "TDMIN_B IN 5", "TDM_C Loopback",
>>> +                             "TDMIN_C IN 0", "TDM_A Capture",
>>> +                             "TDMIN_C IN 1", "TDM_B Capture",
>>> +                             "TDMIN_C IN 2", "TDM_C Capture",
>>> +                             "TDMIN_C IN 3", "TDM_A Loopback",
>>> +                             "TDMIN_C IN 4", "TDM_B Loopback",
>>> +                             "TDMIN_C IN 5", "TDM_C Loopback",
>>> +                             "TDMIN_LB IN 3", "TDM_A Capture",
>>> +                             "TDMIN_LB IN 4", "TDM_B Capture",
>>> +                             "TDMIN_LB IN 5", "TDM_C Capture",
>>> +                             "TDMIN_LB IN 0", "TDM_A Loopback",
>>> +                             "TDMIN_LB IN 1", "TDM_B Loopback",
>>> +                             "TDMIN_LB IN 2", "TDM_C Loopback",
>>> +                             "TODDR_A IN 0", "TDMIN_A OUT",
>>> +                             "TODDR_B IN 0", "TDMIN_A OUT",
>>> +                             "TODDR_C IN 0", "TDMIN_A OUT",
>>> +                             "TODDR_A IN 1", "TDMIN_B OUT",
>>> +                             "TODDR_B IN 1", "TDMIN_B OUT",
>>> +                             "TODDR_C IN 1", "TDMIN_B OUT",
>>> +                             "TODDR_A IN 2", "TDMIN_C OUT",
>>> +                             "TODDR_B IN 2", "TDMIN_C OUT",
>>> +                             "TODDR_C IN 2", "TDMIN_C OUT",
>>> +                             "TODDR_A IN 3", "SPDIFIN Capture",
>>> +                             "TODDR_B IN 3", "SPDIFIN Capture",
>>> +                             "TODDR_C IN 3", "SPDIFIN Capture",
>>> +                             "TODDR_A IN 6", "TDMIN_LB OUT",
>>> +                             "TODDR_B IN 6", "TDMIN_LB OUT",
>>> +                             "TODDR_C IN 6", "TDMIN_LB OUT",
>>> +                             "10U2 INL", "ACODEC LOLP",
>>> +                             "10U2 INR", "ACODEC LORP",
>>> +                             "Lineout", "10U2 OUTL",
>>> +                             "Lineout", "10U2 OUTR";
>>> +             clocks = <&clkc_pll CLKID_HIFI_PLL>,
>>> +                             <&clkc_pll CLKID_MPLL0>,
>>> +                             <&clkc_pll CLKID_MPLL1>;
>>> +             assigned-clocks = <&clkc_pll CLKID_HIFI_PLL>,
>>> +                               <&clkc_pll CLKID_MPLL0>,
>>> +                               <&clkc_pll CLKID_MPLL1>;
>>> +             assigned-clock-rates = <1179648000>,
>>> +                                    <270950400>,
>>> +                                    <338688000>;
>> Seems like you've got the 2 last PLLs serving the 44.1kHz rate family.
>> Why is this needed ?
>
> Hi, jermoe
>
> Considering that the sample rate is up to 176.4K

That's not really the question here and there are interfaces (internal
for example) for which it can go higher than that.

>
> PLL0 270.950400M max support 24bit *176.4k, 32ch for tdm mode
>
> Perhaps PLL1 PLL1 calculation error , it should be set up 361.2672M for
> 32bit * 176.4k * 32ch.
>
> In fact, most situations are limited by the speed of the IO pin.

... again, no everything goes through those pins.

>
> Can we remove MPLL1 here and keep MPLL0?

That's up to you really. I'm merely pointing out that out of the 3 clock
sources, 2 are setup to serve derivative of 44.1kHz, which is useless.

>
>>> +
>>> +             dai-link-0 {
>>> +                     sound-dai = <&frddr_a>;
>>> +             };
>>> +
>>> +             dai-link-1 {
>>> +                     sound-dai = <&frddr_b>;
>>> +             };
>>> +
>>> +             dai-link-2 {
>>> +                     sound-dai = <&frddr_c>;
>>> +             };
>>> +
>>> +             dai-link-3 {
>>> +                     sound-dai = <&toddr_a>;
>>> +             };
>>> +
>>> +             dai-link-4 {
>>> +                     sound-dai = <&toddr_b>;
>>> +             };
>>> +
>>> +             dai-link-5 {
>>> +                     sound-dai = <&toddr_c>;
>>> +             };
>>> +
>>> +             dai-link-6 {
>>> +                     sound-dai = <&tdmif_a>;
>>> +                     dai-format = "i2s";
>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>> +                     mclk-fs = <256>;
>>> +                     codec-0 {
>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
>>> +                     };
>>> +                     codec-1 {
>>> +                             sound-dai = <&toacodec TOACODEC_IN_A>;
>>> +                     };
>>> +             };
>>> +
>>> +             dai-link-7 {
>>> +                     sound-dai = <&tdmif_b>;
>>> +                     dai-format = "i2s";
>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>> +                     mclk-fs = <256>;
>>> +                     codec-0 {
>>> +                             sound-dai = <&toacodec TOACODEC_IN_B>;
>>> +                     };
>>> +                     codec-1 {
>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
>>> +                     };
>>> +             };
>>> +
>>> +             /* 8ch HDMI interface */
>>> +             dai-link-8 {
>>> +                     sound-dai = <&tdmif_c>;
>>> +                     dai-format = "i2s";
>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>> +                     dai-tdm-slot-tx-mask-1 = <1 1>;
>>> +                     dai-tdm-slot-tx-mask-2 = <1 1>;
>>> +                     dai-tdm-slot-tx-mask-3 = <1 1>;
>>> +                     mclk-fs = <256>;
>>> +                     codec-0 {
>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
>>> +                     };
>>> +             };
>>> +
>>> +             /* spdif hdmi and coax output */
>>> +             dai-link-9 {
>>> +                     sound-dai = <&spdifout_a>;
>>> +
>>> +                     codec-0 {
>>> +                             sound-dai = <&spdif_dit>;
>>> +                     };
>>> +
>>> +                     codec-1 {
>>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
>>> +                     };
>>> +             };
>>> +
>>> +             /* spdif hdmi interface */
>>> +             dai-link-10 {
>>> +                     sound-dai = <&spdifout_b>;
>>> +
>>> +                     codec {
>>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
>>> +                     };
>>> +             };
>>> +
>>> +             /* spdif coax input */
>>> +             dai-link-11 {
>>> +                     sound-dai = <&spdifin>;
>>> +
>>> +                     codec {
>>> +                             sound-dai = <&spdif_dir>;
>>> +                     };
>>> +             };
>>> +
>>> +             dai-link-12 {
>>> +                     sound-dai = <&toacodec TOACODEC_OUT>;
>>> +
>>> +                     codec {
>>> +                             sound-dai = <&acodec>;
>>> +                     };
>>> +             };
>>> +     };
>>>   };
>>>
>>>   &pwm_ef {
>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>> index dfc0a30a6e61..a6c2c83eea16 100644
>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>> @@ -11,6 +11,11 @@
>>>   #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
>>>   #include <dt-bindings/power/meson-s4-power.h>
>>>   #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
>>> +#include <dt-bindings/clock/axg-audio-clkc.h>
>>> +#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
>>> +#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
>>> +#include <dt-bindings/sound/meson-g12a-toacodec.h>
>>> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
>>>
>>>   / {
>>>        cpus {
>>> @@ -863,4 +868,360 @@ emmc: mmc@fe08c000 {
>>>                        assigned-clock-rates = <24000000>;
>>>                };
>>>        };
>>> +
>>> +     tdmif_a: audio-controller-0 {
>>> +             compatible = "amlogic,axg-tdm-iface";
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TDM_A";
>>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_A_MCLK>;
>>> +             clock-names = "sclk", "lrclk","mclk";
>>> +     };
>>> +
>>> +     tdmif_b: audio-controller-1 {
>>> +             compatible = "amlogic,axg-tdm-iface";
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TDM_B";
>>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_B_MCLK>;
>>> +             clock-names = "sclk", "lrclk","mclk";
>>> +     };
>>> +
>>> +     tdmif_c: audio-controller-2 {
>>> +             compatible = "amlogic,axg-tdm-iface";
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TDM_C";
>>> +             clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_MST_C_MCLK>;
>>> +             clock-names = "sclk", "lrclk","mclk";
>>> +     };
>>> +};
>>> +
>>> +&apb4 {
>>> +     acodec: audio-controller@1a000 {
>>> +             compatible = "amlogic,t9015";
>>> +             reg = <0x0 0x1a000 0x0 0x14>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "ACODEC";
>>> +             clocks = <&clkc_periphs CLKID_ACODEC>;
>>> +             clock-names = "pclk";
>>> +             resets = <&reset RESET_ACODEC>;
>>> +             AVDD-supply = <&vddio_ao1v8>;
>>> +     };
>>> +
>>> +     clkc_audio: clock-controller@330000 {
>>> +             compatible = "amlogic,s4-audio-clkc";
>>> +             reg = <0x0 0x330000 0x0 0xd8>,
>>> +                       <0x0 0x330e80 0x0 0x10>;
>>> +             #clock-cells = <1>;
>>> +             #reset-cells = <1>;
>>> +             power-domains = <&pwrc PWRC_S4_AUDIO_ID>;
>>> +             clocks = <&clkc_periphs CLKID_AUDIO>,
>>> +                      <&clkc_pll CLKID_MPLL0>,
>>> +                      <&clkc_pll CLKID_MPLL1>,
>>> +                      <&clkc_pll CLKID_MPLL2>,
>>> +                      <&clkc_pll CLKID_MPLL3>,
>>> +                      <&clkc_pll CLKID_HIFI_PLL>,
>>> +                      <&clkc_pll CLKID_FCLK_DIV3>,
>>> +                      <&clkc_pll CLKID_FCLK_DIV4>,
>>> +                      <&clkc_pll CLKID_FCLK_DIV5>;
>>> +             clock-names = "pclk",
>>> +                               "mst_in0",
>>> +                               "mst_in1",
>>> +                               "mst_in2",
>>> +                               "mst_in3",
>>> +                               "mst_in4",
>>> +                               "mst_in5",
>>> +                               "mst_in6",
>>> +                               "mst_in7";
>>> +             resets = <&reset RESET_AUDIO>;
>>> +     };
>>> +
>>> +     toddr_a: audio-controller@330100 {
>>> +             compatible = "amlogic,sm1-toddr",
>>> +                              "amlogic,axg-toddr";
>> no s4 compat ?
>>
>>> +             reg = <0x0 0x330100 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TODDR_A";
>>> +             interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
>>> +             resets = <&arb AXG_ARB_TODDR_A>,
>>> +                      <&clkc_audio AUD_RESET_TODDR_A>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <8192>;
>>> +     };
>>> +
>>> +     toddr_b: audio-controller@330140 {
>>> +             compatible = "amlogic,sm1-toddr",
>>> +                              "amlogic,axg-toddr";
>>> +             reg = <0x0 0x330140 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TODDR_B";
>>> +             interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
>>> +             resets = <&arb AXG_ARB_TODDR_B>,
>>> +                      <&clkc_audio AUD_RESET_TODDR_B>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     toddr_c: audio-controller@330180 {
>>> +             compatible = "amlogic,sm1-toddr",
>>> +                              "amlogic,axg-toddr";
>>> +             reg = <0x0 0x330180 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TODDR_C";
>>> +             interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
>>> +             resets = <&arb AXG_ARB_TODDR_C>,
>>> +                      <&clkc_audio AUD_RESET_TODDR_C>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     frddr_a: audio-controller@3301c0 {
>>> +             compatible = "amlogic,sm1-frddr",
>>> +                              "amlogic,axg-frddr";
>>> +             reg = <0x0 0x3301c0 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "FRDDR_A";
>>> +             interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
>>> +             resets = <&arb AXG_ARB_FRDDR_A>,
>>> +                      <&clkc_audio AUD_RESET_FRDDR_A>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <512>;
>>> +     };
>>> +
>>> +     frddr_b: audio-controller@330200 {
>>> +             compatible = "amlogic,sm1-frddr",
>>> +                              "amlogic,axg-frddr";
>>> +             reg = <0x0 0x330200 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "FRDDR_B";
>>> +             interrupts = <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
>>> +             resets = <&arb AXG_ARB_FRDDR_B>,
>>> +                      <&clkc_audio AUD_RESET_FRDDR_B>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     frddr_c: audio-controller@330240 {
>>> +             compatible = "amlogic,sm1-frddr",
>>> +                              "amlogic,axg-frddr";
>>> +             reg = <0x0 0x330240 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "FRDDR_C";
>>> +             interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
>>> +             resets = <&arb AXG_ARB_FRDDR_C>,
>>> +                      <&clkc_audio AUD_RESET_FRDDR_C>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     arb: reset-controller@330280 {
>>> +             compatible = "amlogic,meson-sm1-audio-arb";
>>> +             reg = <0x0 0x330280 0x0 0x4>;
>>> +             #reset-cells = <1>;
>>> +             clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
>>> +     };
>>> +
>>> +     tdmin_a: audio-controller@330300 {
>>> +             compatible = "amlogic,sm1-tdmin";
>>> +             reg = <0x0 0x330300 0x0 0x40>;
>>> +             sound-name-prefix = "TDMIN_A";
>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_A>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     tdmin_b: audio-controller@330340 {
>>> +             compatible = "amlogic,sm1-tdmin";
>>> +             reg = <0x0 0x330340 0x0 0x40>;
>>> +             sound-name-prefix = "TDMIN_B";
>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_B>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     tdmin_c: audio-controller@330380 {
>>> +             compatible = "amlogic,sm1-tdmin";
>>> +             reg = <0x0 0x330380 0x0 0x40>;
>>> +             sound-name-prefix = "TDMIN_C";
>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_C>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     tdmin_lb: audio-controller@3303c0 {
>>> +             compatible = "amlogic,sm1-tdmin";
>>> +             reg = <0x0 0x3303c0 0x0 0x40>;
>>> +             sound-name-prefix = "TDMIN_LB";
>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     spdifin: audio-controller@330400 {
>>> +             compatible = "amlogic,g12a-spdifin",
>>> +                              "amlogic,axg-spdifin";
>>> +             reg = <0x0 0x330400 0x0 0x30>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "SPDIFIN";
>>> +             interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
>>> +             <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
>>> +             clock-names = "pclk", "refclk";
>>> +             resets = <&clkc_audio AUD_RESET_SPDIFIN>;
>>> +     };
>>> +
>>> +     spdifout_a: audio-controller@330480 {
>>> +             compatible = "amlogic,g12a-spdifout",
>>> +                              "amlogic,axg-spdifout";
>>> +             reg = <0x0 0x330480 0x0 0x50>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "SPDIFOUT_A";
>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
>>> +             <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
>>> +             clock-names = "pclk", "mclk";
>>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
>>> +     };
>>> +
>>> +     tdmout_a: audio-controller@330500 {
>>> +             compatible = "amlogic,sm1-tdmout";
>>> +             reg = <0x0 0x330500 0x0 0x40>;
>>> +             sound-name-prefix = "TDMOUT_A";
>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     tdmout_b: audio-controller@330540 {
>>> +             compatible = "amlogic,sm1-tdmout";
>>> +             reg = <0x0 0x330540 0x0 0x40>;
>>> +             sound-name-prefix = "TDMOUT_B";
>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     tdmout_c: audio-controller@330580 {
>>> +             compatible = "amlogic,sm1-tdmout";
>>> +             reg = <0x0 0x330580 0x0 0x40>;
>>> +             sound-name-prefix = "TDMOUT_C";
>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>> +                               "lrclk", "lrclk_sel";
>>> +     };
>>> +
>>> +     spdifout_b: audio-controller@330680 {
>>> +             compatible = "amlogic,g12a-spdifout",
>>> +                              "amlogic,axg-spdifout";
>>> +             reg = <0x0 0x330680 0x0 0x50>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "SPDIFOUT_B";
>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
>>> +                      <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
>>> +             clock-names = "pclk", "mclk";
>>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
>>> +     };
>>> +
>>> +     toacodec: audio-controller@330740 {
>>> +             compatible = "amlogic,s4-toacodec",
>>> +                              "amlogic,g12a-toacodec";
>>> +             reg = <0x0 0x330740 0x0 0x4>;
>>> +             sound-name-prefix = "TOACODEC";
>>> +             #sound-dai-cells = <1>;
>>> +             resets = <&clkc_audio AUD_RESET_TOACODEC>;
>>> +     };
>>> +
>>> +     tohdmitx: audio-controller@330744 {
>>> +             compatible = "amlogic,sm1-tohdmitx",
>>> +                              "amlogic,g12a-tohdmitx";
>>> +             reg = <0x0 0x330744 0x0 0x4>;
>>> +             #sound-dai-cells = <1>;
>>> +             sound-name-prefix = "TOHDMITX";
>>> +             resets = <&clkc_audio AUD_RESET_TOHDMITX>;
>>> +     };
>>> +
>>> +     toddr_d: audio-controller@330840 {
>>> +             compatible = "amlogic,sm1-toddr",
>>> +                              "amlogic,axg-toddr";
>>> +             reg = <0x0 0x330840 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "TODDR_D";
>>> +             interrupts = <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
>>> +             resets = <&arb AXG_ARB_TODDR_D>,
>>> +                      <&clkc_audio AUD_RESET_TODDR_D>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     frddr_d: audio-controller@330880 {
>>> +              compatible = "amlogic,sm1-frddr",
>>> +                               "amlogic,axg-frddr";
>>> +             reg = <0x0 0x330880 0x0 0x2c>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "FRDDR_D";
>>> +             interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
>>> +             resets = <&arb AXG_ARB_FRDDR_D>,
>>> +                      <&clkc_audio AUD_RESET_FRDDR_D>;
>>> +             reset-names = "arb", "rst";
>>> +             amlogic,fifo-depth = <256>;
>>> +     };
>>> +
>>> +     pdm: audio-controller@331000 {
>>> +             compatible = "amlogic,sm1-pdm",
>>> +                          "amlogic,axg-pdm";
>>> +             reg = <0x0 0x331000 0x0 0x34>;
>>> +             #sound-dai-cells = <0>;
>>> +             sound-name-prefix = "PDM";
>>> +             clocks = <&clkc_audio AUD_CLKID_PDM>,
>>> +                      <&clkc_audio AUD_CLKID_PDM_DCLK>,
>>> +                      <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
>>> +             clock-names = "pclk", "dclk", "sysclk";
>>> +             resets = <&clkc_audio AUD_RESET_PDM>;
>>> +     };
>>>   };
>> --
>> Jerome

-- 
Jerome

Re: [PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio

[Jiebing Chen]

在 2026/1/26 22:57, Jerome Brunet 写道:
> [ EXTERNAL EMAIL ]
>
> On lun. 26 janv. 2026 at 21:20, Jiebing Chen <jiebing.chen@amlogic.com> wrote:
>
>> 在 2026/1/26 19:19, Jerome Brunet 写道:
>>> [ EXTERNAL EMAIL ]
>>>
>>> On lun. 26 janv. 2026 at 06:01, Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> wrote:
>>>
>>>> From: Jiebing Chen <jiebing.chen@amlogic.com>
>>>>
>>>> Add basic audio driver support for the Amlogic S4 based
>>>> Amlogic AQ222 board.
>>>>
>>>> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
>>>> ---
>>>>    .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
>>>>    arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
>>>>    2 files changed, 583 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>>> index 0a3f81ea0fb0..43493bc9da46 100644
>>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
>>>> @@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 {
>>>>                regulator-always-on;
>>>>         };
>>>>
>>>> +     vcc5v_reg: regulator-vcc-5v {
>>>> +             compatible = "regulator-fixed";
>>>> +             vin-supply = <&main_12v>;
>>>> +             regulator-name = "VCC5V";
>>>> +             regulator-min-microvolt = <5000000>;
>>>> +             regulator-max-microvolt = <5000000>;
>>>> +             gpio = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
>>>> +             startup-delay-us = <7000>;
>>>> +             enable-active-high;
>>>> +             regulator-boot-on;
>>>> +             regulator-always-on;
>>>> +     };
>>>> +
>>>>         /* SY8120B1ABC DC/DC Regulator. */
>>>>         vddcpu: regulator-vddcpu {
>>>>                 compatible = "pwm-regulator";
>>>> @@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu {
>>>>                                 <699000 98>,
>>>>                                 <689000 100>;
>>>>         };
>>>> +
>>>> +     dmics: audio-codec-1 {
>>>> +             compatible = "dmic-codec";
>>>> +             #sound-dai-cells = <0>;
>>>> +             num-channels = <2>;
>>>> +             wakeup-delay-ms = <50>;
>>>> +             sound-name-prefix = "MIC";
>>>> +     };
>>>> +
>>>> +     dioo2133: audio-amplifier-0 {
>>>> +             compatible = "simple-audio-amplifier";
>>>> +             enable-gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
>>>> +             VCC-supply = <&vcc5v_reg>;
>>>> +             sound-name-prefix = "10U2";
>>>> +     };
>>>> +
>>>> +     spdif_dir: audio-spdif-in {
>>>> +             compatible = "linux,spdif-dir";
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "DIR";
>>>> +     };
>>>> +
>>>> +     spdif_dit: audio-spdif-out {
>>>> +             compatible = "linux,spdif-dit";
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "DIT";
>>>> +     };
>>>> +
>>>> +     sound {
>>>> +             compatible = "amlogic,axg-sound-card";
>>>> +             model = "aq222";
>>>> +             audio-widgets = "Line", "Lineout";
>>>> +             audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
>>>> +                              <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
>>>> +                              <&tdmin_lb>, <&dioo2133>;
>>>> +             audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
>>>> +                             "TDMOUT_A IN 1", "FRDDR_B OUT 0",
>>>> +                             "TDMOUT_A IN 2", "FRDDR_C OUT 0",
>>>> +                             "TDM_A Playback", "TDMOUT_A OUT",
>>>> +                             "TDMOUT_B IN 0", "FRDDR_A OUT 1",
>>>> +                             "TDMOUT_B IN 1", "FRDDR_B OUT 1",
>>>> +                             "TDMOUT_B IN 2", "FRDDR_C OUT 1",
>>>> +                             "TDM_B Playback", "TDMOUT_B OUT",
>>>> +                             "TDMOUT_C IN 0", "FRDDR_A OUT 2",
>>>> +                             "TDMOUT_C IN 1", "FRDDR_B OUT 2",
>>>> +                             "TDMOUT_C IN 2", "FRDDR_C OUT 2",
>>>> +                             "TDM_C Playback", "TDMOUT_C OUT",
>>>> +                             "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
>>>> +                             "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
>>>> +                             "SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
>>>> +                             "SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
>>>> +                             "SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
>>>> +                             "SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
>>>> +                             "TDMIN_A IN 0", "TDM_A Capture",
>>>> +                             "TDMIN_A IN 1", "TDM_B Capture",
>>>> +                             "TDMIN_A IN 2", "TDM_C Capture",
>>>> +                             "TDMIN_A IN 3", "TDM_A Loopback",
>>>> +                             "TDMIN_A IN 4", "TDM_B Loopback",
>>>> +                             "TDMIN_A IN 5", "TDM_C Loopback",
>>>> +                             "TDMIN_B IN 0", "TDM_A Capture",
>>>> +                             "TDMIN_B IN 1", "TDM_B Capture",
>>>> +                             "TDMIN_B IN 2", "TDM_C Capture",
>>>> +                             "TDMIN_B IN 3", "TDM_A Loopback",
>>>> +                             "TDMIN_B IN 4", "TDM_B Loopback",
>>>> +                             "TDMIN_B IN 5", "TDM_C Loopback",
>>>> +                             "TDMIN_C IN 0", "TDM_A Capture",
>>>> +                             "TDMIN_C IN 1", "TDM_B Capture",
>>>> +                             "TDMIN_C IN 2", "TDM_C Capture",
>>>> +                             "TDMIN_C IN 3", "TDM_A Loopback",
>>>> +                             "TDMIN_C IN 4", "TDM_B Loopback",
>>>> +                             "TDMIN_C IN 5", "TDM_C Loopback",
>>>> +                             "TDMIN_LB IN 3", "TDM_A Capture",
>>>> +                             "TDMIN_LB IN 4", "TDM_B Capture",
>>>> +                             "TDMIN_LB IN 5", "TDM_C Capture",
>>>> +                             "TDMIN_LB IN 0", "TDM_A Loopback",
>>>> +                             "TDMIN_LB IN 1", "TDM_B Loopback",
>>>> +                             "TDMIN_LB IN 2", "TDM_C Loopback",
>>>> +                             "TODDR_A IN 0", "TDMIN_A OUT",
>>>> +                             "TODDR_B IN 0", "TDMIN_A OUT",
>>>> +                             "TODDR_C IN 0", "TDMIN_A OUT",
>>>> +                             "TODDR_A IN 1", "TDMIN_B OUT",
>>>> +                             "TODDR_B IN 1", "TDMIN_B OUT",
>>>> +                             "TODDR_C IN 1", "TDMIN_B OUT",
>>>> +                             "TODDR_A IN 2", "TDMIN_C OUT",
>>>> +                             "TODDR_B IN 2", "TDMIN_C OUT",
>>>> +                             "TODDR_C IN 2", "TDMIN_C OUT",
>>>> +                             "TODDR_A IN 3", "SPDIFIN Capture",
>>>> +                             "TODDR_B IN 3", "SPDIFIN Capture",
>>>> +                             "TODDR_C IN 3", "SPDIFIN Capture",
>>>> +                             "TODDR_A IN 6", "TDMIN_LB OUT",
>>>> +                             "TODDR_B IN 6", "TDMIN_LB OUT",
>>>> +                             "TODDR_C IN 6", "TDMIN_LB OUT",
>>>> +                             "10U2 INL", "ACODEC LOLP",
>>>> +                             "10U2 INR", "ACODEC LORP",
>>>> +                             "Lineout", "10U2 OUTL",
>>>> +                             "Lineout", "10U2 OUTR";
>>>> +             clocks = <&clkc_pll CLKID_HIFI_PLL>,
>>>> +                             <&clkc_pll CLKID_MPLL0>,
>>>> +                             <&clkc_pll CLKID_MPLL1>;
>>>> +             assigned-clocks = <&clkc_pll CLKID_HIFI_PLL>,
>>>> +                               <&clkc_pll CLKID_MPLL0>,
>>>> +                               <&clkc_pll CLKID_MPLL1>;
>>>> +             assigned-clock-rates = <1179648000>,
>>>> +                                    <270950400>,
>>>> +                                    <338688000>;
>>> Seems like you've got the 2 last PLLs serving the 44.1kHz rate family.
>>> Why is this needed ?
>> Hi, jermoe
>>
>> Considering that the sample rate is up to 176.4K
> That's not really the question here and there are interfaces (internal
> for example) for which it can go higher than that.
Yes, if the number of tdm slots is smaller, theoretically it is possible 
to support a higher sample rate.
>
>> PLL0 270.950400M max support 24bit *176.4k, 32ch for tdm mode
>>
>> Perhaps PLL1 PLL1 calculation error , it should be set up 361.2672M for
>> 32bit * 176.4k * 32ch.
>>
>> In fact, most situations are limited by the speed of the IO pin.
> ... again, no everything goes through those pins.
>
>> Can we remove MPLL1 here and keep MPLL0?
> That's up to you really. I'm merely pointing out that out of the 3 clock
> sources, 2 are setup to serve derivative of 44.1kHz, which is useless.
Two PLLs are indeed unnecessary. I will remove one in next version. thanks
>
>>>> +
>>>> +             dai-link-0 {
>>>> +                     sound-dai = <&frddr_a>;
>>>> +             };
>>>> +
>>>> +             dai-link-1 {
>>>> +                     sound-dai = <&frddr_b>;
>>>> +             };
>>>> +
>>>> +             dai-link-2 {
>>>> +                     sound-dai = <&frddr_c>;
>>>> +             };
>>>> +
>>>> +             dai-link-3 {
>>>> +                     sound-dai = <&toddr_a>;
>>>> +             };
>>>> +
>>>> +             dai-link-4 {
>>>> +                     sound-dai = <&toddr_b>;
>>>> +             };
>>>> +
>>>> +             dai-link-5 {
>>>> +                     sound-dai = <&toddr_c>;
>>>> +             };
>>>> +
>>>> +             dai-link-6 {
>>>> +                     sound-dai = <&tdmif_a>;
>>>> +                     dai-format = "i2s";
>>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>>> +                     mclk-fs = <256>;
>>>> +                     codec-0 {
>>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
>>>> +                     };
>>>> +                     codec-1 {
>>>> +                             sound-dai = <&toacodec TOACODEC_IN_A>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             dai-link-7 {
>>>> +                     sound-dai = <&tdmif_b>;
>>>> +                     dai-format = "i2s";
>>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>>> +                     mclk-fs = <256>;
>>>> +                     codec-0 {
>>>> +                             sound-dai = <&toacodec TOACODEC_IN_B>;
>>>> +                     };
>>>> +                     codec-1 {
>>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             /* 8ch HDMI interface */
>>>> +             dai-link-8 {
>>>> +                     sound-dai = <&tdmif_c>;
>>>> +                     dai-format = "i2s";
>>>> +                     dai-tdm-slot-tx-mask-0 = <1 1>;
>>>> +                     dai-tdm-slot-tx-mask-1 = <1 1>;
>>>> +                     dai-tdm-slot-tx-mask-2 = <1 1>;
>>>> +                     dai-tdm-slot-tx-mask-3 = <1 1>;
>>>> +                     mclk-fs = <256>;
>>>> +                     codec-0 {
>>>> +                             sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             /* spdif hdmi and coax output */
>>>> +             dai-link-9 {
>>>> +                     sound-dai = <&spdifout_a>;
>>>> +
>>>> +                     codec-0 {
>>>> +                             sound-dai = <&spdif_dit>;
>>>> +                     };
>>>> +
>>>> +                     codec-1 {
>>>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             /* spdif hdmi interface */
>>>> +             dai-link-10 {
>>>> +                     sound-dai = <&spdifout_b>;
>>>> +
>>>> +                     codec {
>>>> +                             sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             /* spdif coax input */
>>>> +             dai-link-11 {
>>>> +                     sound-dai = <&spdifin>;
>>>> +
>>>> +                     codec {
>>>> +                             sound-dai = <&spdif_dir>;
>>>> +                     };
>>>> +             };
>>>> +
>>>> +             dai-link-12 {
>>>> +                     sound-dai = <&toacodec TOACODEC_OUT>;
>>>> +
>>>> +                     codec {
>>>> +                             sound-dai = <&acodec>;
>>>> +                     };
>>>> +             };
>>>> +     };
>>>>    };
>>>>
>>>>    &pwm_ef {
>>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>> index dfc0a30a6e61..a6c2c83eea16 100644
>>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>> @@ -11,6 +11,11 @@
>>>>    #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
>>>>    #include <dt-bindings/power/meson-s4-power.h>
>>>>    #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
>>>> +#include <dt-bindings/clock/axg-audio-clkc.h>
>>>> +#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
>>>> +#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
>>>> +#include <dt-bindings/sound/meson-g12a-toacodec.h>
>>>> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
>>>>
>>>>    / {
>>>>         cpus {
>>>> @@ -863,4 +868,360 @@ emmc: mmc@fe08c000 {
>>>>                         assigned-clock-rates = <24000000>;
>>>>                 };
>>>>         };
>>>> +
>>>> +     tdmif_a: audio-controller-0 {
>>>> +             compatible = "amlogic,axg-tdm-iface";
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TDM_A";
>>>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_A_MCLK>;
>>>> +             clock-names = "sclk", "lrclk","mclk";
>>>> +     };
>>>> +
>>>> +     tdmif_b: audio-controller-1 {
>>>> +             compatible = "amlogic,axg-tdm-iface";
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TDM_B";
>>>> +             clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_B_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_B_MCLK>;
>>>> +             clock-names = "sclk", "lrclk","mclk";
>>>> +     };
>>>> +
>>>> +     tdmif_c: audio-controller-2 {
>>>> +             compatible = "amlogic,axg-tdm-iface";
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TDM_C";
>>>> +             clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_C_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_MST_C_MCLK>;
>>>> +             clock-names = "sclk", "lrclk","mclk";
>>>> +     };
>>>> +};
>>>> +
>>>> +&apb4 {
>>>> +     acodec: audio-controller@1a000 {
>>>> +             compatible = "amlogic,t9015";
>>>> +             reg = <0x0 0x1a000 0x0 0x14>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "ACODEC";
>>>> +             clocks = <&clkc_periphs CLKID_ACODEC>;
>>>> +             clock-names = "pclk";
>>>> +             resets = <&reset RESET_ACODEC>;
>>>> +             AVDD-supply = <&vddio_ao1v8>;
>>>> +     };
>>>> +
>>>> +     clkc_audio: clock-controller@330000 {
>>>> +             compatible = "amlogic,s4-audio-clkc";
>>>> +             reg = <0x0 0x330000 0x0 0xd8>,
>>>> +                       <0x0 0x330e80 0x0 0x10>;
>>>> +             #clock-cells = <1>;
>>>> +             #reset-cells = <1>;
>>>> +             power-domains = <&pwrc PWRC_S4_AUDIO_ID>;
>>>> +             clocks = <&clkc_periphs CLKID_AUDIO>,
>>>> +                      <&clkc_pll CLKID_MPLL0>,
>>>> +                      <&clkc_pll CLKID_MPLL1>,
>>>> +                      <&clkc_pll CLKID_MPLL2>,
>>>> +                      <&clkc_pll CLKID_MPLL3>,
>>>> +                      <&clkc_pll CLKID_HIFI_PLL>,
>>>> +                      <&clkc_pll CLKID_FCLK_DIV3>,
>>>> +                      <&clkc_pll CLKID_FCLK_DIV4>,
>>>> +                      <&clkc_pll CLKID_FCLK_DIV5>;
>>>> +             clock-names = "pclk",
>>>> +                               "mst_in0",
>>>> +                               "mst_in1",
>>>> +                               "mst_in2",
>>>> +                               "mst_in3",
>>>> +                               "mst_in4",
>>>> +                               "mst_in5",
>>>> +                               "mst_in6",
>>>> +                               "mst_in7";
>>>> +             resets = <&reset RESET_AUDIO>;
>>>> +     };
>>>> +
>>>> +     toddr_a: audio-controller@330100 {
>>>> +             compatible = "amlogic,sm1-toddr",
>>>> +                              "amlogic,axg-toddr";
>>> no s4 compat ?
>>>
>>>> +             reg = <0x0 0x330100 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TODDR_A";
>>>> +             interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
>>>> +             resets = <&arb AXG_ARB_TODDR_A>,
>>>> +                      <&clkc_audio AUD_RESET_TODDR_A>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <8192>;
>>>> +     };
>>>> +
>>>> +     toddr_b: audio-controller@330140 {
>>>> +             compatible = "amlogic,sm1-toddr",
>>>> +                              "amlogic,axg-toddr";
>>>> +             reg = <0x0 0x330140 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TODDR_B";
>>>> +             interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
>>>> +             resets = <&arb AXG_ARB_TODDR_B>,
>>>> +                      <&clkc_audio AUD_RESET_TODDR_B>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     toddr_c: audio-controller@330180 {
>>>> +             compatible = "amlogic,sm1-toddr",
>>>> +                              "amlogic,axg-toddr";
>>>> +             reg = <0x0 0x330180 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TODDR_C";
>>>> +             interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
>>>> +             resets = <&arb AXG_ARB_TODDR_C>,
>>>> +                      <&clkc_audio AUD_RESET_TODDR_C>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     frddr_a: audio-controller@3301c0 {
>>>> +             compatible = "amlogic,sm1-frddr",
>>>> +                              "amlogic,axg-frddr";
>>>> +             reg = <0x0 0x3301c0 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "FRDDR_A";
>>>> +             interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
>>>> +             resets = <&arb AXG_ARB_FRDDR_A>,
>>>> +                      <&clkc_audio AUD_RESET_FRDDR_A>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <512>;
>>>> +     };
>>>> +
>>>> +     frddr_b: audio-controller@330200 {
>>>> +             compatible = "amlogic,sm1-frddr",
>>>> +                              "amlogic,axg-frddr";
>>>> +             reg = <0x0 0x330200 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "FRDDR_B";
>>>> +             interrupts = <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
>>>> +             resets = <&arb AXG_ARB_FRDDR_B>,
>>>> +                      <&clkc_audio AUD_RESET_FRDDR_B>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     frddr_c: audio-controller@330240 {
>>>> +             compatible = "amlogic,sm1-frddr",
>>>> +                              "amlogic,axg-frddr";
>>>> +             reg = <0x0 0x330240 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "FRDDR_C";
>>>> +             interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
>>>> +             resets = <&arb AXG_ARB_FRDDR_C>,
>>>> +                      <&clkc_audio AUD_RESET_FRDDR_C>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     arb: reset-controller@330280 {
>>>> +             compatible = "amlogic,meson-sm1-audio-arb";
>>>> +             reg = <0x0 0x330280 0x0 0x4>;
>>>> +             #reset-cells = <1>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
>>>> +     };
>>>> +
>>>> +     tdmin_a: audio-controller@330300 {
>>>> +             compatible = "amlogic,sm1-tdmin";
>>>> +             reg = <0x0 0x330300 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMIN_A";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_A>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     tdmin_b: audio-controller@330340 {
>>>> +             compatible = "amlogic,sm1-tdmin";
>>>> +             reg = <0x0 0x330340 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMIN_B";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_B>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     tdmin_c: audio-controller@330380 {
>>>> +             compatible = "amlogic,sm1-tdmin";
>>>> +             reg = <0x0 0x330380 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMIN_C";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_C>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     tdmin_lb: audio-controller@3303c0 {
>>>> +             compatible = "amlogic,sm1-tdmin";
>>>> +             reg = <0x0 0x3303c0 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMIN_LB";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     spdifin: audio-controller@330400 {
>>>> +             compatible = "amlogic,g12a-spdifin",
>>>> +                              "amlogic,axg-spdifin";
>>>> +             reg = <0x0 0x330400 0x0 0x30>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "SPDIFIN";
>>>> +             interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
>>>> +             <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
>>>> +             clock-names = "pclk", "refclk";
>>>> +             resets = <&clkc_audio AUD_RESET_SPDIFIN>;
>>>> +     };
>>>> +
>>>> +     spdifout_a: audio-controller@330480 {
>>>> +             compatible = "amlogic,g12a-spdifout",
>>>> +                              "amlogic,axg-spdifout";
>>>> +             reg = <0x0 0x330480 0x0 0x50>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "SPDIFOUT_A";
>>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
>>>> +             <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
>>>> +             clock-names = "pclk", "mclk";
>>>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
>>>> +     };
>>>> +
>>>> +     tdmout_a: audio-controller@330500 {
>>>> +             compatible = "amlogic,sm1-tdmout";
>>>> +             reg = <0x0 0x330500 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMOUT_A";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     tdmout_b: audio-controller@330540 {
>>>> +             compatible = "amlogic,sm1-tdmout";
>>>> +             reg = <0x0 0x330540 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMOUT_B";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     tdmout_c: audio-controller@330580 {
>>>> +             compatible = "amlogic,sm1-tdmout";
>>>> +             reg = <0x0 0x330580 0x0 0x40>;
>>>> +             sound-name-prefix = "TDMOUT_C";
>>>> +             resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
>>>> +             clock-names = "pclk", "sclk", "sclk_sel",
>>>> +                               "lrclk", "lrclk_sel";
>>>> +     };
>>>> +
>>>> +     spdifout_b: audio-controller@330680 {
>>>> +             compatible = "amlogic,g12a-spdifout",
>>>> +                              "amlogic,axg-spdifout";
>>>> +             reg = <0x0 0x330680 0x0 0x50>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "SPDIFOUT_B";
>>>> +             clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
>>>> +                      <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
>>>> +             clock-names = "pclk", "mclk";
>>>> +             resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
>>>> +     };
>>>> +
>>>> +     toacodec: audio-controller@330740 {
>>>> +             compatible = "amlogic,s4-toacodec",
>>>> +                              "amlogic,g12a-toacodec";
>>>> +             reg = <0x0 0x330740 0x0 0x4>;
>>>> +             sound-name-prefix = "TOACODEC";
>>>> +             #sound-dai-cells = <1>;
>>>> +             resets = <&clkc_audio AUD_RESET_TOACODEC>;
>>>> +     };
>>>> +
>>>> +     tohdmitx: audio-controller@330744 {
>>>> +             compatible = "amlogic,sm1-tohdmitx",
>>>> +                              "amlogic,g12a-tohdmitx";
>>>> +             reg = <0x0 0x330744 0x0 0x4>;
>>>> +             #sound-dai-cells = <1>;
>>>> +             sound-name-prefix = "TOHDMITX";
>>>> +             resets = <&clkc_audio AUD_RESET_TOHDMITX>;
>>>> +     };
>>>> +
>>>> +     toddr_d: audio-controller@330840 {
>>>> +             compatible = "amlogic,sm1-toddr",
>>>> +                              "amlogic,axg-toddr";
>>>> +             reg = <0x0 0x330840 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "TODDR_D";
>>>> +             interrupts = <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
>>>> +             resets = <&arb AXG_ARB_TODDR_D>,
>>>> +                      <&clkc_audio AUD_RESET_TODDR_D>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     frddr_d: audio-controller@330880 {
>>>> +              compatible = "amlogic,sm1-frddr",
>>>> +                               "amlogic,axg-frddr";
>>>> +             reg = <0x0 0x330880 0x0 0x2c>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "FRDDR_D";
>>>> +             interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
>>>> +             clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
>>>> +             resets = <&arb AXG_ARB_FRDDR_D>,
>>>> +                      <&clkc_audio AUD_RESET_FRDDR_D>;
>>>> +             reset-names = "arb", "rst";
>>>> +             amlogic,fifo-depth = <256>;
>>>> +     };
>>>> +
>>>> +     pdm: audio-controller@331000 {
>>>> +             compatible = "amlogic,sm1-pdm",
>>>> +                          "amlogic,axg-pdm";
>>>> +             reg = <0x0 0x331000 0x0 0x34>;
>>>> +             #sound-dai-cells = <0>;
>>>> +             sound-name-prefix = "PDM";
>>>> +             clocks = <&clkc_audio AUD_CLKID_PDM>,
>>>> +                      <&clkc_audio AUD_CLKID_PDM_DCLK>,
>>>> +                      <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
>>>> +             clock-names = "pclk", "dclk", "sysclk";
>>>> +             resets = <&clkc_audio AUD_RESET_PDM>;
>>>> +     };
>>>>    };
>>> --
>>> Jerome
> --
> Jerome

Re: [PATCH v6 0/5] Add support for S4 audio

[Piotr Oniszczuk]

> Wiadomość napisana przez Jiebing Chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org> w dniu 26 sty 2026, o godz. 07:01:
> 
> This series completes the end-to-end audio support
> for S4 SoC from hardware bindings to driver implementation
> and system integration.
> 
> 1 Device Tree Bindings Updates 
> Added audio power domain and S4 audio clock support for S4 SoC.
> Added S4 audio tocodec binding support.
> 
> 2 Driver Implementation
> Implemented S4 tocodec driver for G12A architecture.
> Added S4 audio clock support in AXG audio clock 
> 
> 3 Device Tree Integration
> Add Amlogic S4 audio subsystem support in arm64 DTS.
> 
> Signed-off-by: jiebing chen <jiebing.chen@amlogic.com>
> ---
> Changes in v6:
> - Fix the problem of string for Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
> - Remove clock pad register, and it will be submitted as an independent patch.
> - Redescribe sound/soc/meson/g12a-toacodec.c
> - Link to v5: https://lore.kernel.org/r/20250710-audio_drvier-v5-0-d4155f1e7464@amlogic.com
> 

Jiebing,

FYI

I applied this series over 6.18.7 and tested on s905w2 device.

With audio routing like this:

amixer cset numid=40,iface=MIXER,name='FRDDR_A SINK 1 SEL' 0
amixer cset numid=73,iface=MIXER,name='TDMOUT_A SRC SEL' 0
amixer cset numid=37,iface=MIXER,name='FRDDR_A SRC 1 EN Switch' 1
amixer cset numid=61,iface=MIXER,name='TOACODEC SRC' 0
amixer cset numid=1,iface=MIXER,name='TOACODEC Lane Select' 0
amixer cset numid=62,iface=MIXER,name='TOACODEC OUT EN Switch' 1
amixer cset numid=17,iface=MIXER,name='ACODEC Playback Volume' 251 251

i'm getting working audio on analog headset.

Great work!

Re: [PATCH v6 0/5] Add support for S4 audio

[Rob Herring]

On Mon, 26 Jan 2026 06:01:41 +0000, Jiebing Chen wrote:
> This series completes the end-to-end audio support
> for S4 SoC from hardware bindings to driver implementation
> and system integration.
> 
> 1 Device Tree Bindings Updates
> Added audio power domain and S4 audio clock support for S4 SoC.
> Added S4 audio tocodec binding support.
> 
> 2 Driver Implementation
> Implemented S4 tocodec driver for G12A architecture.
> Added S4 audio clock support in AXG audio clock
> 
> 3 Device Tree Integration
> Add Amlogic S4 audio subsystem support in arm64 DTS.
> 
> Signed-off-by: jiebing chen <jiebing.chen@amlogic.com>
> ---
> Changes in v6:
> - Fix the problem of string for Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
> - Remove clock pad register, and it will be submitted as an independent patch.
> - Redescribe sound/soc/meson/g12a-toacodec.c
> - Link to v5: https://lore.kernel.org/r/20250710-audio_drvier-v5-0-d4155f1e7464@amlogic.com
> 
> Changes in v5:
> - Fix warning Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yam when make dt_binding_check
> - The audio reg is mounted below the APB bus in dts file.
> - Deal with pad clock in a distinct controller.
> - Fix warning for sound/soc/meson/g12a-toacodec.c
> - Link to v4: https://lore.kernel.org/r/20250319-audio_drvier-v4-0-686867fad719@amlogic.com
> 
> Changes in v4:
> - fix dtb check warning
> - add maxItems of power domain for dt-bindings
> - fixed audio clock pads regmap base and reg offset
> - use dapm widget to control tocodec bclk and mclk enable
> - Link to v3: https://lore.kernel.org/r/20250228-audio_drvier-v3-0-dbfd30507e4c@amlogic.com
> 
> Changes in v3:
> - remove g12a tocodec switch event
> - Modify the incorrect title for dt-bindings
> - Link to v2: https://lore.kernel.org/r/20250214-audio_drvier-v2-0-37881fa37c9e@amlogic.com
> 
> Changes in v2:
> - remove tdm pad control and change tocodec base on g12a
> - change hifipll rate to support 24bit
> - add s4 audio clock
> - Link to v1: https://lore.kernel.org/r/20250113-audio_drvier-v1-0-8c14770f38a0@amlogic.com
> 
> ---
> Jiebing Chen (5):
>       dt-bindings: clock: meson: Add audio power domain for S4 soc
>       dt-bindings: Asoc: axg-audio: Add S4 audio tocodec
>       ASoC: meson: g12a-toacodec: Add S4 tocodec driver
>       clk: meson: axg_audio: add S4 support
>       arm64: dts: amlogic: Add Amlogic S4 Audio
> 
>  .../bindings/clock/amlogic,axg-audio-clkc.yaml     |  18 +-
>  .../bindings/sound/amlogic,g12a-toacodec.yaml      |   1 +
>  .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts     | 222 +++++++++++++
>  arch/arm64/boot/dts/amlogic/meson-s4.dtsi          | 361 +++++++++++++++++++++
>  drivers/clk/meson/axg-audio.c                      | 165 ++++++++++
>  sound/soc/meson/g12a-toacodec.c                    |  36 ++
>  6 files changed, 801 insertions(+), 2 deletions(-)
> ---
> base-commit: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d
> change-id: 20250110-audio_drvier-07a5381c494b
> 
> Best regards,
> --
> jiebing chen <jiebing.chen@amlogic.com>
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)


New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/amlogic/' for 20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com:

arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dtb: clock-controller@330000 (amlogic,s4-audio-clkc): reg: [[0, 3342336, 0, 216], [0, 3346048, 0, 16]] is too long
	from schema $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml
arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dtb: clock-controller@330000 (amlogic,s4-audio-clkc): reg: [[0, 3342336, 0, 216], [0, 3346048, 0, 16]] is too long
	from schema $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml

Re: [PATCH v6 1/5] dt-bindings: clock: meson: Add audio power domain for S4 soc

[Rob Herring]

On Mon, Jan 26, 2026 at 06:01:42AM +0000, Jiebing Chen wrote:
> The audio power domain has been found on S4 device.
> It must be enabled prior to audio operations.
> 
> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
> ---
>  .../bindings/clock/amlogic,axg-audio-clkc.yaml         | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
> index fd7982dd4cea..1cd9a99e5ff3 100644
> --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
> +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml
> @@ -20,6 +20,7 @@ properties:
>      enum:
>        - amlogic,axg-audio-clkc
>        - amlogic,g12a-audio-clkc
> +      - amlogic,s4-audio-clkc
>        - amlogic,sm1-audio-clkc
>  
>    '#clock-cells':
> @@ -99,7 +100,8 @@ properties:
>  
>    resets:
>      description: internal reset line
> -
> +  power-domains:
> +    maxItems: 1

blank line

Looks fine otherwise except for the DTB warning, so something here 
doesn't match.

Re: [PATCH v6 2/5] dt-bindings: Asoc: axg-audio: Add S4 audio tocodec

[Rob Herring]

On Mon, Jan 26, 2026 at 06:01:43AM +0000, Jiebing Chen wrote:
> Add S4 SoC tocodec compatibility support.
> 
> Signed-off-by: Jiebing Chen <jiebing.chen@amlogic.com>
> ---
>  Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring (Arm) <robh@kernel.org>