[PATCH] cedrus: Convert bitfield macros to FIELD_PREP for clarity

[PATCH] cedrus: Convert bitfield macros to FIELD_PREP for clarity

[Andrew Geyko]

Use FIELD_PREP macros for VE_DEC_H265_TRIGGER and scaling list registers
to improve readability and maintain kernel style for bitfields.

Signed-off-by: Andrew Geyko <ageyko0@gmail.com>
---
 .../staging/media/sunxi/cedrus/cedrus_regs.h  | 28 ++++++++++---------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
index 05e6cbc54..e8449859d 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
@@ -344,8 +344,8 @@
 
 #define VE_DEC_H265_SCALING_LIST_CTRL0_FLAG_ENABLED			BIT(31)
 
-#define VE_DEC_H265_SCALING_LIST_CTRL0_SRAM	(0 << 30)
-#define VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT	(1 << 30)
+#define VE_DEC_H265_SCALING_LIST_CTRL0_SRAM	FIELD_PREP(BIT(30), 0)
+#define VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT	FIELD_PREP(BIT(30), 1)
 
 #define VE_DEC_H265_DEC_SLICE_HDR_INFO0		(VE_ENGINE_DEC_H265 + 0x20)
 
@@ -424,17 +424,19 @@
 #define VE_DEC_H265_TRIGGER			(VE_ENGINE_DEC_H265 + 0x34)
 
 #define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x)	(((x) & 0x3f) << 8)
-#define VE_DEC_H265_TRIGGER_STCD_VC1		(0x02 << 4)
-#define VE_DEC_H265_TRIGGER_STCD_AVS		(0x01 << 4)
-#define VE_DEC_H265_TRIGGER_STCD_HEVC		(0x00 << 4)
-#define VE_DEC_H265_TRIGGER_DEC_SLICE		(0x08 << 0)
-#define VE_DEC_H265_TRIGGER_INIT_SWDEC		(0x07 << 0)
-#define VE_DEC_H265_TRIGGER_BYTE_ALIGN		(0x06 << 0)
-#define VE_DEC_H265_TRIGGER_GET_VLCUE		(0x05 << 0)
-#define VE_DEC_H265_TRIGGER_GET_VLCSE		(0x04 << 0)
-#define VE_DEC_H265_TRIGGER_FLUSH_BITS		(0x03 << 0)
-#define VE_DEC_H265_TRIGGER_GET_BITS		(0x02 << 0)
-#define VE_DEC_H265_TRIGGER_SHOW_BITS		(0x01 << 0)
+#define VE_DEC_H265_TRIGGER_STCD_MASK  GENMASK(5, 4)
+#define VE_DEC_H265_TRIGGER_CMD_MASK   GENMASK(3, 0)
+#define VE_DEC_H265_TRIGGER_STCD_HEVC  FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x0)
+#define VE_DEC_H265_TRIGGER_STCD_AVS   FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x1)
+#define VE_DEC_H265_TRIGGER_STCD_VC1   FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x2)
+#define VE_DEC_H265_TRIGGER_SHOW_BITS  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x1)
+#define VE_DEC_H265_TRIGGER_GET_BITS   FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x2)
+#define VE_DEC_H265_TRIGGER_FLUSH_BITS FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x3)
+#define VE_DEC_H265_TRIGGER_GET_VLCSE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x4)
+#define VE_DEC_H265_TRIGGER_GET_VLCUE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x5)
+#define VE_DEC_H265_TRIGGER_BYTE_ALIGN FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x6)
+#define VE_DEC_H265_TRIGGER_INIT_SWDEC FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x7)
+#define VE_DEC_H265_TRIGGER_DEC_SLICE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x8)
 
 #define VE_DEC_H265_STATUS			(VE_ENGINE_DEC_H265 + 0x38)
 
-- 
2.52.0

Re: [PATCH] cedrus: Convert bitfield macros to FIELD_PREP for clarity

[kernel test robot]

Hi Andrew,

kernel test robot noticed the following build errors:

[auto build test ERROR on sunxi/sunxi/for-next]
[also build test ERROR on linus/master v6.19-rc7 next-20260129]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Andrew-Geyko/cedrus-Convert-bitfield-macros-to-FIELD_PREP-for-clarity/20260130-004554
base:   https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next
patch link:    https://lore.kernel.org/r/20260129164341.104155-1-ageyko0%40gmail.com
patch subject: [PATCH] cedrus: Convert bitfield macros to FIELD_PREP for clarity
config: parisc-allyesconfig (https://download.01.org/0day-ci/archive/20260130/202601301548.SMgNvRPx-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260130/202601301548.SMgNvRPx-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601301548.SMgNvRPx-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from drivers/staging/media/sunxi/cedrus/cedrus_h265.c:17:
   drivers/staging/media/sunxi/cedrus/cedrus_h265.c: In function 'cedrus_h265_skip_bits':
>> drivers/staging/media/sunxi/cedrus/cedrus_regs.h:434:40: error: implicit declaration of function 'FIELD_PREP' [-Wimplicit-function-declaration]
     434 | #define VE_DEC_H265_TRIGGER_FLUSH_BITS FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x3)
         |                                        ^~~~~~~~~~
   drivers/staging/media/sunxi/cedrus/cedrus_h265.c:248:30: note: in expansion of macro 'VE_DEC_H265_TRIGGER_FLUSH_BITS'
     248 |                              VE_DEC_H265_TRIGGER_FLUSH_BITS |
         |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/FIELD_PREP +434 drivers/staging/media/sunxi/cedrus/cedrus_regs.h

   425	
   426	#define VE_DEC_H265_TRIGGER_TYPE_N_BITS(x)	(((x) & 0x3f) << 8)
   427	#define VE_DEC_H265_TRIGGER_STCD_MASK  GENMASK(5, 4)
   428	#define VE_DEC_H265_TRIGGER_CMD_MASK   GENMASK(3, 0)
   429	#define VE_DEC_H265_TRIGGER_STCD_HEVC  FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x0)
   430	#define VE_DEC_H265_TRIGGER_STCD_AVS   FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x1)
   431	#define VE_DEC_H265_TRIGGER_STCD_VC1   FIELD_PREP(VE_DEC_H265_TRIGGER_STCD_MASK, 0x2)
   432	#define VE_DEC_H265_TRIGGER_SHOW_BITS  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x1)
   433	#define VE_DEC_H265_TRIGGER_GET_BITS   FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x2)
 > 434	#define VE_DEC_H265_TRIGGER_FLUSH_BITS FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x3)
   435	#define VE_DEC_H265_TRIGGER_GET_VLCSE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x4)
   436	#define VE_DEC_H265_TRIGGER_GET_VLCUE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x5)
   437	#define VE_DEC_H265_TRIGGER_BYTE_ALIGN FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x6)
   438	#define VE_DEC_H265_TRIGGER_INIT_SWDEC FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x7)
   439	#define VE_DEC_H265_TRIGGER_DEC_SLICE  FIELD_PREP(VE_DEC_H265_TRIGGER_CMD_MASK, 0x8)
   440	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki