From: Sean Anderson <sean.anderson@linux.dev>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Vinod Koul <vkoul@kernel.org>,
linux-phy@lists.infradead.org
Cc: "Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Radhey Shyam Pandey" <radhey.shyam.pandey@amd.com>,
linux-kernel@vger.kernel.org,
"Michal Simek" <michal.simek@amd.com>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Thippeswamy Havalige" <thippeswamy.havalige@amd.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Sean Anderson" <sean.anderson@linux.dev>
Subject: [PATCH 2/8] phy: zynqmp: Refactor bus width configuration into helper
Date: Mon, 2 Feb 2026 19:21:22 -0500 [thread overview]
Message-ID: <20260203002128.935842-3-sean.anderson@linux.dev> (raw)
In-Reply-To: <20260203002128.935842-1-sean.anderson@linux.dev>
Split off the bus width configuration into a helper function for reuse.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
drivers/phy/xilinx/phy-zynqmp.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c
index fe6b4925d166..0d3c578d0f3f 100644
--- a/drivers/phy/xilinx/phy-zynqmp.c
+++ b/drivers/phy/xilinx/phy-zynqmp.c
@@ -502,6 +502,17 @@ static void xpsgtr_lane_set_protocol(struct xpsgtr_phy *gtr_phy)
}
}
+/* Set the bus width */
+static void xpsgtr_phy_init_bus_width(struct xpsgtr_phy *gtr_phy, u32 width)
+{
+ struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
+ u32 mask = PROT_BUS_WIDTH_MASK(gtr_phy->lane);
+ u32 val = width << PROT_BUS_WIDTH_SHIFT(gtr_phy->lane);
+
+ xpsgtr_clr_set(gtr_dev, TX_PROT_BUS_WIDTH, mask, val);
+ xpsgtr_clr_set(gtr_dev, RX_PROT_BUS_WIDTH, mask, val);
+}
+
/* Bypass (de)scrambler and 8b/10b decoder and encoder. */
static void xpsgtr_bypass_scrambler_8b10b(struct xpsgtr_phy *gtr_phy)
{
@@ -535,14 +546,7 @@ static void xpsgtr_phy_init_sata(struct xpsgtr_phy *gtr_phy)
/* SGMII-specific initialization. */
static void xpsgtr_phy_init_sgmii(struct xpsgtr_phy *gtr_phy)
{
- struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
- u32 mask = PROT_BUS_WIDTH_MASK(gtr_phy->lane);
- u32 val = PROT_BUS_WIDTH_10 << PROT_BUS_WIDTH_SHIFT(gtr_phy->lane);
-
- /* Set SGMII protocol TX and RX bus width to 10 bits. */
- xpsgtr_clr_set(gtr_dev, TX_PROT_BUS_WIDTH, mask, val);
- xpsgtr_clr_set(gtr_dev, RX_PROT_BUS_WIDTH, mask, val);
-
+ xpsgtr_phy_init_bus_width(gtr_phy, PROT_BUS_WIDTH_10);
xpsgtr_bypass_scrambler_8b10b(gtr_phy);
}
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2026-02-03 0:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-03 0:21 [PATCH 0/8] phy: zynqmp: Perform complete initialization, including ILL calibration Sean Anderson
2026-02-03 0:21 ` [PATCH 1/8] dt-bindings: pci: xilinx-nwl: Add resets Sean Anderson
2026-02-04 8:32 ` Pandey, Radhey Shyam
2026-02-05 15:47 ` Sean Anderson
2026-02-18 16:36 ` Manivannan Sadhasivam
2026-02-10 0:24 ` Rob Herring (Arm)
2026-02-03 0:21 ` Sean Anderson [this message]
2026-02-10 15:00 ` [PATCH 2/8] phy: zynqmp: Refactor bus width configuration into helper Pandey, Radhey Shyam
2026-02-03 0:21 ` [PATCH 3/8] phy: zynqmp: Refactor common phy initialization into a helper Sean Anderson
2026-02-10 15:05 ` Pandey, Radhey Shyam
2026-02-03 0:21 ` [PATCH 4/8] phy: zynqmp: Calibrate ILL if necessary Sean Anderson
2026-02-10 16:04 ` Pandey, Radhey Shyam
2026-02-10 16:42 ` Sean Anderson
2026-02-03 0:21 ` [PATCH 5/8] phy: zynqmp: Initialize chicken bits Sean Anderson
2026-02-03 0:21 ` [PATCH 6/8] PCI: xilinx-nwl: Split phy_init from phy_power_on Sean Anderson
2026-02-03 0:21 ` [PATCH 7/8] PCI: xilinx-nwl: Reset the core during probe Sean Anderson
2026-02-18 16:42 ` Manivannan Sadhasivam
2026-02-03 0:21 ` [PATCH 8/8] arm64: zynqmp: Add PCIe resets Sean Anderson
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